JPH077338A - Input current correcting circuit - Google Patents

Abstract

PURPOSE:To simultaneously correct the input currents of plural electronic circuits with the same configuration by generating a corrected current by multiplying an input current as many as the number of electronic circuits with a transistor circuit which emitter size is set at a ratio corresponding to the number of electronic circuits. CONSTITUTION:An input current correcting circuit 10 generates a corrected current 16IB by multiplying input currents IB of plural electronic circuits 2 (2A-2P) with the same configuration as many as the number of the circuits 2 and simultaneously corrects the input currents IB of the circuits 2. Transistor(Tr) circuits Q21 and Q23 generate the first corrected current IB corresponding to the input currents I of the circuits 2. On the other hand, second Tr circuits Q24 and Q25 generate a second corrected current Ix by multiplying the first corrected current IB, which emitter size is set at the ratio corresponding to the number of circuits 2, as many as the number of the circuits 2. Third Tr circuits Q26 and Q28 are provided to output this second corrected current Ix. As a result, the corrected current 16IB can be generated for simultaneously correcting the input currents IB of the plural electronic circuits 2 with the same configuration.

Description

Detailed Description of the Invention

[0001]

[Table of Contents] The present invention will be described in the following order. Field of Industrial Application Conventional Technology (FIG. 2) Problem to be Solved by the Invention (FIGS. 2 to 5) Means for Solving the Problem (FIG. 1) Action (FIG. 1) Example (FIGS. 1 and 2) ) The invention's effect

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input current correction circuit, and can be applied to, for example, a circuit for collectively correcting input currents of a plurality of comparison circuits of an analog digital converter.

[0003]

2. Description of the Related Art Conventionally, a so-called flash type analog digital converter has been used as an analog digital converter for converting an analog signal into a digital signal having a predetermined number of bits at high speed. That is, as shown in FIG. 2, in the analog digital converter 1, the input analog signal is sampled and held at every predetermined timing, and the input voltage V _IN obtained as a result is, for example, 16 comparator circuits 2A to 2P. It is input to the inverting input terminal.

At the non-inverting input terminals of the comparison circuits 2A to 2P, 17 resistors _RA to between the negative power source V _RB and the ground GND are connected.
By resistance-dividing by R _Q, a connection point a ₁ ~ of each resistor R _A to R _Q
The voltage obtained from a ₁₆ is input as the reference voltages V _{REF1 to} V _REF16 . Thereby, each of the comparison circuits 2A to 2P
_{Compares the} input voltage V _IN with the reference voltages V _{REF1 to} V _REF16 , respectively, and the comparison results C _{OUT1 to} C _OUT16 are input to the encoder 3. Thus, the encoder 3 has each comparison result C
Coding is performed according to the logic level of _{OUT1 to} C _OUT16 , and as a result, a predetermined number of digital signals DG _OUT are transmitted.

Here, in the comparison circuit 2 (2A to 2P), as shown in FIG. 3, the reference voltage V _REF and the input voltage V _IN are first and second NPN transistors Q1 and Q2, respectively, which are emitter followers. Applied to the base of. The collectors of the first and second transistors Q1 and Q2 are grounded to the ground GND, and the emitters are connected to the collectors of the third and fourth NPN transistors Q3 and Q4.

Further, the third and fourth transistors Q3, Q
The bases of 4 are commonly connected and supplied with the voltage V ₁ , and the emitters are connected to the negative power source V _EE through the resistors R ₁ , respectively, thus forming a constant current source. The emitters of the first and second transistors Q1 and Q2 are, in addition to the collectors of the third and fourth transistors Q3 and Q4, the fifth and sixth emitters which form a differential pair with an emitter follower.
Is connected to the bases of NPN transistors Q5 and Q6.

The fifth and sixth transistors Q5 and Q
The collectors of 6 are grounded through resistors R3, respectively.
And the emitters are both connected to the collector of the seventh NPN transistor Q7. The base of the seventh transistor Q7 is the third and fourth transistors Q3, Q.
4 is commonly connected to the base, and the emitter is a resistor R3.
Through a negative power source V _EE , thus forming a constant current source.

As a result, the reference voltage V _REF and the input voltage V
The first and second transistors Q1 and Q according to the voltage difference of _IN
The difference in the emitter voltage generated at 2 is differentially amplified by the fifth and sixth transistors Q5 and Q6, and thus the fifth and sixth transistors.
Reference voltage V from the collectors of the transistors Q5 and Q6 of
_An output voltage V _OUT obtained by comparing the voltage values of _REF and the input voltage V _IN and its inverted output voltage V _IOUT are sent out.

[0009]

By the way, in the comparison circuit 2 having such a configuration, the first and second transistors Q are provided.
In addition to applying the reference voltage V _REF and the input voltage V _IN to the bases of 1 and Q2, respectively,

[Equation 1] An input current I _B , which is a base current represented by, is generated.
The input current I _B is generated in all the comparison circuit 2A~2P of analog-to-digital converter 1, the reference voltage V _REF1 ~V _REF16 input result to the comparison circuit 2A~2P
Therefore, there is a problem that the input voltage V _IN cannot be correctly compared in each of the comparison circuits 2A to 2P.

[0010] Therefore, in the analog-to-digital converter 1, an input current with the input current correction circuit for generating a 16-fold of the correction current 16I _B relative to I _B, thereby correcting the current 16I _B, for example, first obtained By supplying it to the connection middle point a ₈ (FIG. 2), the input currents I _B to the comparison circuits 2A to 2P are collectively corrected. That is, as shown in FIG. 4 in which parts corresponding to those in FIG.
Between the negative power supply V _EE and the negative power supply V _EE, 16 series circuits of the first and third transistors Q1 and Q3 and the resistor R1 which constitute the emitter follower portion of the reference voltage input stage of the comparison circuit 2 are connected in parallel.

In practice, 16 first transistors Q1
The bases of are connected together, which results in the input current I
Generating a correction current 16I _B consisting of 16 times the _B, which folded in PNP transistors Q8 and Q9 of a pair of the current-mirror connected, it is configured so as to be able to sent a correction current 16I _B in this way.

However, in such a configuration, the first and third transistors Q are connected between the ground GND and the negative power source V _EE depending on the number of the comparison circuits 2 of the analog digital converter 1.
Since it is necessary to connect the series circuit of 1, Q3 and the resistor R1 in parallel, the number of circuit elements and power consumption increase accordingly. Therefore, as shown in FIG. 5 in which parts corresponding to those in FIG. 4 are denoted by the same reference numerals, the first and third parts forming the emitter follower part of the reference voltage input stage of the comparison circuit 2 are connected between the ground GND and the negative power source V _EE . Transistors Q1 and Q3 and resistor R1
An input current correction circuit 5 is conceivable in which four series circuits of are connected in parallel.

[0013] generating a correction current 4I _B made at four times the input current I _B through the first common connected bases in the input current correction circuit 5, PNP This correction current 4I _B is a pair of connected current mirror folded in 4-fold with transistors Q10 and Q11, are adapted to this manner can generate a correction current 16I _B consisting of 16 times the input current I _B. By doing so, the number of elements of the NPN transistors Q1 and Q3 and the resistor R3 can be reduced to 1/4 as compared with the input current correction circuit 4 of FIG.

However, a PNP with a current mirror connection
Transistor Q10 and transistor Q11
In order to quadruple the collector current of the transistor Q11 and return it as the collector current of the transistor Q11,
Therefore, it is necessary to use four elements of the transistor Q10, and as a result, the solution is still insufficient in terms of the number of circuit elements and power consumption.

The present invention has been made in view of the above points, and a correction current is generated by multiplying the input current of a plurality of electronic circuits by the number of electronic circuits with a simple structure. The present invention intends to propose an input current correction circuit that can supply the current.

[0016]

In order to solve such a problem, in the present invention, an input current I _B of the electronic circuit 2 is applied to a plurality of electronic circuits 2 (2A to 2P) having the same circuit configuration. and number multiple of the electronic circuit 2 generates a correction current 16I _B, in the input current correction circuit 10 for correcting a batch input current I _B of the plurality of electronic circuits 2, corresponding to the input current I _B of the electronic circuit 2 A first correction current I _B
Second transistor circuit Q21, Q23, and an emitter size having a ratio according to the number of electronic circuits 2, and a second correction current I _X is generated by multiplying the first correction current I _B by the number of electronic circuits 2. Transistor circuits Q24 and Q25, and a third transistor circuit Q that outputs a second correction current I _X obtained from the second transistor circuits Q24 and Q25.
26 and Q28 are provided.

[0017]

A transistor circuit Q in which the input current I _B of the electronic circuit 2 is a ratio of the emitter size according to the number of electronic circuits 2
Since the correction current I _X is generated by multiplying the number of the electronic circuits 2 by 24 and Q25, the correction current 16I for collectively correcting the input currents I _B of the plurality of electronic circuits 2 having the same circuit configuration. _B can occur.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

In FIG. 1 in which parts corresponding to those in FIG. 4 are designated by the same reference numerals, 10 indicates an input current correction circuit as a whole, which is equivalent to the third transistor Q3 of the comparison circuit 2 and whose emitter is negative through the resistor R1. NPN connected to power supply V _EE
The voltage V ₁ is applied to the base of the transistor Q20, and the collector of the transistor Q20 is connected to the first of the comparison circuit 2.
NPN transistor Q21 equivalent to the transistor Q1
It is connected to the EMITA.

The base current of the input current I _B is injected into the base of the transistor Q21 through NPN transistors Q22 and Q23 which are diode-connected to the ground GND, and the collector of the NPN transistor Q22 is diode-connected to the ground GND. , And collector current I _C flows in through Q24. In fact, this collector current I _C is in addition to this, the NP which is an emitter follower.
Applied to the base of N-transistor Q25.

Here, in the case of this embodiment, the emitter size of the NPN transistors Q24 and Q25 is selected to be four times. The collector of the transistor Q25 has an emitter connected to the ground GND through a resistor R4.
A collector current I _X flows in through the collector of the P transistor Q26.

The emitter of the transistor Q25 is connected between the collectors and the emitters of the transistors Q20 and Q21, and is also connected to the negative power source V _EE through the NPN transistor Q29 and the resistor R5. The base of the transistor Q26 has a resistor R for each emitter.
4 is commonly connected to the bases of PNP transistors Q27 and Q28 which are grounded to the ground GND, whereby the transistors Q26, Q27 and Q28 are current mirror connected.

Further, the collector of the transistor Q27 is
An emitter connected in current mirror with the transistor Q29 is connected to the collector of an NPN transistor Q30 connected to the negative power source V _EE through a resistor R5. In the case of this input current correction circuit 10, the transistor Q27
Is sent as the correction current I _H.

In the above structure, if no current flows between the emitters of the transistors Q21 and Q25, the collector current of the transistor Q20 is equal to the collector current I _C of the transistor Q21, and similarly the collector current of the transistor Q29 is the transistor. It becomes equal to the collector current I _{X of} Q25.

In this state, the transistors Q23 and Q
21 base-emitter voltage sum and transistor Q
Between the sum of the base-emitter voltage of 24 and Q25,

[Equation 2] The relationship is established. NPN transistors Q24, Q
Since the 25 emitter size is selected to be 4 times, equation (2) is

[Equation 3] Equation (3) can be transformed into the following equation from the relation of natural logarithm.

[Equation 4] Can be transformed into

[Equation 5] As can be seen, the collector current I _X of the transistor Q25 is 16 times the base current I _B of the transistor Q21.

In the case of this embodiment, the collector current I _X of the transistor Q25 is the current mirror-connected PNP.
It is folded back by the transistors Q26 and Q28, and thus the correction current I _H (= 16I _B ) which is 16 times the base current I _B (that is, equivalent to the input current I _B of the comparison circuit 2) is collected from the collector of the transistor Q28. ) Is sent out. At this time, the transistor Q2
The collector current I _{X of} 5 is also returned by the PNP transistor Q27 which is current-mirror connected to the transistor Q26.

Therefore, the collector current I _X is folded back by the current mirror-connected transistors Q30 and Q29, and as a result, the collector of the transistor Q29 draws the collector current I _X , and eventually the transistor Q2.
It can be seen that no current flows between the emitter of No. 5 and the emitter of the transistor Q21.

The input current correction circuit 1 according to this embodiment is
0 supplies the correction current 16I _B , which is 16 times the input current I _B as described above, to the first connection midpoint a ₈ of the analog digital converter 1 (FIG. 2), and in this way each comparison The input current I _B generated in the circuits 2A to 2P can be collectively corrected.

According to the above structure, the input current I _B of the comparator circuit 2 generated by the transistors Q23 and Q21 is multiplied by 16 in the transistors Q24 and Q25 whose emission sizes are in proportion to the number of the comparator circuits 2. Correction current I
By which is adapted to generate the _X (= 16I _B), the correction current 16I _B to collectively corrected input current I _B generated 16 comparison circuit 2A~2P of analog-to-digital converter 1 with a simple configuration The input current correction circuit 10 that can be generated can be realized.

Further, according to the above configuration, if the ratio of the emitter sizes of the NPN transistors Q24 and Q25 is selected according to the number of comparison circuits 2, the number of comparison circuits 2 is 16.
Not only the number but also various cases such as 32 or 64, it is possible to easily generate a correction current with the same circuit configuration, thus realizing an input current correction circuit that can suppress the number of elements and power consumption to the minimum increase it can.

In the above-mentioned embodiment, the case where the present invention is applied to the one for correcting the input currents of the plurality of comparison circuits of the flash type analog digital converter has been described. However, the present invention is not limited to this, and is essential. Is suitable for wide application in the case of generating a correction current for collectively correcting the input current generated in the electronic circuits of the same circuit configuration whose inputs are commonly connected by constant voltage driving or the like.

[0032]

As described above, according to the present invention, a correction current is generated by multiplying the input current of an electronic circuit by the number of electronic circuits in a transistor circuit whose emitter size is a ratio according to the number of electronic circuits. As a result, it is possible to easily realize an input current correction circuit that can generate a correction current that collectively corrects the input currents of a plurality of electronic circuits having the same circuit configuration.

[Brief description of drawings]

FIG. 1 is a connection diagram showing an embodiment of an input current correction circuit according to the present invention.

FIG. 2 is a connection diagram showing a configuration of a flash type analog digital converter.

FIG. 3 is a connection diagram showing a configuration of the comparison circuit.

FIG. 4 is a connection diagram showing a configuration of a conventional input current correction circuit.

FIG. 5 is a connection diagram showing a configuration of a conventional input current correction circuit.

[Explanation of symbols]

1 ... Analog digital converter, 2, 2A-2P ...
Comparison circuit, 3 ... Encoder, 4, 5, 10 ... Input current correction circuit.

Claims (1)

[Claims] 1. For a plurality of electronic circuits having the same circuit configuration, an input current of the electronic circuits is multiplied by the number of the electronic circuits to generate a correction current, and the input of the plurality of the electronic circuits is performed. In an input current correction circuit for collectively correcting currents, a first transistor circuit that generates a first correction current corresponding to the input current of the electronic circuit and an emitter size in a ratio according to the number of electronic circuits are provided. And outputs a second correction current obtained by multiplying the first correction current by the number of the electronic circuits to generate a second correction current, and a second correction current obtained from the second transistor circuit. An input current correction circuit comprising a third transistor circuit.