JPH0772939A - Current source circuit - Google Patents

Current source circuit

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Publication number
JPH0772939A
JPH0772939A JP5894692A JP5894692A JPH0772939A JP H0772939 A JPH0772939 A JP H0772939A JP 5894692 A JP5894692 A JP 5894692A JP 5894692 A JP5894692 A JP 5894692A JP H0772939 A JPH0772939 A JP H0772939A
Authority
JP
Japan
Prior art keywords
voltage
operational amplifier
transistor
resistor
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5894692A
Other languages
Japanese (ja)
Other versions
JPH0816854B2 (en
Inventor
Koichi Yamada
弘一 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Japan Ltd
Original Assignee
Sony Tektronix Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Tektronix Corp filed Critical Sony Tektronix Corp
Priority to JP5894692A priority Critical patent/JPH0816854B2/en
Priority to US07/971,278 priority patent/US5319303A/en
Publication of JPH0772939A publication Critical patent/JPH0772939A/en
Publication of JPH0816854B2 publication Critical patent/JPH0816854B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To improve the capacity factor of a power supply voltage by varying an output current from zero linearly by acquiring the output current from the collection electrode of a transistor whose discharge electrode is coupled with a resistor and the inversion input terminals of plural operational amplifiers. CONSTITUTION:The discharge electrode of the transistor 10 is coupled with the resistor 12 and the inversion input terminal of the operational amplifier 14, and the control electrode of the transistor with the output terminal of the operational amplifier 14, and furthermore, a reference voltage source 16 is connected to between the non- inversion input terminal of the operational amplifier 14 and the other terminal of the resistor 12. Also, the output terminal of the operational amplifier 18 is coupled with the other terminal of the resistor 12, and the inversion input terminal of the amplifier with the discharge electrode of the transistor 10, and the non-inversion input terminal receives a prescribed voltage. Since the emitter of the transistor 10 goes to the prescribed voltage in spite of the output current obtained from the collection electrode of the transistor 10 by the negative feedback function of the operational amplifier 18, the capacity factor of the power supply voltage can be improved by increasing the maximum output voltage by setting the prescribed voltage appropriately. Also, the output current can be varied from zero linearly.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電流源回路、特に、出
力電流を0からリニア(線形)に可変できると共に、出
力端子の電圧を出力電流の変化にかかわらず高く設定で
きる電流源回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current source circuit, and more particularly to a current source circuit capable of linearly changing an output current from 0 and setting a voltage at an output terminal to be high regardless of a change in the output current. .

【0002】[0002]

【従来の技術及び発明が解決しようとする課題】可変電
流源や定電流源などの電流源回路は、オフセット回路、
傾斜波発生回路などの種々の電子回路に用いられてい
る。かかる電流源回路の従来例の1つを図4に示す。バ
イポーラNPNトランジスタ10のエミッタは、抵抗器
12を介して、電源電圧、例えば、−15Vを受けると
共に、演算増幅器(オペレーショナル増幅器)14の反
転入力端に結合する。また、トランジスタ10のベース
を演算増幅器14の出力端に結合し、そのコレクタから
引き込み出力電流Ioutを発生する。演算増幅器14
の非反転入力端及び−15Vの電圧線の間に、基準電圧
源16を挿入する。演算増幅器の電源電圧(駆動電圧)
は、−15V及び接地電圧である。なお、トランジスタ
10及び演算増幅器14の電源電圧が同じである点に留
意されたい。
2. Description of the Related Art Current source circuits such as variable current sources and constant current sources include offset circuits,
It is used in various electronic circuits such as ramp wave generation circuits. FIG. 4 shows one conventional example of such a current source circuit. The emitter of the bipolar NPN transistor 10 receives a power supply voltage, for example, −15V via a resistor 12 and is coupled to an inverting input terminal of an operational amplifier (operational amplifier) 14. In addition, the base of the transistor 10 is coupled to the output terminal of the operational amplifier 14, and the collector of the operational amplifier 14 draws an output current Iout. Operational amplifier 14
The reference voltage source 16 is inserted between the non-inverting input terminal of -1 and the voltage line of -15V. Power supply voltage (driving voltage) of operational amplifier
Is -15V and ground voltage. Note that the transistor 10 and the operational amplifier 14 have the same power supply voltage.

【0003】図4の電流源回路において、演算増幅器1
4が、その非反転入力端及び反転入力端の電圧が等しく
なるようにトランジスタ10のベースを制御するので、
抵抗器12の両端の電位差が基準電圧源16の電圧と等
しくなる。よって、抵抗器12に流れる定電流が、トラ
ンジスタ10のエミッタ電流となり、(ベース電流を無
視すれば)このエミッタ電流がコレクタ電流、即ち、出
力電流Ioutとなる。基準電圧源16を可変にすれ
ば、出力電流Ioutは可変になる。
In the current source circuit of FIG. 4, the operational amplifier 1
4 controls the base of the transistor 10 so that the voltages at its non-inverting and inverting inputs are equal,
The potential difference across the resistor 12 becomes equal to the voltage of the reference voltage source 16. Therefore, the constant current flowing through the resistor 12 becomes the emitter current of the transistor 10, and this emitter current becomes the collector current, that is, the output current Iout (ignoring the base current). If the reference voltage source 16 is made variable, the output current Iout becomes variable.

【0004】ところで、一般に、演算増幅器を適切に動
作させるには、電源電圧に対して2Vの余裕が必要であ
る。図4の場合、演算増幅器の電源電圧は、−15V及
び0Vであるので、その入力電圧範囲は、少なくとも−
13V〜−2Vでなければならない。よって、基準電源
16の電圧は、2V〜13Vでなければならない。すな
わち、抵抗器12の両端の電圧差は、最低でも2Vとな
ってしまう。よって、基準電圧源16を可変としても、
出力電流Ioutを0mAからリニアに可変できないと
いう問題が生じる。この問題により、可変電流源により
オフセット調整をする場合は、微小な調整ができず、傾
斜波を発生させる場合には、傾斜の緩い波形を発生でき
ない。
By the way, in general, in order to properly operate the operational amplifier, it is necessary to have a margin of 2 V with respect to the power supply voltage. In the case of FIG. 4, since the power supply voltage of the operational amplifier is −15 V and 0 V, its input voltage range is at least −.
Must be between 13V and -2V. Therefore, the voltage of the reference power supply 16 must be 2V to 13V. That is, the voltage difference across the resistor 12 is at least 2V. Therefore, even if the reference voltage source 16 is variable,
There arises a problem that the output current Iout cannot be linearly changed from 0 mA. Due to this problem, when the offset adjustment is performed by the variable current source, fine adjustment cannot be performed, and when the ramp wave is generated, the waveform with a gentle slope cannot be generated.

【0005】この問題を解決した従来の電流源回路を図
5に示す。図4との構成上の違いは、演算増幅器14の
電源電圧を別系統として、抵抗器12の下端及び基準電
圧源16の陰極が−12.5Vの電源電圧を受け、演算
増幅器14が−15Vの電源電圧を受ける点である。な
お、これら2つの電源電圧の差を2.5Vにしたのは、
2Vに0.5Vの余裕をもたせたためである。演算増幅
器14の入力電圧範囲は、−13V〜−2Vであるの
で、基準電圧源16を調整して、抵抗器12の両端の電
圧差を0Vから設定できる。よって、出力電流Iout
を0mAからリニアに可変することができる。
A conventional current source circuit that solves this problem is shown in FIG. 4 is different from that of FIG. 4 in that the power supply voltage of the operational amplifier 14 is a separate system, the lower end of the resistor 12 and the cathode of the reference voltage source 16 receive the power supply voltage of -12.5V, and the operational amplifier 14 is -15V. This is the point that receives the power supply voltage of. The difference between these two power supply voltages is 2.5V because
This is because 2V has a margin of 0.5V. Since the input voltage range of the operational amplifier 14 is −13V to −2V, the reference voltage source 16 can be adjusted to set the voltage difference across the resistor 12 from 0V. Therefore, the output current Iout
Can be linearly changed from 0 mA.

【0006】図6は、図5の電流源回路において、基準
電圧源16からの基準電圧Vrefの可変範囲を0V〜
2Vとした場合における、トランジスタ10のエミッタ
電圧VE及び最大出力電圧(コレクタ電圧)Voutの
特性図を示す。図6において、左側の縦軸は電源電圧を
表し、右側の縦軸は(出力電流Iout値設定のため
の)基準電圧Vrefを表し、横軸は基準電圧Vref
が2Vのときを100%とした出力電流Ioutの百分
率を表す。なお、トランジスタ10のコレクタ及びエミ
ッタ間の飽和電圧を0.5Vとしている。
FIG. 6 shows a variable range of the reference voltage Vref from the reference voltage source 16 in the current source circuit of FIG.
A characteristic diagram of the emitter voltage VE and the maximum output voltage (collector voltage) Vout of the transistor 10 in the case of 2V is shown. 6, the vertical axis on the left side represents the power supply voltage, the vertical axis on the right side represents the reference voltage Vref (for setting the output current Iout value), and the horizontal axis represents the reference voltage Vref.
Represents the percentage of the output current Iout with 100% at 2V. The saturation voltage between the collector and the emitter of the transistor 10 is 0.5V.

【0007】図6の特性図から判る如く、基準電圧Vr
efが0Vは電源電圧−12.5Vに対応し、エミッタ
電圧VEは基準電圧Vrefに等しくなる。基準電圧V
ref、即ち、エミッタ電圧VEに比例して出力電流I
outが増加する。トランジスタ10のコレクタ電圧
は、エミッタ電圧VEよりも必ずコレクタ・エミッタ間
飽和電圧(0.5V)だけ高くなければ、トランジスタ
10が動作できない。よって、図5の出力電流Iout
を受ける電子回路の電流入力端の端子電圧は、エミッタ
電圧VEよりもこの飽和電圧0.5Vだけ高くなければ
ならない。したがって、最大出力電圧Vout特性直線
は、エミッタ電圧VEの特性直線と0.5Vだけ高く、
この直線と平行になる。このため、電流源回路の出力電
流Ioutを受ける電子回路の電流入力端の電圧は、出
力電流Ioutが最大のときの最悪状態を考慮して決定
しなければならず、出力電流Ioutを受ける電子回路
の電源電圧利用率が悪くなるという問題がある。
As can be seen from the characteristic diagram of FIG. 6, the reference voltage Vr
When ef is 0V, it corresponds to the power supply voltage -12.5V, and the emitter voltage VE becomes equal to the reference voltage Vref. Reference voltage V
ref, that is, the output current I in proportion to the emitter voltage VE
out increases. Unless the collector voltage of the transistor 10 is higher than the emitter voltage VE by the collector-emitter saturation voltage (0.5 V), the transistor 10 cannot operate. Therefore, the output current Iout of FIG.
The terminal voltage at the current input of the receiving electronic circuit must be higher than the emitter voltage VE by this saturation voltage 0.5V. Therefore, the maximum output voltage Vout characteristic line is higher by 0.5V than the characteristic line of the emitter voltage VE,
It will be parallel to this straight line. Therefore, the voltage at the current input terminal of the electronic circuit that receives the output current Iout of the current source circuit must be determined in consideration of the worst state when the output current Iout is the maximum, and the electronic circuit that receives the output current Iout. However, there is a problem that the power supply voltage utilization rate of is deteriorated.

【0008】したがって、本発明の目的は、出力電流を
0からリニアに可変できると共に、最大出力電圧を高く
して電源電圧利用率を改善した電流源回路の提供にあ
る。
Therefore, an object of the present invention is to provide a current source circuit in which the output current can be changed linearly from 0 and the maximum output voltage is increased to improve the power supply voltage utilization rate.

【0009】[0009]

【課題を解決するための手段】本発明の電流源回路によ
れば、トランジスタ10の放射電極が抵抗器12の一端
及び第1演算増幅器14の反転(−)入力端に結合し、
その制御電極が第1演算増幅器14の出力端に結合して
いる。第1演算増幅器14の非反転(+)入力端及び抵
抗器12の他端間に基準電圧手段16を接続する。第2
演算増幅器18の出力端を抵抗器12の他端に結合し、
その反転入力端をトランジスタ10の放射電極に結合
し、その非反転入力端は所定電圧を受ける。出力電流I
outは、トランジスタ10の収集電極から得る。な
お、本願明細書において、トランジスタは、バイポーラ
・トランジスタ及び電界効果トランジスタ(FET)の
いずれも意味するので、制御電極がベース及びゲートに
対応し、放射電極がエミッタ及びソースに対応し、収集
電極がコレクタ及びドレインに対応する。
According to the current source circuit of the present invention, the radiation electrode of the transistor 10 is coupled to one end of the resistor 12 and the inverting (-) input end of the first operational amplifier 14,
Its control electrode is coupled to the output of the first operational amplifier 14. The reference voltage means 16 is connected between the non-inverting (+) input terminal of the first operational amplifier 14 and the other end of the resistor 12. Second
The output end of the operational amplifier 18 is coupled to the other end of the resistor 12,
Its inverting input is coupled to the radiation electrode of transistor 10, and its non-inverting input receives a predetermined voltage. Output current I
out is obtained from the collecting electrode of the transistor 10. In this specification, the term "transistor" means both a bipolar transistor and a field effect transistor (FET). Therefore, the control electrode corresponds to the base and the gate, the emission electrode corresponds to the emitter and the source, and the collection electrode corresponds to the collector electrode. Corresponds to the collector and drain.

【0010】[0010]

【作用】トランジスタ10、抵抗器12、演算増幅器1
4及び基準電圧手段(基準電圧源)16は、従来の電流
源回路と同様に動作して、出力電流Ioutを発生す
る。演算増幅器18の負帰還作用により、出力電流Io
utに関係なく、トランジスタ10のエミッタが所定電
圧になる。よって、最大出力電圧は、常に、この所定電
圧とトランジスタ10のコレクタ・エミッタ間の飽和電
圧になる。適切に所定電圧を設定することにより、出力
電流Ioutを受ける電子回路の電源電圧利用率が向上
する。また、第1演算増幅器14の電源電圧の絶対値
は、当然、第2演算増幅器18の出力電圧よりも大きい
ので、出力電流Ioutを0からリニアに可変できる。
Operation: Transistor 10, resistor 12, operational amplifier 1
4 and the reference voltage means (reference voltage source) 16 operate similarly to the conventional current source circuit to generate the output current Iout. Due to the negative feedback effect of the operational amplifier 18, the output current Io
The emitter of the transistor 10 has a predetermined voltage regardless of ut. Therefore, the maximum output voltage is always the predetermined voltage and the saturation voltage between the collector and the emitter of the transistor 10. By appropriately setting the predetermined voltage, the power supply voltage utilization rate of the electronic circuit that receives the output current Iout is improved. Since the absolute value of the power supply voltage of the first operational amplifier 14 is naturally larger than the output voltage of the second operational amplifier 18, the output current Iout can be linearly changed from 0.

【0011】[0011]

【実施例】図1は、本発明の好適な実施例の回路図であ
る。図4及び5と同じ素子は、同じ参照番号で示す。な
お、この実施例では、トランジスタ10としてNPNト
ランジスタを用いているが、トランジスタは、PNPト
ランジスタでも、電界効果トランジスタでも、電源電圧
及びバイアス電圧を適切にすることにより、本発明を実
施できる点に留意されたい。
1 is a circuit diagram of a preferred embodiment of the present invention. The same elements as in FIGS. 4 and 5 are designated with the same reference numbers. In this embodiment, an NPN transistor is used as the transistor 10, but it should be noted that the transistor can be a PNP transistor or a field effect transistor, and the present invention can be implemented by appropriately setting the power supply voltage and the bias voltage. I want to be done.

【0012】上述の如く、トランジスタ10、抵抗器1
2、演算増幅器14及び基準電圧源(基準電圧手段)1
6の接続関係は、図5の従来の電流源回路と同様であ
る。演算増幅器18の出力端が、抵抗器12の下端及び
基準電圧源16の陰極に結合し、反転(−)入力端がト
ランジスタ10のエミッタに結合し、非反転(+)入力
端が電源電圧−12.5Vを受ける。演算増幅器14及
び18は、接地電圧及び−15Vにより駆動される。な
お、演算増輻器18の非反転入力端の供給される所定電
圧を−12.5Vに設定したのは、演算増幅器が適切に
動作するには、その入力電圧が電源電圧に対して少なく
とも2Vの余裕がなければならないため、更に余裕をも
ったためである。
As described above, the transistor 10 and the resistor 1
2, operational amplifier 14 and reference voltage source (reference voltage means) 1
The connection relationship of 6 is the same as that of the conventional current source circuit of FIG. The output terminal of the operational amplifier 18 is coupled to the lower end of the resistor 12 and the cathode of the reference voltage source 16, the inverting (-) input terminal is coupled to the emitter of the transistor 10, and the non-inverting (+) input terminal is the power supply voltage-. Receives 12.5V. The operational amplifiers 14 and 18 are driven by the ground voltage and -15V. The predetermined voltage supplied to the non-inverting input terminal of the operational amplifier 18 is set to -12.5 V because the input voltage is at least 2 V with respect to the power supply voltage in order for the operational amplifier to operate properly. This is because there must be a margin of, and there is more margin.

【0013】従来の電流源回路と同様に、第1演算増幅
器14は、負帰還作用により、その非反転入力端及び反
転入力端の電圧が等しくなるように、トランジスタ10
のベースを制御する。また、抵抗器12及び基準電圧源
16の陰極が共通接続されているので、抵抗器12の両
端の電位差が基準電圧源16からの基準電圧Vrefに
等しくなる。よって、抵抗器12の抵抗値及び基準電圧
値により決まる電流が、トランジスタ10のエミッタか
ら抵抗器12に流れ込み、この電流が出力電流Iout
となる。出力電流Ioutは、基準電圧Vrefを0か
ら可変することにより0からリニアに可変する。
Similar to the conventional current source circuit, the first operational amplifier 14 has the transistor 10 so that the voltage at its non-inverting input terminal and that at its inverting input terminal become equal due to the negative feedback effect.
Control the base of. Further, since the resistor 12 and the cathode of the reference voltage source 16 are commonly connected, the potential difference across the resistor 12 becomes equal to the reference voltage Vref from the reference voltage source 16. Therefore, a current determined by the resistance value of the resistor 12 and the reference voltage value flows from the emitter of the transistor 10 into the resistor 12, and this current is the output current Iout.
Becomes The output current Iout varies linearly from 0 by varying the reference voltage Vref from 0.

【0014】一方、第2演算増幅器18は、負帰還作用
により、その反転入力端及び非反転入力端の電圧が等し
くなるように出力電圧VNを発生する。よって、演算増
幅器14の出力電圧に関係なく、即ち、出力電流Iou
tに関係なく、トランジスタ10のエミッタ電圧が所定
電圧−12.5Vになる。したがって、トランジスタ1
0のコレクタ電圧の最大値、即ち、電流出力端の最大電
圧Voutは、常に、−12.5Vに、トランジスタ1
0のコレクタ・エミッタ間飽和電圧(例えば、0.5
V)を加算した電圧(−12V)となる。この結果、出
力電流Ioutを受ける電子回路の電源電圧利用率が改
善する。
On the other hand, the second operational amplifier 18 generates the output voltage VN by the negative feedback action so that the voltages at its inverting input terminal and non-inverting input terminal become equal. Therefore, regardless of the output voltage of the operational amplifier 14, that is, the output current Iou
The emitter voltage of the transistor 10 becomes the predetermined voltage -12.5V regardless of t. Therefore, the transistor 1
The maximum value of the collector voltage of 0, that is, the maximum voltage Vout at the current output terminal is always -12.5V,
0 collector-emitter saturation voltage (eg 0.5
It becomes a voltage (-12V) obtained by adding V). As a result, the power supply voltage utilization rate of the electronic circuit that receives the output current Iout is improved.

【0015】上述から判る如く、図1の電流源回路で基
準電圧Vrefを0Vから2Vまで変化させた場合、そ
の特性図は図2のようになる。なお、図2も図6と同様
に、左側の縦軸が電源電圧を表し、右側の縦軸が基準電
圧Vrefを表し、横軸が出力電流Iout(基準電圧
が2Vのときの出力電流を100%とする)を表す。図
2及び図6を比較すると、本発明の方が、出力電流Io
utに関係なく最大出力電圧Voutが大きくとれるこ
とが判る。
As can be seen from the above, when the reference voltage Vref is changed from 0V to 2V in the current source circuit of FIG. 1, its characteristic diagram is as shown in FIG. 2, the left vertical axis represents the power supply voltage, the right vertical axis represents the reference voltage Vref, and the horizontal axis represents the output current Iout (the output current when the reference voltage is 2V is 100V). %). Comparing FIG. 2 and FIG. 6, according to the present invention, the output current Io
It can be seen that the maximum output voltage Vout can be large regardless of ut.

【0016】図3は、本発明の電流源回路のより具体的
な回路図である。図1の素子に対応する素子は、同じ参
照番号で示す。図3では、第2演算増幅器18を、演算
増幅器20及びその出力反転増幅器であるNPNトラン
ジスタ22により構成する。よって、第2演算増幅器1
8の反転入力端及び非反転入力端は、演算増幅器20の
非反転入力端及び反転入力端に各々対応する。また、演
算増幅器18の非反転入力端(演算増幅器20の非反転
入力端)に供給する所定電圧は、電源電圧−15Vを抵
抗器24及び26により分圧して発生している。
FIG. 3 is a more specific circuit diagram of the current source circuit of the present invention. Elements corresponding to those of FIG. 1 are designated with the same reference numbers. In FIG. 3, the second operational amplifier 18 is composed of an operational amplifier 20 and an NPN transistor 22 which is its output inverting amplifier. Therefore, the second operational amplifier 1
The inverting input terminal and the non-inverting input terminal of 8 correspond to the non-inverting input terminal and the inverting input terminal of the operational amplifier 20, respectively. The predetermined voltage supplied to the non-inverting input terminal of the operational amplifier 18 (the non-inverting input terminal of the operational amplifier 20) is generated by dividing the power supply voltage -15V by the resistors 24 and 26.

【0017】第1演算増幅器14の非反転入力端及び抵
抗器12に下端間に挿入する基準電圧手段は、定電流源
28及び抵抗器30により構成する。すなわち、抵抗器
30を演算増幅器14の非反転入力端及び抵抗器12の
下端間に挿入し、抵抗器30に定電流を流し、その電圧
降下を基準電圧として利用する。定電流源28は、演算
増幅器32、FET34及び抵抗器36により構成す
る。これら素子の関係は、演算増幅器14、トランジス
タ10及び抵抗器12の関係と同じであり、演算増幅器
32の非反転入力端に供給される基準電圧VR及び抵抗
器36の値で決まる。よって、電圧VRを可変すること
により電流源28の電流が可変し、この電流の可変によ
り抵抗器30の電圧降下(基準電圧Vref)も可変
し、出力電流Ioutが可変する。図3の電流源回路の
その他の動作は、図1の場合と同じである。
The reference voltage means inserted between the non-inverting input terminal of the first operational amplifier 14 and the lower end of the resistor 12 comprises a constant current source 28 and a resistor 30. That is, the resistor 30 is inserted between the non-inverting input terminal of the operational amplifier 14 and the lower end of the resistor 12, a constant current is passed through the resistor 30, and the voltage drop thereof is used as a reference voltage. The constant current source 28 is composed of an operational amplifier 32, an FET 34 and a resistor 36. The relationship between these elements is the same as the relationship between the operational amplifier 14, the transistor 10 and the resistor 12, and is determined by the reference voltage VR and the value of the resistor 36 supplied to the non-inverting input terminal of the operational amplifier 32. Therefore, the current of the current source 28 is changed by changing the voltage VR, and the voltage drop (reference voltage Vref) of the resistor 30 is also changed by changing the current, and the output current Iout is changed. The other operations of the current source circuit of FIG. 3 are the same as those of FIG.

【0018】[0018]

【発明の効果】上述の如く、本発明の電流源回路によれ
ば、出力電流を0からリニアに可変できる。また、出力
電流を発生する端子での最大出力電圧を高くして電源電
圧利用率を改善できる。
As described above, according to the current source circuit of the present invention, the output current can be changed linearly from zero. In addition, the maximum output voltage at the terminal generating the output current can be increased to improve the power supply voltage utilization rate.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の好適な実施例の回路図である。FIG. 1 is a circuit diagram of a preferred embodiment of the present invention.

【図2】図1の動作特性図である。FIG. 2 is an operation characteristic diagram of FIG.

【図3】本発明の好適な実施例の詳細な回路図である。FIG. 3 is a detailed circuit diagram of a preferred embodiment of the present invention.

【図4】従来の電流源回路の回路図である。FIG. 4 is a circuit diagram of a conventional current source circuit.

【図5】従来の他の電流源回路の回路図である。FIG. 5 is a circuit diagram of another conventional current source circuit.

【図6】図5の動作特性図である。6 is an operating characteristic diagram of FIG.

【符号の説明】[Explanation of symbols]

10 トランジスタ 12 抵抗器 14 第1演算増幅器 16 基準電圧手段 18 第2演算増幅器 10 Transistors 12 Resistors 14 First Operational Amplifiers 16 Reference Voltage Means 18 Second Operational Amplifiers

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 第1演算増幅器と、 放射電極が抵抗器の一端及び上記第1演算増幅器の反転
入力端に結合し、制御電極が上記第1演算増幅器の出力
端に結合したトランジスタと、 上記第1演算増幅器の非反転入力端及び上記抵抗器の他
端間に接続された基準電圧手段と、 出力端が上記抵抗器の他端に結合し、反転入力端が上記
トランジスタの放射電極に結合し、非反転入力端に所定
電圧を受ける第2演算増幅器とを具え、 上記トランジスタの収集電極から出力電流を得ることを
特徴とする電流源回路。
1. A first operational amplifier, a transistor having a radiation electrode coupled to one end of a resistor and an inverting input terminal of the first operational amplifier, and a control electrode coupled to an output terminal of the first operational amplifier; A reference voltage means connected between the non-inverting input of the first operational amplifier and the other end of the resistor, an output end coupled to the other end of the resistor, and an inverting input end coupled to the radiating electrode of the transistor. And a second operational amplifier that receives a predetermined voltage at the non-inverting input terminal, and obtains an output current from the collecting electrode of the transistor.
JP5894692A 1992-02-12 1992-02-12 Current source circuit Expired - Lifetime JPH0816854B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP5894692A JPH0816854B2 (en) 1992-02-12 1992-02-12 Current source circuit
US07/971,278 US5319303A (en) 1992-02-12 1992-11-14 Current source circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5894692A JPH0816854B2 (en) 1992-02-12 1992-02-12 Current source circuit

Publications (2)

Publication Number Publication Date
JPH0772939A true JPH0772939A (en) 1995-03-17
JPH0816854B2 JPH0816854B2 (en) 1996-02-21

Family

ID=13098999

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5894692A Expired - Lifetime JPH0816854B2 (en) 1992-02-12 1992-02-12 Current source circuit

Country Status (1)

Country Link
JP (1) JPH0816854B2 (en)

Also Published As

Publication number Publication date
JPH0816854B2 (en) 1996-02-21

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