KR830000469Y1 - Signal conversion circuit - Google Patents

Abstract

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Description

Signal conversion circuit

1 is a connection diagram of a signal conversion circuit according to the prior art.

2 is a connection diagram of a signal conversion circuit according to the present invention.

3 is a view showing an example in which the signal conversion circuit of FIG. 2 according to the present invention is used for a gain control circuit.

The present invention relates to a signal conversion circuit for converting a single ended input signal to a differential output signal.

Known signal conversion circuits of this kind supply a direct current bias to the bases of the pair of transistors constituting the differential amplifier, alternating one base of the transistors to ground, and applying a signal voltage to the other base of the transistors. The differential output is obtained from the collectors of these transistors. However, in such a known configuration, since a bias circuit is required, the circuit configuration is complicated and the power supply voltage cannot be effectively used.

Therefore, the circuit configuration of FIG. 1 according to the prior art which does not require a bias circuit and makes effective use of the power supply voltage is proposed.

In FIG. 1, a pair of diodes 1 and 2 connected in series are connected in parallel with a base-emitter circuit of the transistor 3 and another series circuit formed of the diode 4. In addition, a current source for generating a constant current is connected to a connection point between the base of the transistor 3 and the anode of the diode 1. Here, the current source means a circuit that generates a constant output current regardless of the load variation. Of course, the level of current generated from the current source is determined in accordance with various parameters, for example, can be controlled with appropriate control signals, adjustable circuit elements, etc. as required. A typical current source consists of a collector-emitter circuit of a biased transistor. The diode 4 is connected in parallel with the base-emitter circuit of the transistor 5. In addition, although not shown, a suitable operating source is provided to activate the current source and supply the operating voltage to the transistors 3 and 5.

The operation of the circuit shown in FIG. 1 will now be described. Assume that the current source supplies a constant current 2I ₀ , and also assume that the emitter regions of transistors 3, 5 and the equivalent emitter regions of diodes 1, 2, 4 have the same area. At this time, the voltage drop across the diodes and the base emitter voltage drops across the transistors are equal to V _be . Also, the base-emitter impedance of each transistor and diode impedance of each diode are the same.

In such a configuration, in the absence of an input signal, the current from the current source is equally distributed between the two paralleled series circuits. Thus, current I ₀ flows through diodes 1 and 2 and the same current I ₀ also flows through the collector-emitter circuit of transistor 3 and through diode 4.

Next, consider a case where the input signal i _s is supplied to the connection point of the emitter of the transistor 3 and the diode 4. In this case, assuming that the collector current of the transistor 3 changes to (I ₀ -i ₁ ), considering the Kirchhoff's law, the current I ₀ -i ₁ + i _s flows through the diode 4. Able to know. At this time, considering that the voltage across the diode 4 is equal to the emitter voltage of the transistor 5, it can be seen that the emitter current of the transistor 5 is equivalent to the current flowing through the diode (4). In this case, ignoring the base current of the transistor 5, it can be seen that the collector current of the transistor 5 becomes equal to the emitter current and also equal to the current flowing through the diode 4. In other words, it can be seen that the collector current of the transistor 5 becomes I ₀ -i ₁ + i _s .

In addition, the forward voltage drop between both ends of the diode 1 is the forward voltage drop between both ends of the V _be1 diode 2, the base-emitter voltage between both ends of the V _be2 transistor 3 is V _be3 , and the forward between both ends of the diode 4. The voltage drop is expressed as V _be4 . At this time, the relationship of (V _be1 + V _be2 ) = (V _be3 + V _be4 ) can be seen from the first road.

(k: Maltzmann constant, T: Kelvin absolute temperature, q: charge of electrons, I: current flowing through a diode or transistor, I _s : reverse saturation current), so that (V _be1 + V _be2 ) = (V _be3) From the relationship of + V _be4 )

From this relationship, I ₀ ² = (I ₀ -i ₁ ) (I ₀ -i ₁ + i _s ), Can be obtained. At this time, the The relationship of When the condition of is satisfied As shown in FIG. 1, the collector output current I ₀ -i ₁ of the transistor 3 is And the collector output current I ₀ -i ₁ + i _s of the transistor (5) It becomes

Therefore, as can be seen from the foregoing, the pair of differential output signals by the circuit of FIG. If the condition is not satisfied, it is distorted. Therefore, in order to solve such a problem, a current source generating a very large constant current I ₀ must be prepared, which is not feasible when the circuit of FIG. Also, optionally The signal current i _s must be limited to an extremely low value in order to satisfy the condition of, which is generally undesirable.

Therefore, the circuit of FIG. 2 according to the present invention has been proposed to solve this difficulty.

In FIG. 2, the first series circuit formed of the diodes 6 and 7 is coupled in parallel with the second series circuit formed of the collector-emitter circuits of the diode 10 and the transistor 9. The base-emitter circuit of the transistor 9 is connected in parallel with the diode 7. The current source 8 is connected to the connection points of the anodes of the diodes 6 and 10 to supply a constant current to the series circuits of the parallel connection. The current source 8 may be in the form described with respect to FIG.

The connection point of the diodes 6 and 7, that is, the connection point between the cathode of the diode 6 and the anode of the diode 7, is connected to the base of the transistor 9 and the base of the output transistor 12. If desired, other output transistors with base-emitter circuits connected in parallel with the base-emitter circuit of transistor 12 may be prepared, i.e., transistors as shown at 12 'in the figure. . However, only the single output transistor 12 is described here. The base of the further output transistor 13 is connected to the collector of the transistor 9 and also to the cathode of the diode 10. The transistor 13 has an emitter in common connection with the emitter of the transistor 9.

Those skilled in the art can see that diodes 6, 7 and 10 can be formed as a diode connected transistor in which the base and the collector are commonly connected as necessary. In addition, it can be seen that the illustrated circuit may be configured as an integrated circuit. Although this example is not shown, it is necessary to know that the power supply circuit is prepared to supply the operating potential to the transistors and the current source 8.

Assume that the emitter regions of transistors 9, 12, and 13 and the equivalent emitter regions of diodes 6, 7, and 10 are all equivalent, and the circuit is placed on a common semiconductor chip. Assume that it is configured as an integrated circuit. In this case, when no input signal is applied, the current from the current source 8 is distributed between the series circuits of the parallel connection. Thus, the currents for diodes 6 and 7 become I ₀ , and the current flowing through the collector-emitter circuits of diode 10 and transistor 9 also becomes I ₀ .

On the contrary, if the input signal i _s is applied to the connection of the diodes 6 and 7 to reduce the current flowing through the diode 6 to the level of I ₀ -i ₁ , according to Kirchhoff's law It can be seen that the current flowing through (7) becomes I ₀ -i ₁ + i _s . The base-emitter voltage of the transistor 9 is equal to the forward voltage intensity across the diode 7.

Thus, the emitter current of the transistor 9 is equivalent to the forward diode current I ₀ -i ₁ + i _s of the diode 7. At this time, if the base current of the transistor 13 is ignored, the current flowing through the diode 10 becomes I ₀ -i ₁ + i _s equivalent to the emitter current in the transistor 9. In this case, the base-emitter circuit of the transistor 12 is connected in parallel with the base-emitter circuit of the transistor 9 so that the emitter current of the transistor 12 is the emitter current I ₀ of the transistor 9. Equivalent to -i ₁ + i _s , where assuming that the base current of transistor 12 is ignored, the collector current of transistor 12 becomes I ₀ -i ₁ + i _{s, which} is equivalent to the emitter current. have. At this time, considering that the sum of the currents supplied from the current source 8 to the anodes of the diodes 6 and 10 is 2I ₀ , from the second degree, (I ₀ -i ₁ ) + (I ₀ -i ₁ + i _s ) = 2I ₀ , and from this relationship To find out. Thus, collector current I ₀ -i ₁ + i _s of transistor 12 is Becomes

In addition, since the series circuit of the base-emitter circuit of the diode 10 and the transistor 13 is connected in parallel to the series circuit of the diodes 6 and 7 in Fig. 2, (V _be6 + V _be7). You can see the relationship of ₌₌ (V _be10 + V _be13 ). If you apply the semiconductor theory applied to FIG. If we know the relationship of, and I _x from this relationship It can be seen that.

From the foregoing, the output current I _x of the transistor 13 is And output current I ₀ -i ₁ + i _s of transistor 12 is It can be seen that. That is, the circuit of FIG. 2 according to the present invention is a condition according to the prior art. As it is irrelevant to Even if is not established, the distortion is not generated in the differential output signal by the circuit of FIG. In this way, Since it is not necessary to satisfy the condition of, the current source 8 does not need to generate a large constant current. In addition, since the bias circuit is not required, the configuration can be simplified, the power supply can be effectively used, and a power supply circuit requiring only a relatively small operating potential can be used.

In addition, as shown in FIG. 2, a plurality of output take-out transistors having the same base as the transistor 12 and the base are provided. Although not shown in FIG. Even when a plurality of differential output currents are obtained by providing an output extracting transistor, the amplitudes of the differential output signals are not attenuated.

Therefore, the configuration of the present invention has an advantage that it is very useful even when one single-ended signal current is changed into a plurality of differential output currents.

3 shows a gain control circuit to which the signal conversion circuit according to the present invention is applied. The signal voltage source 14 is connected to the diodes 6 and 7 through the resistor 15 and the capacitor (not necessarily installed). It is connected to the connection point. The signal voltage Vi from the signal voltage source 14 is converted into the signal current Zi by the resistor 15 and the input impedance. The collector of one output transistor 12 of the signal conversion circuit is connected to the emitter of the transistor 17, and the collector of the other output transistor 13 is connected to the emitter of the transistor 18. A common bias voltage 19 is connected to the bases of the transistors 17 and 17.

A constant current source 22 of 2I ₁ is connected to the emitter common connection point of the differential amplifier composed of a pair of transistors 20 and 21. The base of transistor 20 is connected to the emitter of transistor 17, and the base of transistor 21 is connected to the emitter of transistor 18. Further, load resistors 23 and 24 are connected to the collectors of the transistors 20 and 21, respectively, and are derived as collectors or output terminals 25 of the transistors 21 and 21, respectively. Collector currents of transistors 12 and 13 And _Suppose that the collector currents of transistors 20 and 21 change to (I ₁ -I _X ) and (I ₁ + I _X ), respectively, and transistors 17, 18, 20, and ( the base of 21), assuming the voltage drop across the emitter to respective V _be17, V _be18, V _be20, V _be21 claim from 3 _{degrees, (V be17 + V be20)} = know the relationship between the (V _be18 + V _be21) Can be from this relationship If we get the relationship of and get i _x from this relationship to be. Therefore, when the value of the resistor 24 is set to R ₂₄ , the output voltage V ₀ is V ₀ = R _24. It can be seen that.

Meanwhile, input impedance Zi

In this case, If the input impedance Zi is Is simplified to

(here, Re is the emitter resistance of the transistor transistors).

At this time, if the value of the resistor 15 is set to R ₁₅ , the signal current i _s is Since the output voltage V ₀ is It becomes

Therefore, the expression of the output voltage V ₀ As can be seen clearly from the above, gain control, i.e., of the output signal voltage V ₀ , can be done by changing one or both of the current sources 8 and 22 and thus changing the magnitude of I ₀ or I ₁ . There is an advantage that each of the current source (8), (22) used in the gain control circuit of Figure 3 can be simply configured with a resistor having a relatively high resistance value, as can be seen from Figure 3, the signal according to the present invention By using a change circuit, the single-ended input signal is converted into a pair of differential output signals, which eliminates the need for a bias voltage and a bias voltage network, so that a simple circuit configuration and a relatively inexpensive power supply circuit can be used. There is an advantage that no high operating voltage is required to provide. In addition, the denominator of the gain determination formula (16) is a parameter As can be seen from the above, when the present invention is applied to a gain control circuit, the influence of the emitter resistance re on the gain control is reduced, i.e. It can be seen that.

Modifications of the present invention are possible without departing from the spirit and scope of the present invention. By way of example, the diodes used in the embodiments may be formed of diode-connected transistors, and may take any suitable form in which the transistors can be operated in the manner described above. In addition, embodiments of the present invention may be configured as an integrated circuit.

Claims (1)

In the signal conversion circuit, a first series circuit composed of the diodes 6 and 7 and a second series circuit composed of the collector-emitter circuits of the diode 10 and the transistor 9 are connected in parallel. The current source 8 is connected to the connection point of the diodes 6 and 10 so that a constant current is supplied to the first series circuit and the second series circuit, and the base-emitter circuit of the diode 7 and the transistor are connected in parallel. The base of the transistor 9 is connected to the connection point of the diodes 6 and 10 so as to be connected, and the signal source 11 for supplying the signal current is connected to the connection point of the diodes 6 and 11. And the output transistors 12 and 13 for outputting a pair of differential signals which are a function of the signal supplied from the signal source 11, and the connection points of the diodes 6 and 7 and the collector of the transistor 9 And a signal conversion circuit configured to be connected to each other.