JPH0767021B2 - Semiconductor element cooling structure - Google Patents

Semiconductor element cooling structure

Info

Publication number
JPH0767021B2
JPH0767021B2 JP63098723A JP9872388A JPH0767021B2 JP H0767021 B2 JPH0767021 B2 JP H0767021B2 JP 63098723 A JP63098723 A JP 63098723A JP 9872388 A JP9872388 A JP 9872388A JP H0767021 B2 JPH0767021 B2 JP H0767021B2
Authority
JP
Japan
Prior art keywords
semiconductor element
plate
cooling
cooling structure
heat conducting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63098723A
Other languages
Japanese (ja)
Other versions
JPH01270298A (en
Inventor
眞二 峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63098723A priority Critical patent/JPH0767021B2/en
Publication of JPH01270298A publication Critical patent/JPH01270298A/en
Publication of JPH0767021B2 publication Critical patent/JPH0767021B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電子機器装置に使用される半導体素子を搭載
したパッケージの冷却方式に関し、特に単体当りの発熱
量は低いが搭載数が多いCMOS・RAM等の半導体素子の冷
却構造に関する。
Description: TECHNICAL FIELD The present invention relates to a cooling method for a package in which a semiconductor element used in an electronic device is mounted, and in particular, a CMOS having a low heat generation amount per unit but a large number mounted. -Relating to the cooling structure of semiconductor elements such as RAM.

〔従来の技術〕[Conventional technology]

一般に電子機器装置の一部を構成する記憶装置に使用さ
れるパッケージ上には、CMOS・RAM等のメモリ系とその
制御系から成る多種類の半導体素子が多数搭載されてい
る。近年に於けるこれらの半導体素子そのものの集積度
の向上と、パッケージの大型化及びパッケージ当りの搭
載素子数の増大は、半導体素子の実装密度を飛躍的に向
上させた反面、半導体素子の増大した総発熱量に対す
る、より高性能かつ高効率的な冷却技術の開発競争に拍
車をかけている。
In general, a large number of semiconductor elements of various types including a memory system such as CMOS / RAM and a control system thereof are mounted on a package used for a storage device which constitutes a part of an electronic device. In recent years, the improvement in the degree of integration of these semiconductor elements themselves, the increase in the size of the package, and the increase in the number of mounted elements per package have dramatically improved the mounting density of the semiconductor elements, while the number of semiconductor elements has increased. It is accelerating the race to develop more efficient and efficient cooling technology for the total calorific value.

冷却技術開発の流れは、自然空冷、強制空冷、空気流路
に冷媒を介在させる間接水冷、伝導水冷方式、浸漬方式
と進んできた。なお後者の方式になる程、コスト面では
不利であるが高い冷却能力が得られる。前述した記憶装
置に於いては、特に大型機の分野では制御系の半導体素
子の発熱量はもはや強制空冷の限界を越えたため、半導
体素子の発熱面を冷媒流路を有するコールドプレートに
熱的に結合させる伝導冷却方式に代表される水冷方式の
採用が活発である。
The development of cooling technology has proceeded to natural air cooling, forced air cooling, indirect water cooling with a refrigerant intervening in the air flow path, conduction water cooling method, and immersion method. It should be noted that the latter method provides a higher cooling capacity although it is disadvantageous in terms of cost. In the storage device described above, especially in the field of large machines, the heat generation amount of the semiconductor element of the control system has already exceeded the limit of forced air cooling, so that the heat generation surface of the semiconductor element is thermally converted into a cold plate having a coolant flow path. The water-cooling method, which is represented by the conduction cooling method to be combined, is actively used.

水冷方式は、外部に冷水供給装置を必要とするものの、
強制空冷に於けるようなファンや空気取入口及び吐出口
等の空気流路を確保する必要がないため、実装形態の自
由度が大きい。また騒音規制を気にする必要もない。一
方、個々の発熱量が低く、パッケージ当りの搭載数が多
いメモリ系の半導体素子の冷却方式は、強制空冷方式が
効率面で最も適している。
The water cooling method requires an external cold water supply device,
Since it is not necessary to secure an air flow path such as a fan, an air intake port, and a discharge port in the case of forced air cooling, there is a large degree of freedom in mounting form. There is no need to worry about noise regulations. On the other hand, the forced air cooling method is the most suitable in terms of efficiency as the cooling method for the semiconductor elements of the memory system in which the heat generation amount of each individual is low and the number of mounted devices per package is large.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

上述の如く水冷方式、空冷方式いずれも利点、欠点があ
るが、制御系、メモリ系半導体素子を含む電子機器にお
いて制御系の半導体素子用の水冷方式とメモリ系の半導
体素子用の強制空冷方式を混在させるのは、上述した水
冷方式の利点を失わせる結果となる。そこで、ハッケー
ジ内に持ち込まれた水路の有効利用を図るためにもメモ
リ系の半導体素子に適した水冷方式による冷却構造が要
望されている。
As described above, both the water-cooling method and the air-cooling method have advantages and disadvantages. However, in electronic devices including control-system and memory-type semiconductor elements, the water-cooling method for the control-system semiconductor element and the forced air-cooling method for the memory-type semiconductor element are used. Mixing results in the loss of the advantages of the water cooling system described above. Therefore, there is a demand for a cooling structure by a water cooling method suitable for a semiconductor element of a memory system in order to effectively use a water channel brought into the package.

〔課題を解決するための手段〕[Means for Solving the Problems]

本発明に係る半導体素子の冷却構造は、プリント板と、
複数の半導体素子を搭載し前記プリント板に列設された
複数のマルチチップパッケージ(MCP)と、冷媒流路を
有するコールドプレートと、それぞれの間に前記マルチ
チップパッケージそれぞれが位置するように列設され前
記コールドプレートと熱的に結合した複数の熱伝導板
と、前記熱伝導板と前記マルチチップパッケージとの間
に設けられ前記熱伝導板と前記マルチチップパッケージ
に互いに押し合う力を与える板バネとを含んで構成され
る。
A semiconductor element cooling structure according to the present invention includes a printed board,
A plurality of multi-chip packages (MCP) mounted with a plurality of semiconductor elements arranged in a row on the printed board, a cold plate having a coolant flow path, and a plurality of multi-chip packages arranged so that the multi-chip packages are located between them. A plurality of heat conducting plates thermally coupled to the cold plate, and a leaf spring provided between the heat conducting plate and the multi-chip package for giving a force to press the heat conducting plate and the multi-chip package against each other. It is configured to include and.

〔実施例〕〔Example〕

次に、本発明を図面を参照して実施例につき説明する。 Next, the present invention will be described by way of examples with reference to the drawings.

第1図は本発明の一実施例を示すパッケージの正面図で
ある。第2図は第1図に於けるA−A線断面図である。
FIG. 1 is a front view of a package showing an embodiment of the present invention. FIG. 2 is a sectional view taken along the line AA in FIG.

第1図,第2図に於いてプリント配線板1上には制御系
半導体素子8が中央部に、その上下にはメモリ系半導体
素子9を両面に搭載したDIP型の長板状MCP2が列設され
ている(図中、11はMCP2の信号ピン)。長板状MCP2の片
面に対しては、同様に列設された長板状熱伝導板3がク
ールシート(添加物により熱伝導性を改善したシリコン
ゴム製のシート)10を介して半導体素子9に接触してお
り、長板状熱伝導板3はさらに水流7が通るパイプが設
けられたコールドプレート5にロウ付等によって熱的に
結合されている。尚、コールドプレート5は便宜的に発
熱量の高い制御系半導体素子8の冷却用としても示して
ある。
In FIGS. 1 and 2, on the printed wiring board 1, a control system semiconductor element 8 is arranged in the center, and above and below the memory system semiconductor element 9 are mounted DIP type long plate-shaped MCPs 2 on both sides. It is installed (11 in the figure is the signal pin of MCP2). On one side of the long plate-shaped MCP 2, the long plate-shaped heat conduction plates 3 arranged in the same manner are provided with a semiconductor element 9 through a cool sheet (sheet made of silicon rubber whose heat conductivity is improved by an additive) 10. , And the long plate-shaped heat conduction plate 3 is further thermally coupled to the cold plate 5 provided with the pipe through which the water flow 7 passes by brazing or the like. Note that the cold plate 5 is also shown for cooling the control system semiconductor element 8 having a high heat generation amount for convenience.

長板状MCP2のもう一方の面に搭載された半導体素子9も
クールシート10及び板バネ4を介して長板状熱伝導板3
に熱的に接触している。板バネ4は、長板状熱伝導板3
と長板状MCP2が互いに押し合うような力を与え、長板状
熱伝導板3と長板状MCP2をクールシート10(および板バ
ネ4)を介して互いに密着させている。半導体素子9が
発生する熱は、素子ケースの放熱面、クールシート10
(および板バネ4)、長板状熱伝導板3、コールドプレ
ート5の順に達し、コールドプレート5に設けられたパ
イプ内を流れる水流7によってパッケージ外へ持ち去ら
れる。
The semiconductor element 9 mounted on the other surface of the long plate-shaped MCP 2 also has the long plate-shaped heat conduction plate 3 through the cool sheet 10 and the plate spring 4.
Is in thermal contact with. The leaf spring 4 is a long plate-shaped heat conduction plate 3
And the long plate-shaped MCP2 are pressed against each other, and the long plate-shaped heat conduction plate 3 and the long plate-shaped MCP2 are brought into close contact with each other via the cool sheet 10 (and the plate spring 4). The heat generated by the semiconductor element 9 is generated by the heat dissipation surface of the element case and the cool sheet 10.
(And the leaf spring 4), the long plate-shaped heat conduction plate 3, and the cold plate 5 are reached in this order, and are carried out of the package by the water flow 7 flowing in the pipe provided in the cold plate 5.

なお、第1図の6はコネクタを示す。また、長板状MCP2
は片面に半導体素子を搭載したSIP型でも構わない。ま
たクールシート10の代わりに熱伝導性に優れたコンパウ
ンドを使用しても良い。
In addition, 6 in FIG. 1 shows a connector. Also, long plate-shaped MCP2
May be a SIP type with a semiconductor element mounted on one side. Further, instead of the cool sheet 10, a compound having excellent thermal conductivity may be used.

いずれにしろ、本実施例は、半導体素子の実装高さのバ
ラツキをある程度吸収でき、しかも廉価に構成できる。
In any case, this embodiment can absorb variations in the mounting height of the semiconductor element to some extent and can be constructed at a low cost.

〔発明の効果〕〔The invention's effect〕

以上説明した様に本発明は、発熱体である半導体素子を
設けたMCPをコールドプレートに結合した熱伝導板の間
に配置し、板バネによりMCPを(クールシート、板バネ
を介して)熱伝導板に密着させることにより、個々の発
熱量は低いが搭載数の多いメモリ系の半導体素子の冷却
を水冷方式で効率よく実現できる。これによって実装形
態の自由度を拡げることができる利点がある。
As described above, according to the present invention, the MCP provided with the semiconductor element, which is a heating element, is arranged between the heat conduction plates coupled to the cold plate, and the MCP is provided by the leaf spring (via the cool sheet or the leaf spring). By closely contacting with each other, it is possible to efficiently cool a semiconductor element of a memory system, which has a low heat generation amount but has a large number of mounted elements, by a water cooling method. This has the advantage that the degree of freedom of the mounting form can be expanded.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の正面図、第2図は第1図に
示すA−A断面図である。 1……プリント配線板、2……長板状MCP、3……長板
状熱伝導板、4……板バネ、5……コールドプレート、
6……コネクタ、7……水流、8……制御系半導体素
子、9……メモリ系半導体素子、10……クールシート、
11……信号ピン。
FIG. 1 is a front view of an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line AA shown in FIG. 1 ... Printed wiring board, 2 ... Long plate-shaped MCP, 3 ... Long plate-shaped heat conduction plate, 4 ... Leaf spring, 5 ... Cold plate,
6 ... Connector, 7 ... Water flow, 8 ... Control system semiconductor element, 9 ... Memory system semiconductor element, 10 ... Cool sheet,
11 …… Signal pin.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】プリント板と、複数の半導体素子を搭載し
前記プリント板に列設された複数のマルチチップパッケ
ージと、冷媒流路を有するコールドプレートと、それぞ
れの間に前記マルチチップパッケージそれぞれが位置す
るように列設され前記コールドプレートと熱的に結合し
た複数の熱伝導板と、前記熱伝導板と前記マルチチップ
パッケージとの間に設けられ前記熱伝導板と前記マルチ
チップパッケージに互いに押し合う力を与える板バネと
を含むことを特徴とする半導体素子の冷却構造。
1. A printed circuit board, a plurality of multi-chip packages on which a plurality of semiconductor elements are mounted and arranged in a row on the printed circuit board, a cold plate having a coolant channel, and the multi-chip package respectively interposed therebetween. A plurality of heat conducting plates arranged in a row and thermally coupled to the cold plate, and provided between the heat conducting plate and the multi-chip package and pressed against each other by the heat conducting plate and the multi-chip package. A cooling structure for a semiconductor device, comprising: a leaf spring that applies a matching force.
JP63098723A 1988-04-20 1988-04-20 Semiconductor element cooling structure Expired - Lifetime JPH0767021B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63098723A JPH0767021B2 (en) 1988-04-20 1988-04-20 Semiconductor element cooling structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63098723A JPH0767021B2 (en) 1988-04-20 1988-04-20 Semiconductor element cooling structure

Publications (2)

Publication Number Publication Date
JPH01270298A JPH01270298A (en) 1989-10-27
JPH0767021B2 true JPH0767021B2 (en) 1995-07-19

Family

ID=14227439

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63098723A Expired - Lifetime JPH0767021B2 (en) 1988-04-20 1988-04-20 Semiconductor element cooling structure

Country Status (1)

Country Link
JP (1) JPH0767021B2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009230505A (en) * 2008-03-24 2009-10-08 Fujitsu Ltd Board unit and electronic apparatus
JP5047095B2 (en) * 2008-08-07 2012-10-10 株式会社日立製作所 Electronics
CN102782837B (en) * 2010-03-08 2015-08-12 国际商业机器公司 Liquid double in-line memory module cooling device
JP5953734B2 (en) * 2011-12-20 2016-07-20 富士通株式会社 Heatsinks, stacked electronic devices, and electronic equipment.
US8659897B2 (en) 2012-01-27 2014-02-25 International Business Machines Corporation Liquid-cooled memory system having one cooling pipe per pair of DIMMs
WO2013175616A1 (en) * 2012-05-24 2013-11-28 富士通株式会社 Cooling structure for card-type electronic component, and electronic apparatus
JP6021170B2 (en) * 2012-05-28 2016-11-09 Necプラットフォームズ株式会社 Cooling system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6172895U (en) * 1984-10-18 1986-05-17

Also Published As

Publication number Publication date
JPH01270298A (en) 1989-10-27

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