JPH0756893B2 - Method of manufacturing radiation resistant MIS type semiconductor integrated circuit - Google Patents

Description

The present invention relates to a method for manufacturing a radiation-resistant MIS semiconductor integrated circuit, and more particularly to a method for reducing leakage current in an element isolation region.

[Conventional technology]

In general, when an nMOS transistor is exposed to ionizing radiation such as an electron beam, a proton beam, or a γ-ray, electron-hole pairs are generated in the gate oxide film, and the holes are trapped in a trap in the oxide film to generate positive ions. Since the charge is accumulated as fixed charges, the threshold voltage shifts in the negative direction. It is said that the variation is proportional to the gate oxide film thickness to the first to third powers, and it is known that the greater the film thickness, the greater the variation. Therefore, at the field oxide film normally used for element isolation, the threshold voltage shift of the parasitically formed MOS structure becomes extremely large because the field oxide film is thick. For example, for a thickness of 500 nm, 10 ⁵ rad (S
The absorbed dose of i) changes by several tens of volts. As a result, after the exposure of the initial parasitic MOS isolation breakdown voltage of the transistor is about 20V there be 10 ₅ rad (Si) becomes less 0V,
The leakage current between elements increases and it becomes unusable as an LSI.

A MOS transistor described in the specification of Japanese Patent Application No. 5411 in 1985 is one of the measures that has been taken as a countermeasure against this problem. As shown in FIG. 3, the isolation region is expanded to a region where the oxide film is thin in order to increase the element isolation breakdown voltage. The field oxide film end (A) is spaced from the active region side to the source region. -The drain region 6 is formed. Further, on the surface of the silicon substrate between the end of the field oxide film and the source / drain region 6, a relatively high concentration p-type impurity layer 5 is formed to increase the isolation breakdown voltage, and the threshold voltage is increased to increase the leakage between the elements. Preventing current.

A method of manufacturing the structure of FIG. 3 is shown in FIG. First, after forming the field oxide film 2 by the selective oxidation method (FIG. 9A), the p layer 5 which is an inter-element leakage current prevention layer is formed by ion implantation around the active region in contact with the edge of the field oxide film. It is formed by implanting boron (Fig. (B)),
Further, after the gate electrode 4 is formed in the active region, the n ⁺ layer 6 serving as the source / drain region is formed at a position separated by d from the end of the field oxide film by using the ion implantation method (FIG. 7C). ). This distance d needs to be set so that the width of the leakage prevention layer (5) becomes a certain amount or more in order to secure the effect of preventing the leakage current, but if it is selected too large, the integration degree will be deteriorated, so that it is usually about 2 μm. I am using. Also,
The leakage prevention layer (5) and the n ⁺ layer 6 in the source / drain regions may not be in contact with each other, but in order to prevent the integration degree from being deteriorated, the leakage prevention layer (5) has to be formed in a contact position.

[Problems to be Solved by the Invention]

In the conventional method for manufacturing a radiation-resistant MIS type semiconductor integrated circuit described above, a p-layer is formed in the element formation region between the field oxide film edge and the source / drain region in order to suppress the leakage current between the elements after exposure to radiation. It has a forming process. To improve radiation resistance, it is desirable to increase the concentration of the p-layer, but as described above, the n ⁺ layers of the source and drain of the p-layer are in contact with each other at the boundary, so if the concentration is too high, the junction breakdown voltage decreases. . By the way, the upper limit concentration is about 10
It is about ¹⁷ cm ^-3 .

As a result, there is a drawback that the prevention of leakage current between elements by the conventional manufacturing method is not perfect, and a large improvement in radiation resistance cannot be expected.

[Means for Solving the Problems]

A method of manufacturing a radiation resistant MIS type semiconductor integrated circuit according to the present invention comprises a step of forming an element isolation oxide film by a selective oxidation method, and an element formation region partitioned by the element isolation oxide film.
After the gate electrode of the MIS transistor and the drain / source regions are formed, a high concentration p-type region is formed at least under the bird's beak portion of the inter-element isolation oxide film by selectively performing ion implantation of p-type impurities. And a step of introducing impurities into the entire surface of the element isolation oxide film.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

1A to 1C are sectional views of semiconductor chips arranged in the order of steps for explaining the first embodiment of the present invention.

First, the field oxide film 102 (inter-element isolation oxide film) is formed by using the selective oxidation method, and the source / drain region (106) is separated from the field oxide film by about 1 to 2 μm in the element formation region partitioned by the field oxide film. The transistor is formed so as to come to the open position ((a) in the same figure). Then, a pattern is formed with an ion implantation mask material (I / I mask material 108) such as aluminum so as to cover all but the surface of the field oxide film. After that, extremely high concentration (eg 10 ¹⁵
The field oxide film 102 formed by the selective oxidation method is converted into boron glass (BSG) by ion-implanting boron (a dose of up to 10 ¹⁶ pieces / cm ² ), and at the same time, under the inclined portion (bird's beak portion) of the end of the field oxide film. A high-concentration p ⁺ layer 110 is formed on the surface of the p-type silicon substrate 101 (FIG. 3B). At this time, the thickness of the portion of the BSG film 109 is determined to some extent by controlling the implantation energy. Although it is desirable that all the field oxide films be BSG films, this is not necessary. Then, the I / I mask material 108 is removed to obtain the structure shown in FIG. When the field oxide film in the element isolation region becomes BSG, electron-hole pairs generated during radiation exposure in the BSG film-formed region are both trapped in a large amount of traps in the film and become electrically neutral. Therefore, it is equivalent to reducing the generation region of electron-hole pairs by the amount of the BSG film. Therefore, as described above, the shift of the threshold voltage of the parasitic MOS structure becomes small because the effective oxide film thickness decreases. Fig. 5 shows an example of improved radiation resistance. ΔVFB
Is the shift amount of the flat band voltage of the MOS structure. BSG
A significant decrease in ΔVFB is seen by forming a film.

In addition to the effect that the field oxide film becomes a BSG film, in the structure of FIG. 1 (c), an extremely high concentration p ⁺ region 110 is formed on the surface of the p-type silicon substrate below the bird's beak portion, and the concentration is 10 ¹⁹ to It is as high as 10 ²⁰ cm ^-3 (since it hardly penetrates into the element formation region side, separation from the n ⁺ layer 106 does not reduce the degree of integration). Therefore, the effect of preventing inter-element leakage current after radiation exposure is much greater than that of the p-layer described in the conventional structure of FIG.

FIGS. 2A to 2C are cross-sectional views of semiconductor chips arranged in the order of steps for explaining the second embodiment of the present invention.

In this embodiment, the present invention is applied to the manufacture of a complementary MOS semiconductor integrated circuit. First, an n well 211 is formed on a p-type silicon substrate 201, and then a field oxide film 202 is formed by using a selective oxidation method. After, the gate electrode 2 of the transistor
04-1 and 2-4-2 are formed. Subsequently, the source / drain region 206 of the nMOS transistor is formed apart from the element isolation region to obtain the structure of FIG. Next, the field oxide film is formed into a BSG film in the same manner as in the above-described embodiment, but the ion implantation mask material 208 at this time covers the portion other than the field oxide film only on the side where the nMOS transistor is formed.
Then, ion implantation of p-type impurities such as boron is performed to form a field oxide film as a BSG film, a high-concentration p ⁺ region 210 under the bird's beak, and a pMOS as shown in FIG.
The source / drain regions 212 of the transistor are formed simultaneously. Then, the mask material is removed to obtain the structure shown in FIG. After that, the integrated circuit device may be formed by using a normal process. In this way, the field oxide BSG
The patterning process for forming a film can be shared with the patterning process for forming the source / drain regions of the pMOS transistor, and a CMOS integrated circuit excellent in radiation resistance can be formed with the same number of patterning times as the conventional one.

It should be noted that the above description is an example of the complementary MOS device using the p-type silicon substrate and the n-well, but it is clear that the same can be applied to the p-type silicon substrate, the n-well and the p-well system. The same applies to complementary MOS devices formed on an epitaxial substrate or an insulating substrate.

〔The invention's effect〕

As described above, according to the present invention, the radiation resistance of the field region is enhanced by introducing an extremely high concentration of p-type impurities into the field oxide film region formed in advance by the selective oxidation method, and at the same time, the substrate surface under the bird's beak is highly protected. It is possible to manufacture a radiation resistant MIS type semiconductor device in which a p ⁺ layer of high concentration is formed, the element isolation breakdown voltage is significantly increased, and the synergistic effect of them can almost completely suppress the interelement leakage current after radiation exposure. is there.

[Brief description of drawings]

1 (a) to 1 (c) are sectional views of semiconductor chips arranged in the order of steps used for explaining the first embodiment of the present invention, and FIGS. 2 (a) to 2 (c) are second embodiment of the present invention. Sectional views of semiconductor chips arranged in the order of steps used for explaining the embodiments, FIG. 3 is a sectional view of a semiconductor chip having a conventional radiation-resistant nMOS transistor, and FIGS. 4A to 4D are conventional sectional views. FIG. 5 is a sectional view of a semiconductor chip arranged in the order of steps for explaining a method of manufacturing a radiation type nMOS transistor, and FIG. 5 is a characteristic diagram showing radiation resistance characteristics of a thermal oxide film and a BSG film. 1,101,201 …… P-type silicon substrate, 2,102,202 …… Field oxide film, 3,103,203 …… Gate oxide film, 4,104,204−
1,204-2 ...... n ⁺ layer, 7-1,7-2,108,208 …… ion implantation mask material, 109,209 …… BSG film, 110,210 …… p ⁺ layer, 211
... n well.

Claims (1)

[Claims] 1. A step of forming an element isolation oxide film on a surface of a semiconductor substrate by a selective oxidation method, and a step of forming an n-channel MIS transistor having a p-type surface in an element formation region partitioned by the element isolation oxide film. After forming a drain / source region which is separated from the element isolation oxide film in the region, the entire surface of the n-channel MIS transistor forming region is covered with an ion implantation mask, and then p-type impurity ions are implanted. As a result, the p-type impurity is introduced into the entire surface of the inter-element isolation oxide film that defines the formation of the n-channel MIS transistor region and the semiconductor substrate region under the bird's beak portion, and the drain / source is introduced into the semiconductor substrate region under the bird's beak portion. Radiation-resistant MIS-type semiconductor, characterized in that it has a step of forming a high-concentration p-type region separated from the region. Method for producing a product circuit.