JPH02153571A - Manufacture of radiation-resistant mis type semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To almost eliminate inter-element leakage currents by a method wherein not only a p-type high concentration impurity is introduced into a field oxide film region to improve the field region in radiation resistance but also a high concentration p<+>-layer is formed on the substrate surface under bird's beaks to improve an element isolation dielectric strength. CONSTITUTION:A field oxide film 102 is formed through a selective oxidation, and a transistor is formed on a demarcated element forming region so as to position source and drain regions 106 apart from the field oxide film by 1-2mum. In succession, a pattern is formed of an ion implantation mask material of Al or the like to cover the whole face excluding the surface of the field oxide film. Then, high concentration B ions are implanted into the whole face to turn the film 102 into a borosilicate glass BSG, and a high concentration p<+>-layer 110 is formed on the surface of a p-type Si 101 under the bird's beak located at the end of the field oxide film. In succession, the ion implantation I/I mask material 108 is removed. By this setup, the field region can be improved in radiation resistance, and concurrently a high concentration p<+>-layer is formed on the surface of the substrate under bird's beaks to remarkably improve an element isolation dielectric strength, so that inter-element leakage currents can be restrained by the synergetic effect of the dielectric strength and the radiation resistance both improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a radiation-resistant MIS type semiconductor integrated circuit, and particularly to a method of reducing leakage current in an element isolation region.

[Conventional technology]

In general, when an nMO3) transistor is irradiated with ionizing radiation such as an electron beam, a proton beam, or 2γ rays, electrons are generated in the gate oxide film.
A phenomenon occurs in which hole pairs are generated, and the holes are captured by traps in the oxide film and accumulated as positive fixed charges, causing the threshold voltage to shift in the negative direction. It is said that the amount of variation is proportional to the first to third power of the thickness of the gate oxide film, and it is known that the thicker the film, the larger the amount of variation. Therefore, in the field oxide film normally used for isolation between elements, MO3 is formed parasitically.
The threshold voltage shift of the structure is extremely large due to the thickness of the field oxide.9 For example, in the case of 500 nm thickness,
An absorbed dose of 0' rad (Si) results in fluctuations of several tens of volts. As a result, even if the element isolation voltage of the initial parasitic MOS transistor is about 20V, the voltage of 10' rad (Si
) after being exposed to radiation, it becomes less than 0■, and the leakage current between elements increases, making it unusable as an LSI.

As a conventional measure against this problem, there is a MOS transistor described in the specification of Patent Application No. 5411 of 1985. As shown in Figure 3, in order to increase the element isolation breakdown voltage, the isolation region is expanded to a thin oxide film region, and the source is placed at a distance from the field oxide film edge (A) toward the active region. - Forms the drain region 6. Furthermore, a relatively high concentration p-type impurity layer 5 is formed on the silicon substrate surface between the edge of the field oxide film and the source train region 6 in order to increase the isolation voltage, thereby increasing the threshold voltage and reducing the leakage between elements. Prevents electric current.

The manufacturing method of the structure shown in FIG. 3 is shown in FIG. 4. First, a field oxide film 2 is formed by a selective oxidation method.
), the 9-layer 5 which is an inter-element leakage current prevention layer is formed by implanting boron into the periphery of the active region in contact with the edge of the field oxide film using an ion implantation method (Figure (b)), and the gate electrode 4 is also formed. After forming the n+ layer 6 in the active region, the n+ layer 6, which will become the source/drain region, is placed d from the edge of the field oxide film.
This distance d is set so that the width of the leakage prevention layer (5) is at least a certain level in order to ensure the leakage current prevention effect. However, if it is too large, the degree of integration will deteriorate, so it is usually about 2 μm. Further, although the leakage prevention layer (5) and the n'' M6 of the source/drain region do not have to be in contact with each other, they must be formed in a position where they are in contact with each other in order not to deteriorate the degree of integration.

[Problem to be solved by the invention]

In the conventional method for manufacturing radiation-resistant MIS type semiconductor integrated circuits described above, nine layers are formed in the element formation region between the edge of the field oxide film and the source/drain region in order to suppress leakage current between elements after exposure to radiation. It has a process of forming. In order to improve the radiation resistance, it is desirable to increase the concentration of PM, but as mentioned above, the source/drain n+ layers of the pJI are in contact with the boundary, so if the concentration is increased too high, the junction breakdown voltage will decrease. Incidentally, its upper limit concentration is about 101 cm-'.

As a result, leakage current between elements cannot be completely prevented by the conventional manufacturing method, and there is a drawback that a significant improvement in radiation resistance cannot be expected.

[Means to solve the problem]

The method for manufacturing a radiation-resistant MIS type semiconductor integrated circuit of the present invention includes a step of forming an isolation oxide film between elements by a selective oxidation method, and a step of forming an isolation oxide film between elements using a selective oxidation method. By selectively implanting p-type impurity ions after forming the gate electrode and drain/source regions, a highly concentrated p-type region is formed at least under the bird's beak of the device isolation oxide film, and at the same time, device isolation is achieved. This method includes a step of introducing impurities into the entire surface of the oxide film.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(c) are cross-sectional views of semiconductor chips arranged in the order of steps for explaining the first embodiment of the present invention.

First, a field oxide film 102 (element isolation oxide film) is formed using a selective oxidation method, and the source/drain regions (106) are separated from the field oxide film by about 1 to 2 μm in the element formation region partitioned by the field oxide film. A transistor is formed so as to be located at the same position (FIG. 2(a)). Next, an ion implantation mask material such as aluminum (I/I mask material 108) is applied so as to cover all but the surface of the field oxide film.
) to form a pattern. After that, extremely high concentration (
For example, 1015 to 1016 boron ions/d are implanted to transform the field oxide film 102 formed by selective oxidation into boron glass (BSG), and at the same time under the sloped part (bird's beak part) at the end of the field oxide film. A highly concentrated p+ layer 110 is formed on the surface of the p-type silicon substrate 101 (FIG. 2(b)). At this time, the thickness of the BSG film 109 can be controlled to some extent by controlling the implantation energy. . Although it is desirable that all the field oxide films be BSG films, this need not be the case. Then I/I
The mask material 108 is removed to obtain the structure shown in FIG. 3(c). When the field oxide film in the element isolation region becomes BSG, the BS
In the G film region, the electron-hole pairs generated during radiation exposure are captured by the traps that exist in large quantities in the film, making them electrically neutral. This is equivalent to a reduction in the area where pairs occur. Therefore, as described above, the shift in threshold voltage of the parasitic MOS structure is reduced because the effective oxide film thickness is reduced. Figure 5 shows an example of improved radiation resistance.
is the shift amount of the flat band voltage of the MO3 structure.

A significant decrease in ΔVFB is seen by forming a BSG film.

In addition to the effect of converting the field oxide film into a BSG film, the
In the structure c), an extremely highly concentrated p1 region 110 is formed on the surface of the p-type silicon substrate under the bird's beak portion, and its concentration is as high as 1Q19~1020Rho3 (it hardly penetrates into the element forming region side). Therefore, separation from the n+ layer 106 does not result in a decrease in drug loading), therefore, the third
The effect of preventing leakage current between elements after exposure to radiation is much greater than that of the nine layers described in the conventional structure shown in the figure.

FIGS. 2(a) to 2(c) are cross-sectional views of semiconductor chips arranged in the order of steps for explaining a second embodiment of the present invention.

In this embodiment, the present invention is applied to the manufacture of a complementary MO3 semiconductor integrated circuit, in which an n-well 211 is first formed on a p-type silicon substrate 201, and then a field oxide film 202 is formed using a selective oxidation method. After that, gate electrodes 204-1 and 204-2 of the transistor are formed. followed by n
The source/drain region 206 of the Mo5 transistor is formed apart from the element isolation region to obtain the structure shown in FIG.
Next, the field oxide film is converted into a BSG film in the same manner as in the previous embodiment, but the ion implantation mask material 208 at this time is n
MOS) Cover only the side where the transistor is to be formed except for the field oxide film. Subsequently, ion implantation of p-type impurities such as boron is performed, and as shown in FIG. 3(b), the field oxide film is changed to a BSG film, a highly concentrated p+ region 210 is formed under the bird's beak, and the source and region of the pMOS transistor are The drain region 212 is formed at the same time. Thereafter, the mask material is removed to obtain the structure shown in FIG. 3(c). Thereafter, an integrated circuit device may be formed using normal processes. In this way, the patterning process for converting the field oxide film into a BSG film can be shared with the patterning process for forming the source/drain regions of the PMOS transistor, and a CMO3 integrated circuit with excellent radiation resistance can be produced with the same number of patterning steps as before. Can be formed.

Although the above is an example of a complementary MOS device using a p-type silicon substrate and an n-well, it is clear that it can be similarly applied to a p-type silicon substrate, n-well, and p-well system. be.

The same applies to complementary MOS devices formed on epitaxial substrates and insulating substrates.

〔Effect of the invention〕

As explained above, in the present invention, by introducing an extremely high concentration of p-type impurity into the field oxide film region formed in advance by selective oxidation method, the radiation resistance of the field region is improved, and at the same time, the radiation resistance of the field region is increased. concentration p+
This has the effect of manufacturing a radiation-resistant MIS type semiconductor device that can substantially completely suppress leakage current between elements after exposure to radiation by forming layers to significantly increase element isolation withstand voltage, and by their synergistic effect.

[Brief explanation of the drawing]

FIGS. 1(a) to (c) are cross-sectional views of semiconductor chips arranged in the order of steps used to explain the first embodiment of the present invention, and FIGS. 3 is a sectional view of a semiconductor chip having a conventional radiation-resistant nMOS transistor, and FIGS. Radiation resistance n
FIG. 5 is a cross-sectional view of a semiconductor chip arranged in the order of steps to explain the manufacturing method of a transistor (MOS) transistor, and FIG. 5 is a characteristic diagram showing the radiation resistance characteristics of a thermal oxide film and a BSG film. 1,101,201...P-type silicon substrate, 2°10
2.202...Field oxide film, 3,103.20
3... Gate oxide film, 4,104,204-1,20
4-2...B+ layer, 7-1.7-2°108.208
...Ion implantation mask material, 109°209...BS
G film, 110, 210...p+ layer, 211n well.

Claims (1)

[Claims] A step of forming an inter-element isolation oxide film using a selective oxidation method;
MI is placed in the element formation region partitioned by the element isolation oxide film.
By selectively implanting p-type impurity ions after forming the gate electrode, drain and source regions of the S transistor, a highly concentrated p-type region is simultaneously formed at least under the bird's beak of the element isolation oxide film. A method for manufacturing a radiation-resistant MIS type semiconductor integrated circuit, comprising the step of introducing impurities into the entire surface of an element isolation oxide film.