JPH0756886A - Parallel control system based on petri net - Google Patents

Abstract

PURPOSE:To make an ignition check even when there are many nesting structure. CONSTITUTION:An ignition circuit in an execution order controller 503 which controls a state check device 502 which monitors the execution state of a processor in the hierarchical order description is provided with an input place discrimination means 101 which stores the information on the input place to be connected to the transition, output place discrimination means 102 which stores the information of the output place to be connected to the transition, token state storage/updating means 103 storing and updating the state of the token of the place by hierarchy, TST token injection means 104 injecting the token of the place into the token state storage/updating means of each hierarchy, selection means 107 selecting one of plural token state storage/updating means, chip select means 105 selecting the execution order controller, output control means 108 making the output of the execution order controller valid or invalid, and logic arithmetic means 106 discriminating whether or not the ignition is enabled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a parallel execution sequence control system for parallel processing in which a plurality of program modules (units of data processing such as tasks, subroutines, statements, functions, etc.) are processed simultaneously by a plurality of processors. .

[0002]

2. Description of the Related Art A conventional parallel control system using a Petri net will be described with reference to FIGS. FIG. 5 shows a parallel control system, which includes a plurality of processors PE (501).
, A state check device CCM (502) and an execution order control device NCE (503). Each PE has a memory that can be locally accessed, and a plurality of program modules to be processed are stored in the memory.

The Petri net graph is formally defined as follows.

[0004]

[Equation 1]

FIG. 6A is an example of a Petri net graph. Applying the above definition to Fig. 6 (a) as an example, the result is as follows.

[0006]

[Equation 2]

A program module to be processed by the processor is assigned to each of the places p1 to p4, and when the place gets a token, the processor starts the processing of the program module.

The Petri net graph describing the state transition of the program module is converted into a tabular form, and FCT (Fi
re Condition Table), TTT (Token Transfer Tabl)
e) is stored in the register in the NCE.

FCT represents the state of the output transition connected to the place, and when the graph of FIG. 6 (a) is expressed, it becomes a table as shown in FIG. 6 (b). TTT represents the state of the output place connected to the transition, and when the graph of FIG. 6 (a) is expressed, it becomes a table as shown in FIG. 6 (c).

The token representing the state of the Petri net is TST (Toke
n Status Table) (103). TST is NC
It is a register in E, 1 bit is allocated for each place, and "1" is stored with a token and "0" is stored without a token.

The NCE refers to FCT, TTT and TST to fire a transition that can be fired. Firing is to remove the token from the input place and distribute the token to the output place when the token is contained in all the input places of the transition (in this case, to activate the program module of the output place). Means

The place where the token should be distributed is obtained from TTT. When the tokens are distributed, the distributed places start the processing of the program module. The NCE writes the number of the place to be processed by firing the transition in the EXQ (Excution Queue) (504) in the CCM. The plurality of PEs read the place numbers in the EXQ while competing with each other, and process the corresponding program modules. When the processing is completed, the place number is written in the EDQ (EnD Queue) (505) in the CCM. The NCE extracts the place number in the EDQ and sets the corresponding TST bit to "1".

The NCE and each PE operate independently with the CCM as an interface. The NCE writes the place number corresponding to the processable program module in EXQ according to the description of the Petri net graph.

On the other hand, the PE reads the place number from the EXQ and processes the program module corresponding thereto, so that the program modules can operate in parallel as many as the PEs.

The NCE performs the firing check only when the state of the token changes, that is, when a bit is written to TST, and the firing checking transition is an arc from the place where the token is distributed. Is a growing transition. In this way, the parallel processing described by the Petri net is executed and controlled.

The firing logic circuit for checking whether firing is possible will be described below. The firing logic circuit is prepared in the NCE, and is composed of three registers, an input place discriminating means (IT), an output place discriminating means (OT) and TST, and a logical operation unit.

IT is a register showing the connection information of the input place for each transition, which can be created by referring to the FCT, and the input place connected to the transition is represented by "1" and not connected. Is represented by "0".

The IT of the Petri net graph of FIG. 6 (a) is
It is represented as shown in FIG. OT is a register showing the connection information of the output place for each transition, and can be created by referring to TTT. The output place connected to the transition is represented by "1", and the one not connected is "0". 'Is represented.

The OT of the Petri net graph of FIG. 6 (a) is
It is represented as shown in FIG. When the firing logic receives the number of the transition in the NCE where the place containing the new token is the input place, the transition can be fired using the information (TST, IT, OT) stored in the NCE. Check whether or not.

Whether or not there is a token in all input places. At this time, the safety of the net is also checked. Net safety means that no more than one token can fit in a place.

Specifically, it means that the transition cannot be fired while the token is in the output place. Therefore, not only the token of the input place of the transition is checked, but also the token of the output place is checked. When it becomes possible to fire with the above checks, the transition is fired, the tokens of all the places on the input side disappear, and the tokens enter in all the places of the output side.

As a result, the TST is updated. Firing / update logic Place finite set P = {p1, p2, ---, pi, ----, pm
} (1 ≦ i ≦ m) Finite set of transitions T = {t1, t2, ---, tj, ---
-, tn} (1≤j≤n) TST register TST = (tst (p1), tst (p2),-
---, tst (pm)) IT register of transition tj = (it (tj, 1), it (tj,
2), ----, it (tj, m)) Transition tj OT register = (ot (tj, 1), ot (tj,
2), ----, ot (tj, m)), the condition for transition tj to be fired is

[0023]

[Equation 3]

FIG. 7 shows a firing logic circuit when the number of places = 4 and the number of transitions = 2, and FIG. 8 shows a TST updating circuit. The following description will be given using the Petri net graph of FIG.

In FIG. 7, the transition number is IT
When input to, the connection information of the input place connected to that transition is output. If t1 is entered as the transition number, only it (t1,1) will be "1".
Only the inverter INV4 becomes "0", and all the other inverters become "1". If the token exists only in the place p1, tst (p1) in the TST output
Only "1" becomes and other outputs become "0". As a result, the outputs of the OR gates are all "1", the output of AND4 which is the input condition is "1", and the input condition can be fired.

Similarly, when the transition number is input to the OT, the connection information of the output place connected to the transition is output. When t1 is input as the transition number, only ot (t1,2) and ot (t1,3) are '1'.
Becomes Also, since the token exists only in p1, tst (p2) and tst (p3) become "0", all the outputs of the NAND gate become "1", and the output of AND5 becomes "1". Can also be fired. As a result, AND6
Becomes 1 and the transition t1 can be fired.

FIG. 8 shows an inverted IT output and T
The logical product of the outputs of ST is stored in TST. Since the token exists only in p1, TS
Of the output of T, only tst (p1) becomes "1", and all others become "0". Moreover, only it (t1,1) in IT becomes "1", and all others become "0". And IN of the inverter
Only the output of V5 becomes "0", and the other inverters become "1". As a result, the outputs of the AND gates are all "0", which means that the token of p1 has been deleted.

In FIG. 9, the logical sum of the output of OT and the output of TST is calculated and stored in TST. When the transition number 1 is input to the OT, only ot (t1,2) and ot (t1,3) become "1", and the outputs of other OTs become "0".
The output of TST is tst (p2) and tst (p3) are "0", the output of OR6 and OR7 is "1", and TS
In T, “1” is stored in the bits corresponding to place 2 and place 3. As a result, tokens have been injected into places 2 and 3. It does not affect the bits other than the place 2 and the place 3.

There are two cases in which the transition cannot be fired despite the change in the TST state. First, when some of the input places do not contain tokens.

In this case, there is no problem because the firing can be determined by the firing check when the tokens are distributed to the remaining input places. The other is when there are all tokens in the input place, but there are also tokens in the output place. It must wait until there are no tokens in the output place. Also, it must be able to ignite as soon as it disappears. However, since the table FCT in which the Petri net description is used draws the transition for firing check from the input place, it is difficult to subtract the transition for firing check based on the number of the place from the change in the output place.

Therefore, the firing check of the transition may be repeated using one of the input places until the output place becomes empty. However, once a token is inserted, it may affect the firing of other transitions, so this token is forcibly deleted and its place number is set to E.
I'll switch back to DQ. In this case, the NCE considers that the processing of the program module of the place is completed, and sets the bit of the place of TST to "1".

As a result, the place number goes back and forth between NCE and EDQ and the firing check is repeated until the output place becomes empty. Further, the Petri net graph can be nested so as to have modularity.
The function will be described below with reference to FIGS.

FIG. 10 shows a Petri net graph having a nested structure. The Petri netgraph information stored in a table format in the storage unit in the NCE is called a net program.
To make the net program modular, N
The CE can make a subnet call (subroutine call). That is, one subnet can be treated as one place. The nets at the center and right side of FIG. 10 (a) are subnets.
The places p3 and p7 are called call places, and unlike conventional places (hereinafter called normal places, which are places to which program modules are assigned), no program modules are assigned.
As a place that gives the start and end points of the subnet,
There are places called Start Place and End Place.

Places p1, p5, p9 in FIG. 10 (a)
Are start places, and program modules may or may not be allocated.
The places p4, p8, and p12 in FIG. 10A are end places, and no program module is assigned.

When a token enters the call place due to a transition firing, control transfers to the subnet.
Then, when the token is put in the end place of the subnet, the control returns to the original net. NCE is FCT,
It has a PAT (Place attribute table) in addition to the TTT.
The PAT of the graph of FIG. 10 (a) is shown in FIG. 10 (b).

With this table, the NCE can refer to the place attribute (normal place, start place, end place, call place) from the place number. When the NCE learns the number of the place to be executed next due to the firing of the transition, the PAT
Is used to know the attribute of the place, and processing is performed according to the attribute. In the PAT, where the attribute is call place, the start place number of the subnet is also stored.

When the control is transferred to the subnet by the call place, the NCE internally generates a number called a tag as an identifier for each net. This is because the net program is a parallel program, and thus multiple call places that call the same subnet may be activated. Further, since the NCE holds the parent-child relationship of the nest structure of the subnet, the tag numbers are stored in the form of a list.

This list is called a tag list and is placed in NCE. The tag list of the graph in FIG.
Shown in (c). The tag number of the calling source and the call place number are held simultaneously in the tag list. Also, when the place number to be executed next is written in EXQ due to the firing of the transition, the tag number is also written together. It should be noted that the tag number "0" is always given to the net program (main net) which is first executed after the initialization of the entire system.

When the tag is introduced, the TST in the firing circuit stores the calling TST in order to save it.
Separate tags are required for each tag number. Therefore, when checking the firing in the firing circuit, the required TST is selected and used by using the tag number.

The TS when the transition is fired
T is updated only for the TST selected by the tag number. Furthermore, when NCE reads out the tag number and place number of the place program that ended from EDQ,
The token injection to TST is the TST selected by the tag number.
Do against.

11 to 13 show a firing logic circuit, a TST update circuit, and a TST token injection circuit that can handle the number of tags = 4. Hereinafter, description will be given using the graph of FIG. When the transition t1 fires, tokens are injected into place 2 and place 3. When NCE learns that p2 is a normal place by PAT, EX
The place number 2 and the tag number 0 (indicating the main net) are written in Q. When the place 3 knows that it is a call place by referring to the PAT (subnet call), the NCE generates a new tag number (here, the tag number 1 is generated, and the tag number of the calling source is 0).
Then, the tag number 0 is added to the tag list together with the call place number 3 (see FIG. 10 (c)).

Then, using the tag number 1, the TST corresponding to the tag number 1 in the firing circuit is selected, and after initialization, the start place number 5 that can be known from the PAT is newly generated tag number. Write to EXQ with 1. When the processor finishes the processing of the program module 5 (when there is the program module in the place 5), the token is injected into the place 5 and it is checked whether or not the transition 3 can be fired.

At this time, in the firing circuit of FIG. 11, the TST corresponding to the tag number 1 is selected by the selector and the same processing as the firing logic described in FIG. 7 is performed. or,
In the TST update circuit of FIG. 12, the TST corresponding to the tag number 1 is selected by the selector, and the TST described in FIG.
Exactly the same as the update of ST is performed.

Further, in the TST token injection circuit of FIG. 13, the TST corresponding to the tag number 1 is selected by the selector, and the same operation as the token injection described in FIG. 9 is performed.

When the transition 3 is fired, the attributes of the place 6 and the place 7 are checked by referring to the PAT, and when it is found that the place 7 is the call place, the same processing as in the case of the place 3 is performed. At this time, the tag number 2 is generated, the TST corresponding to the tag number 2 is initialized, and the tag number 1 and the call place number 7 are stored in the tag list (see FIG. 10 (c)).

The TST is the TST corresponding to the tag number 2.
Is used. The same processing is performed thereafter and places 9 to 1 are performed.
After the end of the process of 1, if the transition 6 can be fired, it fires.

When the PAT knows that the place 12 is the end place, the tag number 1 and the call place number 7 of the calling source are read from the tag list, the token is injected into the call place 7, and the TST has the tag number 1 Return to TST corresponding to. Then, it is checked whether or not the transition 4 can be ignited. If the transition 4 can be ignited, the same operation as described above is performed and the control is transferred to the main net.

Further, when the PAT in the main net knows that the place to be executed next is the end place, all controls are stopped (finished).

[0049]

In the conventional device, when the ignition circuit is implemented as hardware to form a functional memory, 1
Nesting (number of tags) was limited because there was a limit to the number of gates that could be placed on a chip. To control a net program with many nested structures, a separate TST is required for each nest, increasing the number of registers required,
This is because a large number of gates is required accordingly. That is,
The conventional device has a problem that the number of tags is limited and a net program having many nested structures cannot be controlled.

An object of the present invention is to provide an ignition check circuit which enables expansion of the number of tags and can realize the required number of tags by cascade connection.

[0051]

FIG. 1 is a block diagram of the present invention. The input place discriminating means (101) stores the contents of IT, which is the state of the input place connected to the transition, and is composed of a memory, a latch circuit, an F / F circuit and the like.

The output place discriminating means (102) stores the contents of the OT which is the state of the output place connected to the transition, and is composed of a memory, a latch circuit, an F / F circuit and the like.

The token state storing / updating means (103) stores the token state of each place, and when firing occurs, the token state of the place related to the firing is updated. Also, one token state storing / updating means is allocated to each layer of the hierarchical structure,
It is composed of a logic gate, a memory, a latch circuit, an F / F circuit and the like.

The TST token injecting means (104) is for injecting a token into each token state storing / updating means, and is composed of a logic gate or the like. The selection means (107)
This is for selecting one from a plurality of token state storing / updating means, and is constituted by a selector or the like.

The chip select means (105) is for selecting the execution order control device, and is for selecting one of the plurality of execution order control means and making the chip effective. , A logic gate and the like.

The logical operation means (106) is for determining whether or not the designated transition can be fired, and is composed of a logic gate or the like. Output control means (108)
Is for enabling / disabling the output from the execution order control device, and is constituted by a logic gate or the like.

[0057]

When the transition firing is checked, the token state storing / updating means corresponding to the tag number in the chip is switched by the selecting means according to the lower bit of the tag number and is input to the logical operation circuit for checking. To do. At this time, the upper bit of the tag number is input to the external decoder to determine which chip is to be sectioned. The selected chip validates the output from the logical operation circuit by the output control means and invalidates the output from the logical operation circuit of another chip. And externally,
By taking the logical product of each logical operation result,
Whether or not it is possible to ignite is decided.

Similarly, when the TST token is updated, 1 is set by the chip select signal generated externally.
One chip is selected, and the token state storing / updating means corresponding to the tag number in the chip is switched by the selecting means by the lower bit of the tag number to update the state of the token. For tokens that are not selected, no token state storage / update means are updated.

Similarly, when injecting a token into TST, 1 is set by a chip select signal generated externally.
One chip is selected, and the token state storing / updating means corresponding to the tag number in the chip is switched by the selecting means by the lower bit of the tag number to inject the token. For unselected chips,
No token state storage / update means will change the state of the token.

[0060]

FIG. 2 shows a firing logic circuit when the number of tags = 8 is expanded by cascade connection of two chips.

If chip 1 is selected by the external decoder (201) that receives the upper bits of the tag number, only the input of the inverter INV1 becomes "1" and the input of the inverter of chip 2 becomes "0". Becomes

The lower bits of the tag number are input inside the chip, and the selector (107) switches which tag number corresponds to which TST (103) is selected.
Then, the IT (101) and the OT (102) are input to the firing logic, and the firing check is performed by the same method as described in FIG. The output of the firing logic is input to OR1. Since the output "0" of INV1 is input to the other input, the output of the firing logic is output as it is to the outside. Further, the output of the chip 2 is the default value "1" output by OR, and the external AND1 outputs the output from the chip 1 as it is.

FIG. 3 shows a TST updating circuit when the number of tags = 8 is expanded by cascade connection of two chips. An external decoder (2
If the chip 1 is selected by 01), only the input of the inverter INV2 becomes "1" and the input of the inverter of chip 2 becomes "0".

The lower bits of the tag number are input inside the chip, and the selector (107) switches which tag number corresponds to which TST (103) is selected.
Since the output of INV2 is “0”, the output of OR2 is the same as the output of INV3. Therefore,
For the TST selected by the decoder (301), see FIG.
The TST is updated in exactly the same manner as described above.

Further, since the output of the OR of the chip 2 is "1", the output of the selector is directly input to the TST, so that the TST is not updated. FIG. 4 shows a TST token injection circuit when the number of tags = 8 is expanded by cascade connection of two chips.

If chip 1 is selected by the external decoder (201) which inputs the upper bits of the tag number, only the output on the chip 1 side becomes "1" and the output on the chip 2 side becomes "0". Becomes

The lower bits of the tag number are input inside the chip, and the selector (107) switches which tag number corresponds to which TST (103) is selected.
Since the input of the decoder of AND3 is "1", the output of AND3 is the same as the output of OT. Therefore, a token is injected into the TST selected by the decoder (301) in exactly the same manner as described in FIG. Further, since the output of the AND of the chip 2 is "0", the output of the selector is directly input to the TST, so that the token is not injected into the TST.

[0068]

According to the present invention, the number of tags can be expanded, and it is possible to provide a firing logic circuit, a TST update circuit, and a TST token injection circuit having a required number of tags by cascade connection. And it became possible to apply it to the graph representation of a model with many nested structures.

[Brief description of drawings]

FIG. 1 is a logical block diagram of a parallel control system of the present invention.

FIG. 2 is a firing logic circuit of the present invention.

FIG. 3 is a TST update circuit of the present invention.

FIG. 4 is a TST token injection circuit of the present invention.

FIG. 5 is a configuration diagram of a parallel control system.

6A is an example of a Petri net graph, and FIG.
Is the FCT of the Petri net graph, (c) is the TTT of the Petri net graph, (d) is the IT of the Petri net graph, and (e) is the OT of the Petri net graph.

FIG. 7 is a conventional firing logic circuit.

FIG. 8 is a conventional TST update circuit.

FIG. 9 is a conventional TST token injection circuit.

FIG. 10 is an example of a Petri net graph having a nest structure.

FIG. 11 is a firing logic circuit incorporating a conventional tag.

FIG. 12 is a TST update circuit incorporating a conventional tag.

FIG. 13 is a TST token injection circuit incorporating a conventional tag.

[Explanation of symbols]

 101 Input Place Discrimination Means 102 Output Place Discrimination Means 103 Token State Storage / Update Means 104 TST Token Injection Means 105 Chip Select Means 106 Logic Operation Means 107 Selection Means 108 Output Control Means 501 Processor 502 State Check Device 503 Execution Sequence Control Device 504 Excution Queue 505 End Queue

Claims (1)

[Claims] 1. A plurality of processors (501) each having a memory capable of independently performing different processing and having internal or external local access, and an execution state of the processor (501). A status check device (502) for monitoring, the processor (501) and the status check device (502)
Execution order control device (5
03), and a multiprocessor parallel control system including: an input place determination means (101) for storing information of an input place connected to the transition, and an output connected to the transition, in the execution sequence control device (503). The output place determination means (102) for storing the place information, the plurality of token state storage / update means (103) for storing / updating the state of the place token for each layer, and the injection of the place token are respectively A TST token injecting means (104) capable of performing the token state storing / updating means of a hierarchy; a selecting means (107) selecting one from the plurality of token state storing / updating means; Chip select means (105) for selecting the execution order control device (503), and output control means for enabling / disabling the output of the execution order control device (503) A parallel control system based on a Petri net, comprising: (108); and a logic operation unit (106) for determining whether or not a fire is possible.