JPH0752727B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention has a structure in which a metal silicide layer is attached to a semiconductor substrate or semiconductor layer made of silicon as an electrode layer, a wiring layer, a resistance layer, or the like. The present invention relates to an improvement in manufacturing method of semiconductor devices.

[Prior Art] Conventionally, various semiconductor devices having a structure in which a metal silicide layer is provided as an electrode layer, a wiring layer, a resistance layer, or the like on a semiconductor substrate or semiconductor layer made of silicon have been proposed.

As a method of manufacturing a semiconductor device having such a configuration, the method described below with reference to FIG. 3 has been conventionally proposed. However, FIG. 3 shows a case where the semiconductor device is applied to the case where it is manufactured as having a PN junction element.

That is, a semiconductor substrate 1 made of silicon and having, for example, P type is prepared in advance (FIG. 3A), and the semiconductor substrate 1 is prepared.
An insulating layer 2 having a window 3 for exposing it to the outside and made of, for example, silicon oxide is formed thereon (FIG. 3B).

Next, in a region of the insulating layer 2 facing the window 3 on the front surface side of the semiconductor substrate 1 by the process of introducing an N-type impurity into the semiconductor substrate 1 using the insulating layer 2 having the window 3 as a mask, The N-type semiconductor layer 4 is formed (FIG. 3C). In this case, the semiconductor layer 4 is formed such that the outer peripheral edge thereof is located below the insulating layer 2 because the N-type impurities diffuse laterally.

Next, on the semiconductor substrate 1, the region of the insulating layer 2 that faces the window 3, that is, the region of the semiconductor layer 4 that faces the window 3 and the insulating layer 2 are continuously extended, and, for example, molybdenum, titanium, tantalum, A metal layer 5 made of a metal such as tungsten is formed (FIG. 3D).

Next, by heat treatment, the metal layer 5 is caused to react with the semiconductor layer 4 in the region of the insulating layer 2 facing the window 3, and the metal forming the metal layer 5 and the silicon forming the semiconductor layer 4 are made to react with each other. A metal silicide layer 6 is formed (FIG. 3E).

Next, the semiconductor layer 4 of the metal layer 5 is etched by etching.
The region that has not reacted with is removed from the semiconductor substrate 1 (FIG. 3F).

As described above, a PN junction element having the P-type semiconductor substrate 1, the N-type semiconductor layer 4 formed on the surface side thereof, and the metal silicide layer 6 continuous as an electrode on the semiconductor layer 4 is formed. A semiconductor device having the same is manufactured.

According to the manufacturing method of the semiconductor device described above, the metal silicide layer 6 connected to the semiconductor layer 4 as an electrode is used as a mask, and the insulating layer 2 having the window 3 used when the semiconductor layer 4 is formed on the semiconductor substrate 1 is used as a mask. Since it can be formed by utilizing it, the metal silicide layer 6 can be easily formed.

Further, since the metal silicide layer 6 can be formed to extend over the entire region of the semiconductor layer 4 except for a small region extending under the insulating layer 2, the semiconductor device can be formed as follows.
The semiconductor layer 4 is characterized in that it can be manufactured as being effectively led to the outside through the metal silicide layer 6.

[Problems to be Solved by the Invention] However, in the above-described conventional method for manufacturing a semiconductor device, stress is generated in the formation of the metal silicide layer 6, and the stress causes the metal silicide layer 6 to As shown in FIGS. 3E and 3F, when the semiconductor layer 1 is formed in a wavy shape and the semiconductor layer 1 is formed shallowly, the metal silicide layer 6 thereby forms a PN junction between the semiconductor substrate 1 and the semiconductor layer 4. There was a risk of being formed so as to be short-circuited.

Further, when the metal silicide layer 6 is formed, the silicon forming the semiconductor layer 4 diffuses into the metal layer 5 in the surface direction thereof, so that the metal silicide layer 6 is formed extending over the insulating layer 2. Therefore, there is a defect that the PN junction element is formed to occupy a large area by this amount.

Therefore, the present invention proposes a novel method for manufacturing a semiconductor device which does not have the above-mentioned fears or drawbacks.

[Means for Solving the Problems] As in the case of the conventional semiconductor device manufacturing method described above with reference to FIG. 3, the semiconductor device manufacturing method according to the present invention is carried out on a semiconductor substrate or semiconductor layer made of silicon. A step of forming an insulating layer having a window that exposes the substrate or the semiconductor layer to the outside, and a metal that continuously extends over the semiconductor substrate or the semiconductor layer, the region of the insulating layer that faces the window, and the insulating layer. By the process of forming the layer and the heat treatment,
The metal layer is reacted with the semiconductor substrate or the semiconductor layer in a region of the insulating layer facing the window, and the metal layer is formed on the surface side of the region of the semiconductor substrate or the semiconductor layer facing the window of the insulating layer. A step of forming a metal silicide layer of the metal being formed and the silicon constituting the semiconductor substrate or the semiconductor layer, and a region of the metal layer which has not reacted with the semiconductor substrate or the semiconductor layer by etching treatment, A step of removing from the semiconductor substrate or the semiconductor layer.

However, the method for producing a semiconductor device according to the present invention is the same as the method for producing a semiconductor device, wherein the metal layer is a laminate including a metal layer and a metal oxide layer formed thereon, or a metal containing oxygen. Formed as a layer, and also
In the step of forming the metal silicide layer by the heat treatment, the heat treatment is performed (i) on the metal layer.
In a state where the heat resistant layer is formed, and (ii) the metal oxide layer of the laminate or the oxygen is included in the metal layer formed of the laminate or the metal layer containing oxygen. This is performed by forming a barrier barrier that prevents lateral diffusion of silicon from the semiconductor substrate or the semiconductor layer by oxygen or metal oxide from the metal layer.

[Operation / Effect] According to the method of manufacturing a semiconductor device of the present invention, as in the case of the conventional method of manufacturing a semiconductor device described above with reference to FIG.
It can be easily formed by using an insulating layer having a window that exposes the semiconductor substrate or the semiconductor layer to the outside as a mask, and a metal silicide layer is extended below the insulating layer of the semiconductor substrate or the semiconductor layer. Since the semiconductor device can be formed to extend over the entire area except a small area, the semiconductor device is manufactured so that the semiconductor substrate or the semiconductor layer is effectively led out through the metal silicide layer. be able to.

However, according to the method for manufacturing a semiconductor device of the present invention, in the step of forming the metal silicide layer by the heat treatment, the heat treatment is performed in the state where the heat resistant layer is formed on the metal layer. Even if stress is generated in the metal silicide layer due to the stress, the metal silicide layer is substantially blocked by the heat-resistant layer, so that the metal silicide layer is corrugated. Practically none.

According to the method for manufacturing a semiconductor device of the present invention, the metal layer is a laminate having a metal layer and a metal oxide layer formed thereon or a metal layer containing oxygen, and the heat treatment is performed by heat treatment. In the step of forming the metal silicide layer, the heat treatment is performed on the metal oxide layer or the metal layer containing oxygen in the metal oxide layer or the metal layer containing oxygen in the metal layer including the metal layer containing oxygen or the metal layer containing oxygen. Since the oxide forms a barrier barrier that prevents lateral diffusion of silicon from the semiconductor substrate or the semiconductor layer, the metal silicide layer substantially extends over the insulating layer. Not in

Therefore, according to the method of manufacturing a semiconductor device of the present invention,
It does not have the fears or drawbacks of the conventional method of manufacturing a semiconductor device described above.

Example 1 Next, with reference to FIG. 1, an example of a semiconductor device according to the present invention applied when manufacturing a semiconductor device having a PN junction element will be described.

In FIG. 1, parts corresponding to those in FIG. 3 are designated by the same reference numerals, and detailed description thereof will be omitted.

In the embodiment of the method for manufacturing a semiconductor device according to the present invention shown in FIG. 1, a semiconductor device having a PN junction element similar to that described in FIG. 3 is manufactured by taking the following steps.

That is, as described above with reference to FIG. 3A, a semiconductor substrate 1 made of silicon and having, for example, a P-type is prepared in advance (FIG. 1A), and the semiconductor substrate 1 is described above with reference to FIG. 3B. Similarly, the insulating layer 2 having a window 3 for exposing the semiconductor substrate 1 to the outside and made of, for example, silicon oxide is formed (FIG. 1B).

Next, in the same manner as described above with reference to FIG. 3C, the N-type impurity is introduced into the semiconductor substrate 1 by using the insulating layer 2 having the window 3 as a mask. In the region of the insulating layer 2 facing the window 3, the N-type semiconductor layer 4 whose outer peripheral edge is located under the insulating layer 2 is formed (first
(Figure C).

Next, on the semiconductor substrate 1, the region of the insulating layer 2 that faces the window 3, that is, the region of the semiconductor layer 4 that faces the window 3 and the insulating layer 2 are continuously extended and are, for example, molybdenum, titanium, tantalum, or tungsten. A metal layer 5 made of a metal such as a metal layer 7 and a metal oxide layer 8 made of an oxide of a metal that constitutes the metal layer 7 are laminated in that order. It is formed by known means (first
(Figure D). In this case, the metal oxide layer 8 of the metal layer 5 may be formed by natural oxidation of the surface of the metal layer 7.

Next, a heat-resistant layer 9 made of phosphorus glass (PSG), silicon oxide (SiO ₂ ), silicon nitride (SiN ₄ ) or the like is formed on the metal layer 5 by a method known per se such as a CVD method. It is formed (Fig. 1E).

Then, as described above in FIG. 3E, by heat treatment,
The metal layer 5 is reacted with the semiconductor layer 4 in a region of the insulating layer 2 facing the window 3 to form a metal silicide layer 6 of the metal forming the metal layer 5 and the silicon forming the semiconductor layer 4. (Fig. 1F).

In this case, the reaction of the metal layer 5 with the semiconductor layer 4 is mainly performed between the metal layer 7 and the semiconductor layer 4 which form the metal layer 5, and therefore the metal silicide layer 6 is mainly charged with the metal layer 7. The metal silicide layer 6 is formed by the metal forming the metal layer and the silicon forming the semiconductor layer 4, and the metal silicide layer 6 is formed in a state in which the heat resistant layer 9 is formed on the metal layer 5. To be done. Therefore, the metal silicide layer 6
Even if a stress is generated in the formation of the metal silicide layer and the stress causes the metal silicide layer 6 to undulate, it is blocked by the heat resistant layer 9, so that the metal silicide layer 6 is formed as shown in FIG. It is substantially not wavy as described above in E.

Further, when the metal silicide layer 6 is formed, oxygen or metal oxide diffuses from the metal oxide layer 8 forming the metal layer 5 into the metal layer 7, and the oxygen or metal oxide causes In the metal layer 7, a barrier barrier for preventing lateral diffusion of the silicon constituting the semiconductor layer 4 from the semiconductor layer 4 is formed, as indicated by reference numeral 10, so that the metal silicide layer 6 is formed. As described above with reference to FIG. 3E, the insulating layer 2 is not substantially extended and formed. In this case, the heat-resistant layer 9 effectively prevents the oxygen or metal oxide from the metal oxide layer 8 from diffusing out, so that the barrier barrier described above is effectively formed, and The effect of not forming the metal silicide layer 6 extending over the insulating layer 2 is remarkably obtained.

Next, the heat resistant layer 9 is removed from the semiconductor substrate 1 by a known etching process per se, and then the region of the metal layer 5 which has not reacted with the semiconductor layer 4 is removed (FIG. 1G). .

As described above, the PN junction element having the P-type semiconductor substrate 1, the N-type semiconductor layer 4 formed on the surface side thereof, and the metal silicide layer 6 connected to the semiconductor layer 4 as an electrode is formed. A semiconductor device having the same is manufactured.

The above is the first embodiment of the method for manufacturing a semiconductor device according to the present invention.

According to such a method for manufacturing a semiconductor device according to the present invention, as in the case of the conventional method for manufacturing a semiconductor device described above with reference to FIG. The metal silicide layer 6 can be easily formed because the insulating layer 2 having the window 3 used when forming the semiconductor layer 4 can be formed as a mask.

Further, since the metal silicide layer 6 can be formed to extend over the entire region of the semiconductor layer 4 except for a small region extending under the insulating layer 2, the semiconductor device can be formed as follows.
The semiconductor layer 4 can be manufactured so as to be effectively led out through the metal silicide layer 6.

Further, as described above, the metal silicide layer 6 is not substantially formed in a wavy shape and is substantially not formed so as to extend onto the insulating layer 2. The semiconductor device can be easily manufactured without the above-mentioned fears and drawbacks of the conventional method for manufacturing the semiconductor device shown in FIG.

Example 2 Next, with reference to FIG. 2, an example of a semiconductor device according to the present invention, which is applied when manufacturing a semiconductor device having a MIS field effect transistor, will be described.

2, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

In the embodiment of the method for manufacturing a semiconductor device according to the present invention shown in FIG. 2, a semiconductor device having a MIS field effect transistor is manufactured by taking the following sequential steps.

As described above with reference to FIG. 1A, a semiconductor substrate 1 made of silicon and having, for example, P-type is prepared in advance (FIG. 2A), and a window for exposing the semiconductor substrate 1 to the outside is provided on the semiconductor substrate 1.
An insulating layer 21 having a relatively large thickness as an element isolation insulating layer made of, for example, silicon oxide, and extending over the entire region of the insulating layer 21 of the semiconductor substrate 1 facing the window 22. The insulating layer 23 having a relatively thin thickness as a gate insulating layer, and the insulating layer 23 so as to divide the insulating layer 23 into two.
A conductive layer 24 made of polycrystalline silicon and extending from above to the insulating layer 21 is formed by a method known per se (FIG. 2B).

Next, by using the insulating layer 21 having the window 22 and the conductive layer 24 as a mask, an N-type impurity is introduced into the semiconductor substrate 1, and the insulating layer 23 below the insulating layer 23 is formed on the surface side of the semiconductor substrate 1. N-type semiconductor layers 25 and 26, which respectively act as a source region and a drain region, are formed on both sides of the conductive layer 24 when viewed from above in the region by a method known per se (FIG. 2). C). In this case, the semiconductor layer 25
And 26 are formed so that the outer peripheral edges thereof are located under the insulating layer 21 for a part thereof and under the conductive layer 24 for the other part thereof due to the lateral spread of the N-type impurities.

Next, on the semiconductor substrate 1, an insulating layer 27 made of, for example, silicon oxide (SiO ₂ ) extending continuously covering the insulating layers 21 and 23 and the conductive layer 24 is formed by a CVD method or the like. It is formed by a known method (FIG. 2D).

Next, with respect to the insulating layers 27 and 23, an insulating layer 28 and 29 extending from the insulating layer 27 on the opposite side surfaces of the conductive layer 24, respectively, are formed by an etching process known per se, and Form an insulating layer 30 extending from the insulating layer 23 only under the conductive layer 24 and the insulating layer 28, and
A window 31 is formed by the insulating layers 28 and 30 and the insulating layer 21 to expose the semiconductor layer 25 to the outside, and a window 32 is formed by the insulating layers 29 and 30 and the insulating layer 21 to expose the semiconductor layer 26 to the outside. , And expose the upper surface of the conductive layer 24 to the outside (second
(Figure E).

Next, on the semiconductor substrate 1, on the regions of the semiconductor layers 25 and 26 facing the windows 31 and 32, and on the insulating layers 21, 28, 29, respectively.
A metal layer 7 similar to that described above with reference to FIG. 1D and a metal oxide layer 8 similar to that described above with reference to FIG. 1D, which extend continuously over the side surface of the insulating layer 30 and over the conductive layer 24. A metal layer 5 similar to that described above with reference to FIG. 1D is similarly formed (FIG. 2F).

Next, the heat-resistant layer 9 similar to that described in FIG. 1E is formed on the metal layer 5 in the same manner (FIG. 2G).

Then, according to the case described above with reference to FIG. 1E, the metal layer 5 is reacted with the semiconductor layers 25 and 26 in the regions facing the windows 31 and 32 by heat treatment to form the metal layer 5. While forming metal silicide layers 33 and 34 of metal and silicon constituting the semiconductor layers 25 and 26,
The metal layer 5 is reacted with the conductive layer 24 to form a similar metal silicide layer 35 (FIG. 2H). In this case, the metal silicide layers 33, 34 and 35 are not substantially corrugated due to the heat resistant layer 9 as in the case of the metal silicide layer 6 described above in FIG. 7th, 1st
Since the barrier barrier 10 (not shown) is formed in the same manner as described above with reference to FIG. F, the metal silicide layers 33, 34 and 35 are not formed extending over the insulating layers 21, 28 and 29.

Next, as in the case of FIG. 1G, the heat resistant layer 9 is removed from the semiconductor substrate 1 by the etching process, and next,
Areas of the metal layer 5 that have not reacted with the semiconductor layers 25 and 26 and the conductive layer 24 are removed (FIG. 2I).

Next, an insulating layer 36 made of, for example, silicon oxide as an interlayer insulating layer having windows 37 and 38 for exposing the metal silicide layers 33 and 35 to the outside is formed on the semiconductor substrate 1 by a method known per se. (Fig. 2J).

Next, ohmic connection is made to the metal silicide layers 33 and 35 through the windows 37 and 38 of the insulating layer 36, respectively, and the insulating layer 36 is formed.
Conductive layers 39 and 40 as wiring layers extending upward,
It is formed by a known method (FIG. 2K).

As described above, the P-type semiconductor substrate 1, the conductive layer 24 as a gate electrode or wiring layer formed on the P-type semiconductor substrate 1 with the insulating layer 30 as a gate insulating layer interposed therebetween, and the front surface side of the semiconductor substrate 1 Of N as a source region and a drain region formed on both sides of the conductive layer 24 when viewed from above.
Type semiconductor layers 25 and 26, and metal silicide layers 33 and 26 connected to the semiconductor layers 25 and 26 as electrodes, respectively.
A semiconductor device having a MIS field effect transistor having 34 and a metal silicide layer 35 as a wiring layer connected to the conductive layer 24 is manufactured.

The above is the second embodiment of the method for manufacturing a semiconductor device according to the present invention.

According to such a method for manufacturing a semiconductor device according to the present invention, although detailed description is omitted, it is clear that excellent actions and effects similar to those in the method for manufacturing a semiconductor device according to the present invention described in FIG. 1 can be obtained. Is.

In the above description, only a few examples of the present invention are shown, and it is also possible to obtain the same action and effect as those described above in which the metal layer 5 is made of a metal layer containing oxygen, Besides, various modifications and changes may be made without departing from the spirit of the present invention.

[Brief description of drawings]

1A to 1G are schematic cross-sectional views in a sequential process showing a first embodiment of a method for manufacturing a semiconductor device according to the present invention, which is applied when manufacturing a semiconductor device having a PN junction element. . 2A to 2K are schematic cross-sectional views in a sequential process showing a second embodiment of the method for manufacturing a semiconductor device according to the present invention, which is applied when manufacturing a semiconductor device having a MIS field effect transistor. Is. 3A to 3F show a conventional method for manufacturing a semiconductor device, which is applied when manufacturing a semiconductor device having a PN junction element,
It is an approximate line sectional view in a sequential process. 1 ... Semiconductor substrate 2 ... Insulating layer 3 ... Window of insulating layer 2 ... Semiconductor layer 5 ... Metal layer 6 ... Metal silicide layer 8 ... Metal oxide layer 9 ... Heat resistant layer 10 ... Barrier Barriers 21, 23, 28, 29, 30 …… Insulating layer 24 …… Conductive layer 33, 34, 35 …… Metal silicide layer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-60-182133 (JP, A) JP-A-59-200417 (JP, A) JP-A-59-4053 (JP, A)

Claims (1)

[Claims] 1. A step of forming, on a semiconductor substrate or semiconductor layer made of silicon, an insulating layer having a window that exposes the semiconductor substrate or semiconductor layer to the outside, and the insulating layer formed on the semiconductor substrate or semiconductor layer. A step of forming a continuously extending metal layer on the window of the layer and on the insulating layer, and by heat treatment, the metal layer reacts in the area of the semiconductor substrate or the semiconductor layer and the window of the insulating layer. Then, on the surface side of the region of the semiconductor substrate or the semiconductor layer facing the window of the insulating layer, a metal silicide layer made of the metal forming the metal layer and the silicon forming the semiconductor substrate or the semiconductor layer is formed. A region of the metal layer which has not reacted with the semiconductor substrate or the semiconductor layer due to the forming step and the etching treatment is formed on the semiconductor substrate or the semiconductor layer. In the method for manufacturing a semiconductor device having a step of removing, the metal layer is formed as a laminate having a metal layer and a metal oxide layer formed thereon or a metal layer containing oxygen, In the step of forming the metal silicide layer by the heat treatment, the heat treatment is performed in the state where the heat resistant layer is formed on the metal layer which is the laminate or the metal layer containing oxygen. From the semiconductor substrate or the semiconductor layer by oxygen or metal oxide from the metal oxide layer of the laminate or the metal layer containing oxygen in the metal layer consisting of a body or the metal layer containing oxygen A method for manufacturing a semiconductor device, which comprises: forming a barrier barrier that blocks the lateral diffusion of silicon in FIG.