JPH0750534A - Charge pump circuit for automatic gain control amplifier - Google Patents

Abstract

PURPOSE:To provide a charge pump circuit with a short lock time and low power consumption with respect to the charge pump circuit generating a control voltage to control the gain of the gain control amplifier included in an automatic gain control(AGC) circuit. CONSTITUTION:In the charge pump circuit in which a capacitor Cp is charged by a current I1 when an input signal Vin is smaller than a voltage Vth and the capacitor Cp is discharged by a current I2-I1, the current I2 is a sum of constant current sources i1, i2 and a switch 22 interrupts the current i2 to vary the current I2 in operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an automatic gain control (AG
C) A charge pump circuit for generating a control voltage for gain control of a gain control amplifier included in the circuit, and in particular, for automatically controlling the gain so that the output signal of the gain control amplifier has a predetermined magnitude. The present invention relates to a charge pump circuit that generates a control voltage.

An automatic gain control (AGC) circuit is used on the read side of a magnetic recording system such as a magnetic disk used in a computer system in order to amplify a signal read from a head to a constant amplitude. . This kind of AG
A charge pump circuit is used for the C circuit so that a waveform holding operation (hold operation) can be performed. The present invention refers to a charge pump circuit particularly suitable for use in such an AGC circuit.

[0003]

2. Description of the Related Art FIG. 3 is a circuit diagram showing an example of a conventional charge pump circuit used on the read side of a magnetic recording system. Gain control amplifier output (not shown) are input in the form of differential signals through the two signal lines (represented by V _in), respectively applied via capacitors 10 and 12 to the base terminal of the transistor Q1, Q2 To be done. Further, the base terminal of Q1 is supplied with the bias potential V _{i obtained by} dividing the power supply voltage by the resistors R _i 1 and R _i 2, and the base terminal of Q2 is biased by the resistors R _i 3 and R _i 4. The potential V _i is supplied. Therefore, to the base terminal of Q1 AC signal of the output signal having the same phase of the gain control amplifier is applied around the bias potential V _i, the applied AC signals of opposite phase to the base terminal of Q2 is about the bias potential V _i To be done.

The emitter terminals of the transistors Q1 and Q2 are connected to each other and to one end of the constant current source 14, and the other end of the constant current source 14 is connected to the ground potential. Further, the emitter terminal of the transistor Q3 is also connected to the emitter terminals of Q1 and Q2 and one end of the constant current source 14. The base terminal of Q3 is kept at the potential V _th , and the collector terminal is connected to the power supply. The collector terminals of the transistors Q1 and Q2 are connected to each other and to one end of the constant current source 16, and the constant current source 1
The other end of 6 is connected to the power supply voltage. The other end of the capacitor C _p whose one end is grounded is connected to the collector terminals of Q1 and Q2 and one end of the constant current source 16. Therefore, when the potentials of the in-phase input and the anti-phase input applied to the base terminals of the transistors Q1 and Q2 are both lower than V _th , the current I ₂ of the constant current source 14 flows only in Q3 and Q1 and Q2 are turned off. Become. At this time, the current I ₁ of the constant current source 16 flows to the capacitor C _p, the capacitor C _p is charged, V
The potential of _p gradually rises. When either one of the in-phase input and the anti-phase input is higher than V _th , the current I ₂ is Q1, Q2.
It flows only to one of the two. Therefore, I ₂ -I
Since the current of ₁ (I _2> I ₁₎ is the capacitor C _p flows out from the capacitor C _p is discharged, the potential of V _p is lowered gradually.

The potential V _p of the capacitor is differentially amplified by the amplifier 18 with the potential V _r as a reference potential, and is output from the terminals VCNT1 and VCNT2 in the form of a differential output. VCNT
1, VCNT2 are connected to the control input of the gain control amplifier (not shown), and the gain of the amplifier is controlled by the potential difference between them. Therefore, in-phase and anti-phase input signals V
_When the values of in are both smaller than V _th , the capacitor C _p
Is controlled by increasing the gain of the gain control amplifier because V _p is charged with a constant current I ₁ and rises at a constant speed, and the value of either the _in- phase or anti-phase input signal V _in is larger than V _th. When it is large, the capacitor C _p is discharged by the constant current I ₂ −I ₁ and V _p drops at a constant rate, so that the gain of the gain control amplifier is controlled to be smaller.

FIG. 4 shows the charge pump circuit of FIG.
Input signal V_inIs V_thGreater than
It is a figure for explaining a loading operation. Shown in column (a)
Input signal V_inAmplitude of V_thBig enough than
Come, V _inIn-phase signal (represented by the solid sine wave) or reverse
The value of the phase signal (represented by the dashed sine wave) is V_thGreater than
Discharge period T₁And both values are V_thCharging period less than
Interval T₂Compared with, the former is overwhelmingly longer. According to
Then, as shown in column (b), V_pIs a big descent and a small up
Gain control amplifier
Is controlled so that the gain decreases, the input signal V_inAmplitude of
It will become smaller gradually.

FIG. 5 is a diagram showing the operation of the charge pump circuit of FIG. 3 in the stable region. In the stable region, the amount of increase ΔV _p (↑) in V _p during the charging period T ₂ and the amount ΔV _p (↓) of decrease in V _p during the discharging period T ₁ are equal, and the input signal V _in is (a ) Size as shown in the column. Note that the vertical axis of the column (b) is exaggerated, and V _p can be regarded as a practically constant value.

Charging period T₂V in_pAmount of increase ΔV_p
(↑) and discharge period T₁V in _pDrop amount ΔV
_p(↓) is expressed by the following equation. ΔV_p(↑) = I₁・ T₂/ C_p … (1) ΔV_p(↓) = (I₂-I₁) T₁/ C_p … (2) I₁, I₂, C_pIs constant, so T₁And T₂Is ΔV
_p(↑) = ΔV_p(↓)
The charge pump circuit is in a balanced state.

On the other hand, this charge pump circuit is in a non-operating state.
Consider the pull-in time when entering the operating state from the state.
When the charge pump circuit is inactive (V_inIs not entered
Ki) C _pIs I₁Charged by V_pIs V_p≒ V_CC(Power supply
Pressure). Next, V_inIs entered and the charge
When the pump starts operating, it goes through the above-mentioned pull-in process and ΔV
_p(↑) = ΔV_p(↓) and the equilibrium state is reached.
When V_p≒ V_r(FIG. 5 (b)). Thus, V
_pIs V_CCTo V_rUntil the time of this AGC circuit
It can be said that the pull-in time is the worst. Char at this time
FIG. 6 shows the pull-in characteristic of the dipump circuit.
It

In the above-mentioned pull-in process, the charging time T
_{Since 2} is shorter than the discharge time T ₁ (FIG. 4), if T ₂ is ignored, the pull-in time T _p is (I ₂ −I ₁ ) T _p = C _p (V _CC −V _r ) = C _p · ΔV
from _p Is represented.

According to the equation (3), the pull-in time becomes short if C _p is made small or I ₂ is made large. However, if the pull-in time becomes short, the stability against disturbance such as noise becomes poor in the equilibrium state. Therefore, conventionally, the values of C _p and I ₁ and I ₂ are determined by the trade-off between the _two .

[0012]

As described above, in the conventional charge pump circuit, the pull-in time is designed to be a constant value. Therefore, for example, when I ₂ is large, the pull-in time is short, but in the equilibrium state. There is a problem that such a large current is unnecessary and power is wasted accordingly, which has been an obstacle to lowering the power consumption of the device.

Therefore, an object of the present invention is to provide a charge pump circuit having a short pull-in time and a small power consumption.

[0014]

SUMMARY OF THE INVENTION The charge pump circuit of the present invention which achieves the above-mentioned object, is for automatically controlling the gain of an amplifier so that the magnitude of the output signal of the amplifier becomes a predetermined value. A charge pump circuit for generating a control voltage, the capacitance element holding a voltage corresponding to the control voltage, and a predetermined value depending on whether or not the magnitude of an output signal of the amplifier is equal to or more than the predetermined value. Charging / discharging means for adjusting the control voltage by charging the capacitance element with a charging current of a predetermined amount or discharging the capacitance element with a discharging current of a predetermined amount; and one of the charging current and the discharging current. And a current increasing / decreasing means for increasing / decreasing one amount.

[0015]

By providing the current increasing / decreasing means for increasing / decreasing the charging current and / or the discharging current, for example, a large current can be set at the time of pulling to speed up the pulling, and the current can be reduced at the equilibrium state to save power consumption. It will be possible.

[0016]

1 is a circuit diagram showing the configuration of an embodiment of a charge pump circuit according to the present invention. The same components as those in FIG. 3 are designated by the same reference numerals and symbols, and the description thereof will be omitted. Here, the current corresponding to the current I ₂ described with reference to FIG. 3 corresponds to the current i ₁ of the constant current circuit 20 and the transistor Q4.
It is given by the sum with the current i ₂ by the circuit composed of Q5, Q6 and resistors R _e 1, R _e 2, R _e 3. That is, I ₂ = i ₁ + i ₂ (4)

Therefore, the pull-in time T of the equation (3) is
_p is Is represented.

Transistors Q5, Q6 and resistance R _e 1,
R _e 2, the R _e 3 is constituted well-known current mirror circuit, when turned on transistor Q4 is saturated, the current i ₂ is _{i 2 = (V CC -V CS} -V BE) / (R _e 1 + R _e 2) × (R _e 2 / R _e 3) (6) However, V _cs is the collector-emitter voltage when the transistor is saturated, and V _BE is the base-emitter voltage of the transistor.

All of these circuits are in one integrated circuit.
Integrated, Q4 base terminal integrated as MODE terminal
Taken out of the circuit. Switch 2 to this MODE terminal
2 is sufficient to saturate transistor Q4.
Pressure V_mod(> V_CC-V_CS+ V _CE) Is applied, (6)
Current i given by equation₂Is obtained and is shown in equation (5).
So the current i₁I₂Is added to shorten the pull-in time
To be done. When the equilibrium is reached, switch 2
Turn off 2 and V_modI if the supply of₁Only
A reduction in power consumption is achieved. Also, 2V_BEGreater than
V in the range_modChange the value of i₂It is also possible to change the value of
Is.

FIG. 2 shows another example of the circuit for generating i ₂ in FIG. The connection point between the emitter terminal of Q4 and the resistor R _e 1 is taken out of the IC as the terminal MONIR, the resistance R _m is connected to the value of this point and the ground potential, and the value of this R _m is changed to change the current. The value of i ₂ can be changed. In the circuit shown in FIG. 1, the capacitor is discharged when the input signal V _in is large, and is charged when the input signal V _in is small, but the reverse structure may be adopted, and in this case, it is output. It only reverses the polarity of the control signal. Further, although I ₁ <I ₂ is set to control the I ₂ side, the reverse is also possible.

[0021]

As described above, according to the present invention,
In order to shorten the pull-in time of AGC, the discharge current I ₂
By controlling the switch, it is possible to realize a charge pump in which low consumption is consulted.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a charge pump circuit of the present invention.

FIG. 2 is a circuit diagram showing another example of a circuit for generating i ₂ in FIG.

FIG. 3 is a diagram illustrating an example of a conventional charge pump circuit.

FIG. 4 is a diagram illustrating an operation at the time of pulling in a charge pump circuit.

FIG. 5 is a diagram illustrating an operation of the charge pump circuit in a balanced state.

FIG. 6 is a diagram showing a pull-in characteristic of a charge pump circuit.

[Explanation of symbols]

 14, 16, 20 ... Constant current source

Claims (3)

[Claims] 1. A charge pump circuit for generating a control voltage for automatically controlling the gain of the amplifier so that the magnitude of the output signal of the amplifier has a predetermined value, which corresponds to the control voltage. Depending on whether the capacitance element that holds the voltage and the magnitude of the output signal of the amplifier is equal to or greater than the predetermined value, the capacitance element is charged with a predetermined amount of charging current or the predetermined amount of charge current is applied. A charging / discharging means for adjusting the control voltage by discharging from the capacitive element by a discharging current, and a current increasing / decreasing means for increasing / decreasing the amount of either or both of the charging current and the discharging current. Charge pump circuit for automatic gain control amplifier. 2. The charging / discharging means includes a first constant current source for supplying a first constant current in a direction of charging the capacitance element, and a first constant current in a direction of discharging the capacitance element. Is a second constant current source that supplies a different amount of second constant current, and the first and second constant current sources are output according to whether the magnitude of the output signal of the amplifier is equal to or greater than the predetermined value. A first switch circuit for connecting and disconnecting the current on the side with the larger amount of the constant current sources of the above, the current increasing / decreasing means is connected in parallel to either one of the first and second constant current sources. 2. The charge pump circuit for an automatic gain control amplifier according to claim 1, further comprising a third constant current source and a second switch circuit for connecting and disconnecting the current of the third constant current source. 3. The charge pump circuit for an automatic gain control amplifier according to claim 2, wherein the current increasing / decreasing means further includes means for continuously varying the current value of the third constant current source.