JPH0747872Y2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0747872Y2 JPH0747872Y2 JP1985195328U JP19532885U JPH0747872Y2 JP H0747872 Y2 JPH0747872 Y2 JP H0747872Y2 JP 1985195328 U JP1985195328 U JP 1985195328U JP 19532885 U JP19532885 U JP 19532885U JP H0747872 Y2 JPH0747872 Y2 JP H0747872Y2
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- control external
- lead
- metal
- external lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
本考案は、半導体素体の電極との接続のためのリード線
が制御用外部引出し端子に接続されている半導体装置に
関する。The present invention relates to a semiconductor device in which a lead wire for connecting to an electrode of a semiconductor body is connected to a control external lead terminal.
例えば第２図に断面図，第３図に平面図で示す半導体装
置は、容器１の底板上に固定されたトランジスタチップ
２のコレクタ電極が金属支持板３を介して主端子41に接
続され、図示しないエミッタ電極は底板上に絶縁体51を
介して固定された金属端子板61と導線７により、同様に
図示しないベース電極は底板に絶縁板52を介して固定さ
れた別の金属端子62とそれぞれ導線７によって接続され
ている。金属端子61の一端は主端子42と結合され、他端
および金属端子板62は制御用外部引出し端子８とリード
線91および92で接続されているるしかしこのような半導
体装置も、端子８を制御回路に接続して使用する場合、
平行に走るリード線91および92間に存在する浮遊インダ
クタンスによって発振が生ずる場合があるという欠点が
あった。For example, in a semiconductor device shown in a sectional view in FIG. 2 and a plan view in FIG. 3, a collector electrode of a transistor chip 2 fixed on a bottom plate of a container 1 is connected to a main terminal 41 via a metal supporting plate 3, The emitter electrode (not shown) is connected to the bottom plate through the insulator 51 and the metal terminal plate 61 and the lead wire 7. Similarly, the base electrode (not shown) is connected to the bottom plate through another plate 52 and the other metal terminal 62. Each is connected by a conductor 7. One end of the metal terminal 61 is connected to the main terminal 42, and the other end and the metal terminal plate 62 are connected to the control external lead-out terminal 8 by lead wires 91 and 92. When used by connecting to a control circuit,
There is a drawback that oscillation may occur due to stray inductance existing between the lead wires 91 and 92 running in parallel.
本考案は、上述の欠点を除去して浮遊インダクタンスに
よる制御回路の発振を防止した半導体装置を提供するこ
とを目的とする。An object of the present invention is to provide a semiconductor device which eliminates the above-mentioned drawbacks and prevents oscillation of a control circuit due to stray inductance.
本考案は、底板上に固着された絶縁体を介して半導体素
体および複数の金属板がそれぞれ固着され、半導体素体
の電極と各金属板とがそれぞれ接続され、該金属板から
それぞれ主端子および制御用外部引出し端子が引き出さ
れ、制御用外部引出し端子が主端子の一方の側に配置さ
れ、該制御用外部引出し端子と金属板との間がリード線
によって接続され、該制御用外部引出し端子はそれぞれ
異なる電極に接続される２つ以上であるものにおいて、
前記制御用外部引出し端子と金属板とを接続するリード
線の少なくとも２本が撚り合わせられていることによ
り、それらのリード線間に存在する浮遊インダクタンス
に基づく誘導に起因する制御回路の発振を防止すること
ができ、上述の目的が達成される。According to the present invention, a semiconductor element body and a plurality of metal plates are fixed to each other through an insulator fixed to a bottom plate, the electrodes of the semiconductor element body and the metal plates are connected to each other, and the metal plates are respectively connected to main terminals. And the control external drawing terminal is drawn out, the control external drawing terminal is arranged on one side of the main terminal, and the control external drawing terminal and the metal plate are connected by a lead wire, and the control external drawing terminal In the case where there are two or more terminals connected to different electrodes,
At least two lead wires connecting the control external lead-out terminal and the metal plate are twisted together to prevent oscillation of the control circuit due to induction based on stray inductance existing between the lead wires. It is possible to achieve the above-mentioned object.
第１図は本考案の一実施例で、第2,第３図に示した半導
体装置を改良したものである。第2,第３図と共通の部分
には同一の符号が付されている。第３図と比較して明ら
かなように、本実施例ではリード線91,92が撚り合わさ
れている。接続される電極が異なり互いに逆方向に電流
が流れるこの両リード線の撚り合わせによって周知のよ
うに浮遊インダクタンスによる発振が防止される。FIG. 1 shows an embodiment of the present invention, which is an improvement of the semiconductor device shown in FIGS. The same parts as those in FIGS. 2 and 3 are designated by the same reference numerals. As is clear from comparison with FIG. 3, the lead wires 91 and 92 are twisted together in this embodiment. As is well known, the oscillation due to the stray inductance is prevented by twisting the two lead wires in which the electrodes to be connected are different and the currents flow in opposite directions.
本考案は底板上に固着された絶縁体を介して半導体素体
および複数の金属板がそれぞれ固着され、半導体素体の
電極と各金属板とがそれぞれ接続され、該金属板からそ
れぞれ主端子および制御用外部引出し端子が引き出さ
れ、制御用外部引出し端子が主端子の一方の側に配置さ
れ、該制御用外部引出し端子と金属板との間がリード線
によって接続され、該制御用外部引出し端子はそれぞれ
異なる電極に接続される２つ以上であるものにおいて、
前記制御用外部引出し端子と金属板とを接続するリード
線の少なくとも２本が撚り合わせられるだけの簡単な方
策により、浮遊インダクタンスによる発振を防止し、制
御回路の発振が起こりにくくなるという効果を奏する。According to the present invention, a semiconductor element body and a plurality of metal plates are fixed to each other through an insulator fixed to a bottom plate, electrodes of the semiconductor element body and each metal plate are connected to each other, and the metal plate is connected to a main terminal and a main terminal, respectively. The control external drawing terminal is drawn out, the control external drawing terminal is arranged on one side of the main terminal, and the control external drawing terminal and the metal plate are connected by a lead wire, and the control external drawing terminal Are two or more connected to different electrodes, respectively,
By a simple measure in which at least two lead wires connecting the control external lead-out terminal and the metal plate are twisted together, oscillation due to stray inductance is prevented, and the oscillation of the control circuit is less likely to occur. .
第１図は本考案の一実施例を示す平面図、第２図は従来
の半導体装置の断面図、第３図は同じく平面図である。 1:容器、2:トランジスタチップ、61,62:金属端子板、7:
導線、8:制御用外部引出し端子、91,92:リード線。FIG. 1 is a plan view showing an embodiment of the present invention, FIG. 2 is a sectional view of a conventional semiconductor device, and FIG. 3 is a plan view of the same. 1: container, 2: transistor chip, 61, 62: metal terminal board, 7:
Conductor, 8: External lead-out terminal for control, 91, 92: Lead wire.
Claims (1)
素体および複数の金属板がそれぞれ固着され、半導体素
体の電極と各金属板とがそれぞれ接続され、該金属板か
らそれぞれ主端子および制御用外部引出し端子が引き出
され、制御用外部引出し端子が主端子の一方の側に配置
され、該制御用外部引出し端子と金属板との間がリード
線によって接続され、該制御用外部引出し端子はそれぞ
れ異なる電極に接続される２つ以上であるものにおい
て、前記制御用外部引出し端子と金属板とを接続するリ
ード線の少なくとも２本が撚り合わされたことを特徴と
する半導体装置。1. A semiconductor element body and a plurality of metal plates are fixed to each other via an insulator fixed to a bottom plate, electrodes of the semiconductor element body and each metal plate are connected to each other, and each of the metal plates mainly The terminal and the control external lead-out terminal are drawn out, the control external lead-out terminal is arranged on one side of the main terminal, the control external lead-out terminal and the metal plate are connected by a lead wire, and the control external lead-out terminal is provided. In a semiconductor device having two or more lead terminals connected to different electrodes, at least two lead wires connecting the control external lead terminal and the metal plate are twisted together.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985195328U JPH0747872Y2 (en) | 1985-12-19 | 1985-12-19 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985195328U JPH0747872Y2 (en) | 1985-12-19 | 1985-12-19 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62103265U JPS62103265U (en) | 1987-07-01 |
| JPH0747872Y2 true JPH0747872Y2 (en) | 1995-11-01 |
Family
ID=31153118
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985195328U Expired - Lifetime JPH0747872Y2 (en) | 1985-12-19 | 1985-12-19 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0747872Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0622627Y2 (en) * | 1988-04-20 | 1994-06-15 | マツダ株式会社 | Open car front header structure |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5797661A (en) * | 1980-12-10 | 1982-06-17 | Mitsubishi Electric Corp | Semiconductor device |
| JPS5893362A (en) * | 1981-11-30 | 1983-06-03 | Mitsubishi Electric Corp | Semiconductor device with plurality of elements |
| JPS59140710A (en) * | 1983-01-31 | 1984-08-13 | Mitsubishi Electric Corp | Parallel connecting circuit of transistor |
| JPS59153476A (en) * | 1983-02-17 | 1984-09-01 | Fuji Electric Co Ltd | Inverter device |
| JPS59158558A (en) * | 1983-02-28 | 1984-09-08 | Toyo Electric Mfg Co Ltd | Thyristor element and gate circuit for thyristor element |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59166451U (en) * | 1983-04-25 | 1984-11-08 | 東洋電機製造株式会社 | Self-extinguishing thyristor lead wire |
-
1985
- 1985-12-19 JP JP1985195328U patent/JPH0747872Y2/en not_active Expired - Lifetime
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5797661A (en) * | 1980-12-10 | 1982-06-17 | Mitsubishi Electric Corp | Semiconductor device |
| JPS5893362A (en) * | 1981-11-30 | 1983-06-03 | Mitsubishi Electric Corp | Semiconductor device with plurality of elements |
| JPS59140710A (en) * | 1983-01-31 | 1984-08-13 | Mitsubishi Electric Corp | Parallel connecting circuit of transistor |
| JPS59153476A (en) * | 1983-02-17 | 1984-09-01 | Fuji Electric Co Ltd | Inverter device |
| JPS59158558A (en) * | 1983-02-28 | 1984-09-08 | Toyo Electric Mfg Co Ltd | Thyristor element and gate circuit for thyristor element |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62103265U (en) | 1987-07-01 |
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