JPH0746860A - Bridge type inverter - Google Patents

Abstract

PURPOSE:To suppress stitching loss by setting the timings of first and second control pulses such that they are generated alternately while overlapping the interval. CONSTITUTION:A switching element SW1 is connected between one end of a power supply 1 and one end of a load 2 through a reactor L1 whereas a switching element SW2 is connected between the other end of the power supply 1 and one end of the load 2 through a reactor L2. A switching element SW3 is connected between one end of the power supply 1 and the other end of the load 2 through a reactor L3 whereas a switching element SW4 is connected between the other end of the power supply 1 and the other end of the load 2 through a reactor L4. Main diodes D1-D4 are connected in reverse parallel with the switching elements SW1-SW4 through the reactors L1-L4 and capacitors C1-C4 are connected in parallel with the main diodes D1-D4. Since the voltages across the switching elements SW1, SW4 rise slowly at the time of turn OFF, power loss based on the product of voltage and current can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a single-phase or multi-phase inverter device having switching elements connected in a bridge or a half bridge.

[0002]

2. Description of the Related Art When a switching element of a bridge type inverter for converting direct current into alternating current is turned on and off, switching loss occurs in the switching element.

Therefore, an object of the present invention is to provide a bridge type inverter device capable of reducing switching loss.

[0004]

The present invention for achieving the above objects will be described with reference to the reference numerals of the drawings showing an embodiment. The present invention is connected between one end of a DC power supply 1 and one end of a load 2. The first switching element SW1 and the DC power source 1
A second switching element SW2 connected between the other end of the load 2 and one end of the load 2, and a first switching element SW1 connected to the first and second switching elements SW1 and SW2 in reverse parallel. In a single-phase or multi-phase bridge type or half bridge type inverter device having second main diodes D1 and D2 for supplying AC power to the load 2, the first and second main diodes ( First and second capacitors C1 connected in parallel with D1 and D2, respectively.
, C2 and the first and second switching elements SW1
, SW2, and first and second auxiliary diodes DL1, DL2 respectively connected in reverse parallel to each other, the first and second switching elements SW1, SW2 and the first and second auxiliary diodes. -First and second reactors L1 and L2 connected in series to the respective terminals DL1 and DL2, and the first and second switching elements S
First and second control pulses for turning on W1 and SW2 are generated, and the first and second control pulses are set to be alternately generated with a period in which they overlap each other. The present invention relates to a single-phase or multi-phase bridge type or half bridge type inverter device, which is provided with a switch control circuit. In addition, it is also possible to modify as shown in claims 2, 3, and 4.

[0005]

According to the inventions of the above claims,
Since the capacitors C1 and C2 are connected in parallel to the switching elements SW1 and SW2, respectively, the voltage between both terminals of the switching elements SW1 and SW2 rises slowly without turning on rapidly at the time of turn-off. Therefore, power loss based on the product of voltage and current is reduced. Further, the voltage between both terminals when the switching element is turned off is gradually reduced by the action of the resonance circuit formed by the capacitors C, .about.C2 and the reactors L1 and L2. When it is turned on when the voltage between both terminals is zero, a zero volt switch is achieved and power loss is reduced. Also, surge and noise are suppressed. The method of the present invention has an effect of enabling zero volt switching (ZVS) or zero current switching (ZCV) operation without providing a special switch.
Further, the same effect as that of the first aspect can be obtained by the inverter device of the second, third and fourth aspects.

[0006]

[First Embodiment] Next, a bridge type inverter device according to a first embodiment of the present invention will be described with reference to FIGS.
As shown in FIG. 1, this inverter device is configured to convert a DC voltage of a DC power supply 1 into an AC by a bridge type inverter circuit and supply the AC to a load 2. The DC power supply 1 is composed of a rectifying circuit or a battery, and the load 2 is composed of, for example, an output transformer 3 and a load circuit 4 connected thereto.

The inverter circuit has first, second, third and fourth switching elements S, similar to a typical inverter.
Besides having W1, SW2, SW3, SW4 and first, second, third and fourth main diodes D1, D2, D3, D4, first, second, third and fourth auxiliary diodes DL
1, DL2, first, second, third and fourth capacitors C1, C2, C3, C4, first, second, third and fourth
Of the reactor L1, L2, L3, L4. In addition, in the following, each circuit element may be indicated only by a symbol in order to simplify the description.

The first, second, third and fourth switching elements SW1, SW2, SW3 and SW4 are composed of bipolar transistors. However, the switching elements SW1 to SW4 can be field effect transistors (FETs). The first switching element SW1 is provided between the one end of the power supply 1 and the one end of the load 2 to form the first reactor L1.
The second switching element SW2 is connected via one end of the load 2 and the other end of the power source 1 to the second reactor L.
2, the third switching element SW3 is connected between one end of the power source 1 and the other end of the load 2 via the third reactor L3, and the fourth switching element TR4 is connected.
Is connected between the other end of the load 2 and the other end of the power source 1 via a fourth reactor L4.

The first, second, third and fourth main diodes D1, D2, D3 and D4 are the first, second, third and fourth main diodes.
Of the switching elements SW1, SE2, SW3, and SW4 are connected in reverse parallel via the first to fourth reactors L1 to L4. First, second, third and fourth
The auxiliary diodes DL1 to DL4 are connected to the first to fourth switching elements SW1 to SW4 in antiparallel.
The first to fourth switching elements SW1 to SW4
Is an insulated gate type (MOS type) field effect transistor having a structure in which the source is connected to the substrate, the diode incorporated in this is an auxiliary diode DL.
It can be 1 to DL4.

The first to fourth capacitors C1 to C4 are the first
.. to the fourth main diodes D1 to D4, respectively. The first and second reactors L1 and L2 are electromagnetically coupled to each other, and the third and fourth reactors L3 and L4.
Are also electromagnetically coupled to each other.

The control terminals (bases) of the switching elements SW1 to SW4 are connected to the control circuit 5. The control circuit 5 has first, second, third and fourth control pulse generation circuits 6, 7, 8 and 9, an oscillator 14 and a phase control circuit 15, as shown in principle in FIG. . The first to fourth control pulse generation circuits 6 to 9 are the oscillator 14 and the phase control circuit 1.
5 to generate first to fourth control pulses shown in (A), (B), (C), and (D) of FIG. 3, and supply these to the first to fourth switching elements SW1 to SW4. .

The first and second control pulses shown in FIGS. 3 (A) and 3 (B) are alternately generated with overlapping sections t3 to t4 and t7 to t8 and a phase difference of about 180 degrees. And then Figure 3
The third and fourth control pulses (C) and (D) are also alternately generated with overlapping sections.

The basic operation of the inverter circuit shown in FIG. 1 is the same as that of a known inverter. That is, while the first and fourth switching elements SW1 and SW4 are simultaneously turned on, the current in the first direction is generated in the circuit composed of the power source 1, the first switching element SW1, the load 2 and the fourth switching element SW4. It flows into the load 2, and the second and third switching elements S
A current in the second direction flows through the load 2 in the circuit including the power supply 1, the third main switching element SW3, the load 2 and the second switching element SW2 while W2 and SW3 are simultaneously turned on.

FIG. 4 shows t3 of FIG. 3 in the case where the load 4 is unloaded and the load circuit 2 is a delay load of only the transformer.
~ T4 section and the state of each part of Fig. 1 in the vicinity thereof are shown. When the second switching element SW2 is turned on at time t3 while the second capacitor C2 is almost charged to the power supply voltage V, the second capacitor C2, the second reactor L2, and the second switching element SW2 are turned on. a resonance circuit consisting of is formed, the current I _c2 of the current I _c2 and a second reactor L2 of the second capacitor C2 flows sinusoidally as shown in FIG. Further, since L1 is electromagnetically coupled to L2, a resonant circuit of L1, DL1 and C1 is also formed. As a result, the voltage V2 of the second capacitor C2 gradually decreases as shown in FIG. On the other hand, the current I _C1 of the first capacitor C1 and the current I L1 of the first reactor _L1 also flow in a sine wave shape, and the voltage V1 of the capacitor C1.
Gradually increases as shown in FIG. That is, the voltage V1 of the first capacitor C1 becomes a value obtained by subtracting the voltage V2 of the second capacitor C2 from the voltage V of the power source 1, and V1 rises following the decrease of V2. In the section from t3 to t4 ', the first reactor and the first auxiliary diode D
A current I _L1 flows through the first reactor L1 by the circuit composed of L1 and the first capacitor C1. SW1 is t3
It is turned off while the resonance current of .about.t4 'is flowing. This causes SW1 to be substantially zero volt switching (Z
VS) and zero current switching (ZCS), and SW2 becomes ZCS. .

Even in the interval from t7 to t8 in FIG. 3, t3
The same operation as in the section near to t4 occurs. In FIG. 4, the DC exciting currents of L1 and L2 are ignored.

[0016]

[Second Embodiment] Next, a bridge type inverter device according to a second embodiment of the present invention will be described with reference to FIGS. However, in FIG. 5, the same parts as those in FIG. The inverter circuit of FIG. 5 has the first to fourth switching elements SW1 in FIG.
The connection points of the first to fourth auxiliary diodes DL1 to DL4, which are connected in reverse parallel to SW4, have been changed. That is, in FIG. 5, the first auxiliary diode DL1 is connected between the lower end of the power source 1 and the upper end of the first reactor L1, and the second auxiliary diode DL2 is connected to the second reactor L1.
Is connected between the lower end of 2 and the upper end of the power supply 1, and the third auxiliary diode DL3 is connected to the lower end of the power supply 1 and the third reactor L.
Is connected between the upper end of 3 and the fourth auxiliary diode DL
4 is connected between the lower end of the fourth reactor L4 and the upper end of the power supply 1.

The control pulses of the switching elements SW1 to SW4 in FIG. 5 are as shown in FIGS. 6 (A) to 6 (D), and S
W1 and SW2 and SW3 and SW4 are alternately turned on with a phase difference of 180 degrees. FIG. 7 shows the ON / OFF state of the first and second switching elements TSW and SW2 in the section corresponding to the vicinity of t3 in FIG. 6 when the load 4 is unloaded and the load circuit 2 is a delay load of only the transformer. I _L1 , I _L2 , and the voltage V _{sw1 of} SW1, SW2,
V _sw2 and V 2 are shown. In FIG. 5, C2 is applied during the ON period of SW1.
Is charged to V. At the same time when SW1 is turned off, SW2
Turn on. When SW1 is off, the current of L1 is SW1
Commutate from the DC to DL1 and sinusoidal currents I _L1 and I _L2 flow through the resonance circuit of L1 and C1, the power source 1 and DL1, and the resonance circuit of C2, L2 and SW2. Voltage V2 of the voltage waveform i.e. D2 of L2 is changed to a cosine wave, I _L2 when this becomes zero peak - reached click value, it continues to flow becomes then circulating current.
SW2 becomes ZCS because I _L2 rises from 0 when ON. Also. When SW1 is off, it becomes ZVS due to the delay of the rising of V _sw1 due to the parasitic capacitor (storage capacitance) of SW1.

[0018]

[Third Embodiment] Next, an inverter device according to a third embodiment will be described with reference to FIGS. However, in FIG. 8, the same parts as those in FIGS. 1 and 5 are designated by the same reference numerals, and the description thereof will be omitted. The circuit shown in FIG. 8 is the first to the first circuit shown in FIG.
The first to fourth auxiliary capacitors Cs1 to Cs4 are connected in parallel to the fourth switching elements SW1 to SW4.

Compared with the parasitic capacitor shown in FIG.
When the auxiliary capacitors Cs1 to Cs4 are connected, the ZVS of SW1 becomes reliable as shown in FIG.

A loss occurs due to Cs1 to Cs4.
This can be reduced by setting the capacitance of Cs1 to Cs4 smaller than that of C1 to C4.

[0021]

[Fourth Embodiment] A half-bridge type inverter device shown in FIG. 10 will be described below. However, in FIG.
The same parts as those in FIG. The inverter circuit of FIG. 10 has a configuration in which the right half of the inverter circuit of FIG. 1 is replaced with first and second power supply capacitors Ca and Cb having the same capacity. That is,
A series circuit of first and second power supply capacitors Ca and Cb is connected between one end and the other end of the power source 1, and the other end (right end) of the load 2 is connected to the connection midpoint of these. There is.

In this half-bridge type inverter circuit, first, the first and second power supply capacitors Ca,
Cb is charged to a value that is half the voltage V of the power supply 1. In this state, when the first main switching element SW1 is turned on and the second main switching element SW2 is turned off, the circuit of the power source 1, the first main switching element TR1, the load 2, and the second power supply capacitor Cb. Then, the current in the first direction flows to charge the second power supply capacitor Cb.
Further, a discharge current in the first direction flows in the circuit of the first power supply capacitor Ca, the first main switching element SW1 and the load 2. At this time, a voltage of V / 2 is applied to the load 2. Next, during the ON period of the second main switching element SW2, the current in the second direction is generated in the circuit composed of the power source 1, the first power supply capacitor Ca, the load 2 and the second main switching element SW2. Along with the flow, a discharge current in the second direction flows in the circuit composed of the second power supply capacitor Cb, the load 2 and the second main switching element SW2. Figure 10
Also in the half-bridge type inverter, the capacitors C1 and C2, the diodes DL1 and DL2, and the reactor L
Since 1 and L2 are provided as in FIG. 1, the same effect as in FIG. 1 is obtained.

In FIG. 10, the left half of the load 2 can be the same as the left half of FIG. 5 or FIG. 8 or FIG. 12 described later.

[0024]

[Fifth Embodiment] Next, a three-phase bridge type inverter device shown in FIG. 11 is shown. However, the same parts as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. In this embodiment, the power supply 1 is connected to the switch circuits Su of the first, second and third phases,
Sv and Sw are connected in parallel. Each switch circuit Su
, Sv, Sw are the same as the switch circuit in the left half of FIG. The output lines 21, 22, 23 of each phase are derived from the connection midpoints of the first and second main switching elements SW1, SW2 in the switch circuits Su, Sv, Sw, and are connected to the three-phase load 2. As is well known, the switch circuits Su, Sv, Sw of the first to third phases are driven with an angular interval of 120 degrees. Also in this three-phase inverter, the switch circuit for each phase has the same configuration as the single-phase switching circuit of FIG.

In FIG. 11, the switch circuit may be the same as that shown in FIG. 5 or FIG. 8 or the later-described figures.

[0026]

[Sixth Embodiment] A sixth embodiment will now be described with reference to FIGS.
The inverter device of the embodiment will be described. However, in FIGS. 12 and 13, the same parts as those in FIGS. 1 to 9 are designated by the same reference numerals, and the description thereof will be omitted. The first to fourth auxiliary capacitors Cs1 to Cs4 are connected to the positions of the first to fourth switching elements SW1 to SW4 in FIG. 1, and the first to fourth switching elements SW1 to SW4 are the first to fourth switching elements. The first to fourth main diodes D1 without passing through the reactors L1 to L4
~ D4 connected in parallel.

As shown in FIG. 13, an idle period Ta is provided between the control pulses of the first and second switching elements SW1 and SW2 and between the control pulses of the third and fourth switching elements SW3 and SW4. It is provided.

The waveform of each part in FIG. 12 is shown in FIG. SW
While 1 is ON and SW2 is OFF, the current of the reactor L1 flows as a circulating current in the loop of SW1-L1-DL1. At this time, C2 has the polarity shown in FIG.
The voltage of V is also charged in Cs2. Next, when SW1 is turned off, the current of SW1 commutates to C1. After that, C1 is charged, V1 rises linearly, and C2 voltage V
2 decreases linearly. The OFF operation of SW1 becomes ZVS due to the charging voltage of C1. When the voltage V2 of C2 becomes 0, D2 becomes conductive and the current of the reactor L1 becomes D2-C1.
It is returned to the power supply by the loop of -DL1. If the ON signal is applied to SW2 while D2 is conducting, ZVS of SW2 becomes possible. The current of L1 fed back to the power supply linearly decreases, and when it reaches 0, DL1 is cut off. As a result, depending on the voltage V charged in Cs2, Cs2,
A resonance phenomenon of L2 occurs, and a resonance current flows in Cs2-L2-SW2. When a sinusoidal current flows for 90 degrees, the voltage of Cs2 becomes 0 and Ds2 becomes conductive. At this time,
The current I _L2 of _L2 reaches almost the peak value of the resonance current, and this current continues to flow as a circulating current of DL2-L2-SW2. As described above, the currents of the reactors L1 and L2 continue to flow as a circulating current, and conduction loss of the semiconductor element and the reactor increases, but soft switching of SW1 and SW2 is achieved.

[0029]

MODIFICATION The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible. (1) First to fourth switching elements SW1 to SW4
PWM that turns on and off multiple times during a 180 degree interval
It can be driven according to control. (2) In the case of the circuits of FIGS. 5 and 12, C3, C4,
L3, L4, DL3 and DL4 can be omitted. Even in this case, the effects of ZVS and ZCS can be obtained in the left half. (3) A diode can be added in antiparallel to SW1 to SW4 in FIG. (4) In FIGS. 5, 8, and 12, L1 and L2, L3 and L
4 is not particularly electromagnetically coupled. However, they can be electromagnetically coupled if desired.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an inverter device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing the control circuit of FIG. 1 in principle.

FIG. 3 is a voltage waveform diagram showing the states of points A to D in FIG.

FIG. 4 is a diagram showing a state of each part of FIG.

FIG. 5 is a circuit diagram showing an inverter device according to a second embodiment.

6 is a diagram showing a control pulse of each switching element of FIG.

FIG. 7 is a diagram showing a state of each part of FIG.

FIG. 8 is a circuit diagram showing an inverter device of a third embodiment.

FIG. 9 is a waveform diagram showing a state of each part of FIG.

FIG. 10 is a diagram showing an inverter device of a fourth embodiment.

FIG. 11 is a diagram showing an inverter device of a fifth embodiment.

FIG. 12 is a circuit diagram showing an inverter device of a sixth embodiment.

13 is a diagram showing control pulses of the switching element of FIG.

FIG. 14 is a waveform diagram showing a state of each part of FIG.

[Explanation of symbols]

 SW1 to SW4 Switching element C1 to C4 Capacitor L1 to L4 Reactor

Claims (4)

[Claims] 1. A first switching element (SW1) connected between one end of a DC power supply (1) and one end of a load (2).
), A second switching element (SW2) connected between the other end of the DC power source (1) and one end of the load (2), and the first and second switching elements (SW1, SW2). )
First and second respectively connected in reverse parallel to
A main-phase or multi-phase bridge type or half-bridge type inverter device having main diodes (D1 and D2) and supplying AC power to the load (2). -First and second capacitors (C1, C2) connected in parallel to the respective terminals (D1, D2), and the first and second switching elements (SW1, SW2)
) And first and second auxiliary diodes (DL1, DL2) connected in reverse parallel to each other, and the first and second switching elements (SW1, SW2).
) And the first and second auxiliary diodes (DL1, D)
L2) and a first and a second respectively connected in series with
Of the reactors (L1, L2) and the first and second switching elements (SW1, SW2)
) On-driving is generated, and the first and second control pulses are set to be alternately generated with a period in which they overlap each other. A single-phase or multi-phase bridge type or half-bridge type inverter device comprising a switch control circuit. 2. The DC power source (1) according to claim 1, wherein a connection point of the first and second auxiliary diodes (DL1, DL2) is provided, and one end of the first auxiliary diode (DL1) is provided. Connected to the other end of the first auxiliary diode (D
The other end of L1) is connected to the connection point of the first switching element (SW1) and the first reactor (L1), and one end of the second auxiliary diode (DL2) is connected to the second auxiliary diode (DL2). The switching element (SW2) and the second reactor (L
2) is connected to the connection point with the second auxiliary diode D
2. The method according to claim 1, wherein the other end of L2 is changed to be connected to one end of the DC power supply, and the first and second control pulses are alternately generated with substantially no overlapping period. An inverter device characterized in that a control circuit is changed. 3. A first parallel switch connected in parallel to the first and second switching elements (SW1, SW2) and connected in series to the first and second reactors (L1, L2). 1st and 2nd auxiliary capacitors (Cs1, Cs
The inverter device according to claim 2, having 2). 4. A first switching element (SW1) connected between one end of a DC power supply (1) and one end of a load (2).
), A second switching element (SW2) connected between the other end of the DC power source (1) and one end of the load (2), and the first and second switching elements (SW1, SW2). )
First and second respectively connected in reverse parallel to
A main-phase or multi-phase bridge type or half-bridge type inverter device having main diodes (D1 and D2) and supplying AC power to the load (2). -First and second capacitors (C1, C2) connected in parallel to the respective terminals (D1, D2), and the first and second switching elements (SW1, SW2)
) To the first and second auxiliary diodes (DL1,
First and second reactors (L1, L2) connected in parallel via DL2), and a first parallel connected to the first and second auxiliary diodes (DL1, DL2). And second auxiliary capacitors (Cs1, Cs2), and the first and second switching elements (SW1, SW2)
) Is turned on, and the first and second control pulses are generated so that the first and second control pulses are alternately generated with a predetermined time gap between them. And a switch control circuit provided therein. Single-phase or multi-phase bridge type or half bridge type inverter device.