JP2962388B2 - Two-stone insulated switching power supply - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-pole insulated switching power supply, and more particularly to a two-pole insulated switching power supply capable of reducing switching loss.

[0002]

2. Description of the Related Art In recent years, there has been a strict demand for miniaturization of electronic equipment, and there has also been a strong demand for miniaturization of a switching power supply, which is a power supply device used therein. In order to reduce the size of the switching power supply, the switching frequency is generally increased by increasing the switching frequency.However, when the switching frequency is increased, the switching loss of the main switching element increases and the amount of heat generated by the main switching element increases. The size has increased, which has been an obstacle to downsizing. For this reason, the downsizing of the switching power supply is an important factor not only in increasing the frequency but also in increasing the efficiency. For example, a first main switching element and a transformer
Connecting the secondary winding and the second main switching element in series,
A rectifying / smoothing circuit is connected between the secondary winding of the transformer and the load, and the first and second main switching elements are simultaneously turned on.
An off-control generates an AC voltage from the secondary winding of the transformer, converts the AC voltage to a DC voltage by a rectifying and smoothing circuit, and supplies a DC output of a constant voltage level different from the DC power supply voltage to the load. Since a two-pole insulated switching power supply can use a small main switching element having a low withstand voltage, it has been widely used as a relatively small and inexpensive switching power supply.

[0003]

By the way, in the above-mentioned two-piece insulated switching power supply, the current waveform and the voltage waveform overlap each other during the on-conversion period and the off-conversion period of the first and second main switching elements. There is a drawback that a switching loss based on this occurs in each main switching element. In addition, this switching loss causes Joule heat, and the amount of heat generated by each main switching element increases. Therefore, the dimensions of the heat dissipating fins and the like become very large, and there is a disadvantage that it is extremely difficult to reduce the size of the entire device.

Accordingly, an object of the present invention is to provide a two-pole insulated switching power supply capable of reducing switching loss.

[0005]

According to the present invention, there is provided a dual-switch type insulated switching power supply comprising a first main switching element, a primary winding of a transformer, and a second main switching element connected in series at both ends of a DC power supply. Connecting a rectifying / smoothing circuit between a secondary winding of the transformer and a load;
An AC voltage is generated from the secondary winding of the transformer by simultaneously turning on and off the main switching elements of the transformer, and the AC voltage is converted into a DC voltage by the rectifying and smoothing circuit, and the voltage of the DC power supply is changed. Is a two-pole insulated switching power supply that supplies a DC output of a different constant voltage level to the load, wherein a first resonance reactor, a first backflow prevention rectifier, and a first backflow prevention rectifier are arranged in parallel with the first main switching element. A first series circuit with one auxiliary switching element is connected, and a second resonance reactor, a second backflow prevention rectifying element, and a second auxiliary switching element are connected in parallel with the second main switching element. A second series circuit is connected, a main control pulse signal is applied to each control terminal of the first and second main switching elements according to a terminal voltage of the load, and Wherein prior to applying the pulse signal first
And an auxiliary control pulse signal is applied to each control terminal of the second auxiliary switching element. Further, in the present invention, a tertiary winding of the transformer is inserted in series with the first series circuit, and a quaternary winding of the transformer is inserted in series with the second series circuit.

[0006]

Before the main control pulse signal is applied to each control terminal of the first and second main switching elements, an auxiliary control pulse signal is applied to each control terminal of the first and second auxiliary switching elements to provide each auxiliary control signal. When the switching elements are turned on at the same time, the current flowing through each auxiliary switching element gradually increases from zero. When the current value becomes equal to the value obtained by converting the load current value to the primary winding of the transformer, the first and second values are obtained.
The voltage applied to the main switching element gradually drops. When the voltage becomes 0 V, a main control pulse signal is applied to each control terminal of the first and second main switching elements to turn on each main switching element at the same time. Switching loss can be reduced. In particular, in the present invention, since the tertiary and quaternary windings of the transformer are inserted, the first and second auxiliary switching elements are simultaneously turned off at zero current, and the switching loss can be further reduced. It is.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a double-type insulated switching power supply according to the present invention will be described below with reference to FIGS. 1 and 2 and FIGS. 6 and 7. FIG. The insulated switching power supply of the present embodiment is shown in FIG.
As shown in FIG. 1, a first N-channel MOSFET 3 as a first main switching element, a primary winding 5 of a transformer 4, and a second N-channel MOSFET 6 as a second main switching element are provided at both ends of the DC power supply 1. Are connected in series. The first and second MOSFETs 3 and 6 are equivalently provided with the switching element bodies 12 and 15 and the built-in diodes 13 and 16 connected in anti-parallel between the source and drain terminals of the switching element bodies 12 and 15, respectively.
And built-in capacitors 14 and 17 connected in parallel to the built-in diodes 13 and 16. The built-in diodes 13 and 16 and the built-in capacitors 14 and 17 are a parasitic diode and a parasitic capacitance between the source and drain terminals of the MOSFETs 3 and 6, respectively. Note that the first and second M
OSFETs 3 and 6 having the same electrical characteristics are used. Secondary winding 8 of transformer 4 and output terminals 19 and 20
A rectifying / smoothing circuit 35 including a rectifying diode 7 and a freewheeling diode 9, a smoothing reactor 10 and a smoothing capacitor 11 is connected between the rectifying diode 7 and the return diode 9. Output terminal 19, 2
The load 2 is connected between 0. First MOSFET
3, a first resonance reactor 27, a first backflow prevention diode 26 as a first backflow prevention rectifying element, and a third N-channel as a first auxiliary switching element. A series circuit with the MOSFET 25 is connected. A second resonance reactor 3 is provided between the source and drain terminals of the second MOSFET 6.
2, a series circuit of a second backflow prevention diode 31 as a second backflow prevention rectifier and a fourth N-channel MOSFET 30 as a second auxiliary switching element is connected. Third and fourth MOSFETs 25, 30
Are equivalently equivalent to the switching element body portions 28, 3 respectively.
3 and built-in diodes 29 and 34, and has a parasitic capacitance between the source and drain terminals like the first and second MOSFETs 3 and 6, but has the first and second MOSFETs.
It is used for a shorter time than T3 and T6, and a MOSFET having a small parasitic capacitance is used. First
And the second resonance reactors 27 and 32 are used to moderate the increase in current during the on-turning period of the switching element main bodies 28 and 33 that constitute the third and fourth MOSFETs 25 and 30, respectively. . The first and second resonance reactors 27 and 32 and the third and fourth MOs
SFETs 25 and 30 having the same electrical characteristics are used. Further, the output terminals 19 and 20 and the first to fourth M
Between the gate terminals of the OSFETs 3, 6, 25 and 30, a main control pulse signal is applied to each gate terminal of the first and second MOSFETs 3 and 6 according to the voltage of the output terminals 19 and 20, Before applying the main control pulse signal, a control circuit 18 for applying an auxiliary control pulse signal is connected to each gate terminal of the third and fourth MOSFETs 25 and 30.

The details of the control circuit 18 are as shown in FIG.
Voltage detection circuit 5 connected to output terminals 19 and 20 of the power supply
1, a PWM pulse forming circuit 52 including a reference voltage source 53, an error amplifier 54, a PWM (pulse width modulation) control circuit 55, a delay circuit 56, an AND gate 57, a monostable multivibrator 60, a first ~ 4th drive circuit 5
8, 59, 61 and 62. The voltage detection circuit 51 is composed of a voltage division circuit, and this voltage division point, that is, a detection line is connected to the inverting input terminal of the error amplifier 54.
The error amplifier 54 has a non-inverting input terminal connected to the reference voltage source 53, and a reference voltage of the reference voltage source 53 and the voltage detection circuit 5.
A signal corresponding to the difference between the detected voltages is output. The PWM control circuit 55 connected to the output terminal of the error amplifier 54
A triangular wave generator and a voltage comparator are included, and the voltage comparator generates a square wave having a constant period. In addition, PWM
In this embodiment, a PWM control IC (integrated circuit) is used as the control circuit 55. For example, a commercially available MB3759, μPC
494 or the like can be used. One input terminal of the AND gate 57 is directly connected to the PWM control circuit 55, and the other input terminal of the AND gate 57 is connected to the PWM circuit via the delay circuit 56.
It is connected to the control circuit 55. The monostable multivibrator 60 is directly connected to the PWM control circuit 55. The output terminal of the AND gate 57 is connected to the first and second FET control lines 21 and 22 via the first and second drive circuits 58 and 59. The monostable multivibrator 60 is connected to the third and fourth FET control lines 23 and 24 via the third and fourth drive circuits 61 and 62. First to fourth FET control lines 21 to 24
Are connected to respective gate terminals of the first to fourth MOSFETs 3, 6, 25, and 30, respectively.

FIG. 7 shows voltage waveforms at points A, B and C in FIG.
(A), (B) and (C) show. 7 from the PWM control circuit 55
A square wave pulse (PWM pulse) having a pulse width T _ON shown in FIG. 7A is repeatedly generated with a period T (point A in FIG. 6). When the output voltage of the power supply becomes higher than the reference value, the pulse width T _ON becomes narrow, and when the output voltage of the power supply becomes lower than the reference value, the pulse width T _ON becomes wide. This is the same as the operation of a general PWM control switching power supply. Since the pulse and delayed pulse delay time T ₂ for the pulse of Figure 7 to the AND gate 57 (A) is inputted, the AND gate 5
The main control pulse signal shown in FIG. 7B is output from the output terminal 7 (point B in FIG. 6). On the other hand, the pulse shown in FIG. 7A is also input to the monostable multivibrator 60, and the auxiliary control pulse signal shown in FIG. 7C is output from the monostable multivibrator 60 (point C in FIG. 6). The auxiliary control pulse signal is a pulse signal with a period T having a predetermined pulse width T _1. The main control pulse signal is supplied to the first and second drive circuits 5
The auxiliary control pulse signal is applied to the gate terminals of the first and second MOSFETs 3 and 6 via the second and third driving circuits 61 and 62, respectively.
The voltage is applied to each gate terminal of the OSFETs 25 and 30. Therefore, before the control circuit 18 having the above configuration detects the terminal voltage of the load 2 and applies the main control pulse signal to each gate terminal of the first and second MOSFETs 3 and 6, the third
And an auxiliary control pulse signal can be applied to each gate terminal of the fourth MOSFETs 25 and 30.

In the above configuration, the first to fourth MOSs
When all of the FETs 3, 6, 25, and 30 are off (FIG. 2)
Before t ₀ ), no current flows through the primary winding 5 and the secondary winding 8 of the transformer 4. Therefore, no voltage is applied to the primary winding 5 of the transformer 4 and the first and second MOSFETs
Each of the built-in capacitors 14 and 17 in T3 and T6 is charged to a voltage V _IN / 2 which is half of the power supply voltage V _IN of the DC power supply 1. Further, no voltage is induced in the secondary winding 8 of the transformer 4, and the rectifying diode 7 in the rectifying / smoothing circuit 35 is off. At this time, the load 2 includes the smoothing reactor 1
0, smoothing capacitor 11 and load 2, freewheeling diode 9
The load current I _OUT flows through the path.

As shown in FIG. 2B, at t ₀ , an auxiliary control pulse signal is applied from the control circuit 18 to each of the gate terminals of the third and fourth MOSFETs 25 and 30, and the switching element bodies 28 and 33 are provided. When the auxiliary control pulse signal voltages V _G3 , V _G4 of FIG. 3 change from the low level to the high level, the switching element bodies 28, 33 are simultaneously turned on. At this time, the switching element body 28, the first backflow prevention diode 26, the first resonance reactor 27, the primary winding 5 of the transformer 4, the second resonance reactor 32, and the second Current starts to flow through the path of the backflow prevention diode 31 and the switching element body 33. A voltage is induced in the secondary winding 8 of the transformer 4, and the rectifier diode 7 in the rectifier / smoothing circuit 35 is turned on and current flows. However, while the current flowing through the rectifier diode 7 is equal to or less than the load current I _{OUT, the} current is returned. The diode 9 keeps the ON state. Therefore, while the current flowing through the rectifier diode 7 is equal to or less than the load current I _{OUT, the} primary windings 5 and 2
The voltage induced in the next winding 8 remains at approximately 0V. Therefore, the currents I _Q3 , I _Q4 flowing through the respective switching element bodies 28, 33 in the third and fourth MOSFETs 25, 30
Is a gradient (V _IN / (L ₂₇ + L ₃₂ )) related to the substantially power supply voltage V _IN and the inductances L ₂₇ and L ₃₂ of the first and second resonance reactors 27 and 32 as shown in FIG. ) At 0
Gradually increase from. Also, third and fourth MOS
Each switching element body 28 in the FETs 25 and 30;
The voltages V _Q3 and V _Q4 applied to 33 drop quickly to 0 V as shown in FIG.

As shown in FIG. 2F, at t ₁ , the currents I _Q3 and I _Q4 flowing through the switching element bodies 28 and 33 in the third and fourth MOSFETs 25 and 30 have a load current value of one. When it reaches the value converted to the next winding, each of the built-in capacitors 14, 1 in the first and second MOSFETs 3, 6
7 begins to be discharged, and the first resonance reactor 27
And built-in capacitor 14 and second resonance reactor 32
And the built-in capacitor 17 resonate. For this reason,
As shown in FIG. 2 (G), the internal capacitor 14, the switching element main body 28, the first backflow prevention diode 26 and the loop of the first resonance reactor 27, the internal capacitor 17, the second resonance reactor Resonant currents flow through the loops of the second backflow prevention diode 31 and the switching element body 33 ( _IC14 , _IC17 ). Therefore, as shown in FIG.
Each switching element body 28,3 in ET25,30
The currents I _Q3 and I _Q4 flowing through 3 increase sinusoidally. Also, as shown in FIG. 2C, the first and second MOSFETs
The voltages V _Q1 and V _Q2 applied to the respective switching element bodies 12 and 15 in 3 and 6 are the first and second MOSFETs 3 and
The voltage drops to 0 V due to the discharge of the internal capacitors 14 and 17 in 6.

At t ₂ , the first and second MOSFETs
When all the electric charges accumulated in the built-in capacitors 14 and 17 in the third and sixth capacitors 6 and 17 are discharged, as shown in FIG. The voltages V _Q1 and V _Q2 applied to 15 become 0V. Also, as shown in FIGS. 2F and 2G, the built-in capacitor 1
4, the switching element main body 28, the first backflow prevention diode 26 and the loop of the first resonance reactor 27, the built-in capacitor 17, and the second resonance reactor 3.
2. Resonant currents flowing through the second backflow prevention diode 31 and the loop of the switching element body 33 each reach a maximum value. At this time, the first and second resonance reactors 2
2 (G) and 2 (H) due to the inertia of the current of each of the resonance reactors 27 and 32 due to resonance between the internal capacitors 7 and 32 and the internal capacitors 14 and 17 in the first and second MOSFETs 3 and 6.
As shown in FIG.
_C14 and I _C17 are commutated to the built-in diodes 13 and 16 in the first and second MOSFETs 3 and 6, respectively (I _D13 and I _D16 ). Therefore, the switching element body 28, the first backflow prevention diode 26, the first resonance reactor 27 and the loop of the built-in diode 13, the second resonance reactor 32, the second backflow prevention diode 31, The currents I _D13 and I _D16 shown in FIG. _2H flow through the loops of the switching element body 33 and the built-in diode 16, respectively. Also, as shown in FIG. 2F, the third and fourth M
Each switching element body 2 in OSFETs 25 and 30
The currents I _Q3 , I _Q4 flowing through 8, 33 become substantially constant thereafter because the voltage drop of the first and second resonance reactors 27, 32 is substantially 0V.

As shown in FIG. 2A, at t ₃ , a main control pulse signal is applied from the control circuit 18 to each gate terminal of the first and second MOSFETs ₃ and 6, and each of the switching element bodies 12 and 15 is applied. The main control pulse signal voltage V _G1 ,
When _VG2 goes from a low level to a high level, the switching element bodies 12, 15 are simultaneously turned on. At this time, since the voltages V _Q1 and V _G2 applied to the switching element bodies 12 and 15 are 0V as shown in FIG. 2C, the switching element bodies 12 and 15 are turned on at 0V. Therefore, each switching element body 12, 15
In the ON transition period, zero voltage switching with almost no switching loss can be realized. At this point, since the switching element main bodies 28 and 33 are in the ON state, all the current flowing through the primary winding 5 is changed by the inertia of the current flowing through the first and second resonance reactors 27 and 32. As shown in FIG. 2 (E), currents I _Q1 , I
_Q2 does not flow.

As shown in FIG. 2B, at t ₄ , the third
And the auxiliary control pulse signal voltages V _G3 , V of the switching element main bodies 28, 33 of the fourth MOSFETs 25, 30.
_{When the} level of _G4 changes from the high level to the low level, the switching element main units 28 and 33 are simultaneously turned off. At this time, as shown in FIGS. 2 (E) and (F), the primary winding 5 of the transformer 4 flowing through the switching element main bodies 28 and 33 is formed.
Current (I _Q3 , I _Q4 ) of the first and second MOSFETs
It is commutated to the switching element main parts 12 and 15 in I and II (I _Q1 and I _Q2 ).

[0016] As shown in FIG. 2 (A), first at t ₅
When the main control pulse signal voltages V _G1 and V _{G2 of the} switching element bodies 12 and 15 of the second MOSFETs 3 and 6 change from a high level to a low level, the switching element bodies 12 and 15 are simultaneously turned off. At this time, due to the inertia of the current of the primary winding 5 of the transformer 4, a charging current flows through the internal capacitors 14 and 17 in the first and second MOSFETs 3 and 6 as shown in FIG. The built-in capacitors 14 and 17 are charged, and the voltages V _Q1 and V _Q2 applied to the switching element bodies 12 and 15 gradually rise from 0 V as shown in FIG. 2C.

As shown in FIG. 2C, at t ₆ , the first
And the built-in capacitors 1 of the second MOSFETs 3 and 6
4 and 17, ie, the first and second MOSFs.
When the voltages V _Q1 and V _Q2 applied to the switching element bodies 12 and 15 of the ETs 3 and 6 respectively reach V _IN / 2 (V _IN : power supply voltage of the DC power supply 1), the primary winding 5 of the transformer 4
And the voltage induced in the secondary winding 8 is approximately 0V. At the same time, the rectifying diode 7 in the rectifying / smoothing circuit 35 is turned off, the exciting inductance of the transformer 4 and the built-in capacitors 14 and 17 resonate, and the voltages V _Q1 and V _Q2 further increase in a sine function. . Then, each voltage V _Q1 , V
_When the maximum value of _Q2 reaches the sum of the maximum value of the resonance voltage and the voltage V _IN / 2, respectively, the voltages V _Q1 and V _Q2 fall sinusoidally, and at t ₇ , the voltages V _Q1 and V _{Q Q2} is each equal to V _IN / 2. At this time, no current flows through the primary winding 5 and the secondary winding 8 of the transformer 4, and no voltage is induced. A load current I _OUT flows through the load 2 through the path of the smoothing reactor 10, the smoothing capacitor 9, the load 2, and the return diode 9.

As described above, in the present embodiment, the first and second
Switching element body 1 of MOSFETs 3 and 6
2 and 15 are simultaneously turned on at 0V and the third
Since the rising of the current waveform of each switching element body 28, 33 of the fourth MOSFET 25, 30 becomes gentle, each switching element body 12, 15, 28,
It is possible to reduce the switching loss at the time of turning on (turning on) the switch 33.

Next, another embodiment of the double-pole insulated switching power supply according to the present invention will be described with reference to FIGS. However, in FIG. 3, the same portions as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. The details of the control circuit 18 in FIG. 3 are exactly the same as those in FIGS. 6 and 7 shown in the embodiment of FIG. In the circuit of the embodiment shown in FIG. 3, a tertiary winding 37 is connected between the third MOSFET 25 and one end of the DC power supply 1 so as to be connected to the primary winding 5 and the secondary winding 8 of the transformer 4 in reverse polarity. And the fourth MOSFET 30
A quaternary winding 38, which is coupled to the primary winding 5 and the secondary winding 8 of the transformer 4 with the opposite polarity, is inserted between the other end of the DC power supply 1 and the other end. That is, the tertiary windings 37 and 4 of the transformer 4
When the respective switching element bodies 12 and 15 in the first and second MOSFETs 3 and 6 are in an on state, the secondary winding 38 has a direction opposite to the current flowing through the first and second resonance reactors 27 and 32. When the switching elements 12 and 15 are turned on so that a voltage is induced and the switching element bodies 12 and 15 are turned on, the current flowing through the switching element bodies 28 and 33 of the third and fourth MOSFETs 25 and 30 is gradually reduced. , For turning off each switching element body 28, 33 with zero current. Incidentally, N ₃ between the number of turns N ₃ of the third winding 37 and the winding number N ₄ of 4 winding 38
Relationship of = N _4.

In the above configuration, the first to fourth MOSs
When all of the FETs 3, 6, 25, and 30 are off (FIG. 4)
Of t ₀ earlier), 1 of the transformer 4 to fourth winding 5 and 8,
No current flows through 37 and 38. Therefore, transformer 4
No voltage is applied to the primary winding 5 and the first and second M
Each of the built-in capacitors 14 and 17 in the OSFETs 3 and 6 is charged to a voltage V _IN / 2 which is half the power supply voltage V _IN of the DC power supply 1. Also, no voltage is induced in the secondary to quaternary windings 8, 37, 38 of the transformer 4, and the rectifying and smoothing circuit 3
The rectifier diode 7 in 5 is in an off state. At this time,
The load 2 includes a smoothing reactor 10 and a smoothing capacitor 11
And the load current I _OUT through the path of the load 2 and the return diode 9
Flows.

As shown in FIG. 4B, at t ₀ , an auxiliary control pulse signal is applied from the control circuit 18 to each of the gate terminals of the third and fourth MOSFETs 25 and 30, and each of the switching element bodies 28 and 33. When the auxiliary control pulse signal voltages V _G3 , V _G4 of FIG. 3 change from the low level to the high level, the switching element bodies 28, 33 are simultaneously turned on. At this time, the DC power supply 1 switches to the tertiary winding 3 of the transformer 4.
7, switching element body 28, first backflow prevention diode 26, first resonance reactor 27, primary winding 5 of transformer 4, second resonance reactor 32, second backflow prevention diode 31 , Switching element body 3
The current starts to flow in the path of the third winding 3 and the quaternary winding 38 of the transformer 4. A voltage is induced in the secondary winding 8 of the transformer 4, and the rectifier diode 7 in the rectifier / smoothing circuit 35 is turned on and current flows. However, while the current flowing through the rectifier diode 7 is equal to or less than the load current I _{OUT, the} current is returned. The diode 9 keeps the ON state. Therefore, while the current flowing through the rectifier diode 7 is equal to or less than the load current I _{OUT, the} voltage induced in the primary to quaternary windings 5, 8, 37, and 38 of the transformer 4 remains at approximately 0V. Therefore, the third and fourth MOSFETs 25, 3
The currents I _Q3 and I _Q4 flowing through the respective switching element bodies 28 and 33 within 0 are substantially equal to the power supply voltage V _{IN as} shown in FIG.
And the gradient (V _IN / (L ₂₇ + L) related to the inductances L ₂₇ and L ₃₂ of the first and second resonance reactors ₂₇ and _32.
32 )) It gradually increases from 0 in step. Further, the voltages V _Q3 and V _Q4 applied to the respective switching element bodies 28 and 33 in the third and fourth MOSFETs 25 and 30 rapidly drop to 0 V as shown in FIG.

As shown in FIG. 4F, at t ₁ , the currents I _Q3 and I _Q4 flowing through the respective switching element bodies 28 and 33 in the third and fourth MOSFETs 25 and 30 have a load current value of 1 When it reaches the value converted to the next winding, each of the built-in capacitors 14, 1 in the first and second MOSFETs 3, 6
7 begins to be discharged, and the first resonance reactor 27
And built-in capacitor 14 and second resonance reactor 32
And the built-in capacitor 17 resonate. For this reason,
As shown in FIG. 4 (G), the built-in capacitor 14, the transformer 4
Of the tertiary winding 37, the switching element body 28, the first backflow prevention diode 26 and the first resonance reactor 27, the built-in capacitor 17, the second resonance reactor 32, and the second backflow. Resonant currents flow in the loops of the prevention diode 31, the switching element body 33, and the quaternary winding 38 of the transformer 4, respectively ( _IC14 , _IC17 ). Therefore, as shown in FIG.
Each switching element body 28 in the FETs 25 and 30;
Currents I _Q3 and I _Q4 flowing through 33 increase sinusoidally.
Also, as shown in FIG. 4C, the first and second MOSFETs
The voltages V _Q1 and V _Q2 applied to the switching element bodies 12 and 15 in T3 and T6 are the first and second MOSFETs.
The voltage drops to 0 V due to the discharge of the internal capacitors 14 and 17 in 3 and 6.

At t ₂ , the first and second MOSFETs
When all the electric charges accumulated in the built-in capacitors 14 and 17 in the first and second MOSFETs 3 and 6 are discharged, respectively, as shown in FIG. The voltages V _Q1 and V _Q2 applied to 15 become 0V. As shown in FIGS. 4F and 4G, the built-in capacitor 1
4, the tertiary winding 37 of the transformer 4, the switching element body 28, the first backflow prevention diode 26 and the loop of the first resonance reactor 27, the built-in capacitor 17, the second resonance reactor 32, The resonance current flowing through the loop of the second backflow prevention diode 31, the switching element body 33, and the quaternary winding 38 of the transformer 4 each reaches a maximum value. At this time, the first and second resonance reactors 2
4G and 4H due to the inertia of the current in each of the resonance reactors 27 and 32 due to the resonance between the internal capacitors 7 and 32 and the internal capacitors 14 and 17 in the first and second MOSFETs 3 and 6.
As shown in FIG.
_C14, I _C17, respectively commutated to the built-in diode 13, 16 in the first and second _{MOSFET3,6 (I D1 3, I D16} ). Accordingly, the tertiary winding 37 of the transformer 4, the switching element main body 28, the first backflow prevention diode 26, the first resonance reactor 27, the loop of the built-in diode 13, and the second resonance reactor 3
2. The currents I _D13 and I _D13 shown in FIG.
_D16 flows. Also, the first and second MOSFETs 3,
When the voltages V _Q1 and V _Q2 applied to the respective switching element bodies 12 and 15 in 6 become 0 V, the primary winding 5 of the transformer 4
Becomes equal to the power supply voltage V _IN of the DC power supply 1, and the voltage V _N2 = (N ₂ / N ₁ ) · V _IN (N ₂ :
The number of turns of the secondary winding 8) is induced. Further, the tertiary winding 37 and the quaternary winding 38 of the transformer 4 have current _ID13 ,
Voltages of opposite polarity to the direction of flow of _{I D16 V N3 = - (N} 3 /
N ₁ ) · V _IN , V _N4 = − (N ₄ / N ₁ ) · V _IN (N ₃ : the number of turns of the tertiary winding 37, N ₄ : the number of turns of the quaternary winding 38, where N ₃ =
N ₄ ) is induced. Therefore, the currents flowing through the first and second resonance reactors 27 and 32, that is, the currents I _Q3 and I _Q4 flowing through the switching element bodies 28 and 33 and the currents I _D13 and I _D13 flowing through the built-in diodes 13 and 16, respectively.
_D16 is Fig 4 (F) and (H) respectively from the maximum value of the resonant current as shown _{- (N 3 / N 1)} · (V IN / L 27), - (N 4 /
It gradually decreases with a slope of N ₁ ) ・ (V _IN / L ₃₂ ) (however, N ₃ = N ₄ , L ₂₇ = L ₃₂ ).

As shown in FIG. 4A, at t ₃ , a main control pulse signal is applied from the control circuit 18 to each gate terminal of the first and second MOSFETs ₃ and 6, and each switching element body 12, 15 The main control pulse signal voltage V _G1 ,
When _VG2 goes from a low level to a high level, the switching element bodies 12, 15 are simultaneously turned on. At this time, since the voltages V _Q1 and V _Q2 applied to the switching element bodies 12 and 15 are 0V as shown in FIG. 4C, the switching element bodies 12 and 15 are turned on at 0V. Therefore, each switching element body 12, 15
In the ON transition period, zero voltage switching with almost no switching loss can be realized. At this time, since the switching element bodies 28 and 33 in the third and fourth MOSFETs 25 and 30 are on, the currents I _Q3 and I _Q4 continue to flow through the switching element bodies 28 and 33, respectively. 4 (F), − (N ₃ / N ₁ ) · (V _IN /
L ₂₇ ), − (N ₄ / N ₁ ) · (V _IN / L ₃₂ ) (where N ₃ =
(N ₄ , L ₂₇ = L ₃₂ ).

At t ₄ , the first and second MOSFEs
When the currents I _D13 and I _D16 flowing through the built-in diodes 13 and 16 in T3 and T6 become 0 as shown in FIG.
4 and the currents I _Q3 and I _Q4 flowing through the switching element bodies 28 and 33 in the fourth MOSFETs 25 and 30, respectively.
As shown in (F), the load current value reaches a value converted to the primary winding. At this time, as shown in FIG.
Switching elements 12, 1 in MOSFETs 3, 6
5, the currents I _Q1 and I _Q2 start flowing and gradually increase.
At the same time, the current I flowing through each of the switching element bodies 28 and 33 in the third and fourth MOSFETs 25 and 30 is
_Q3, I _Q4, as shown in FIG. _{4 (F) - (N 3} / N 1) · (V IN
/ L ₂₇ ),-(N ₄ / N ₁ ) · (V _IN / L ₃₂ ) (where N ₃ =
(N ₄ , L ₂₇ = L ₃₂ ).

As shown in FIG. 4F, at t ₅ , the third
The currents I _Q3 and I _Q4 flowing through the switching element bodies 28 and 33 in the fourth MOSFETs 25 and 30 become zero. As shown in FIG. 4 (E), all the current of the primary winding 5 of the transformer 4 flows through the respective switching element main bodies 12 and 15 in the first and second MOSFETs 3 and 6 (I _Q1 ,
I _Q2 ). At this time, as shown in FIG.
Auxiliary control pulse signal voltage of each switching element main body section 28, 33 in MOSFET25,30 of V _G3, V _G4 is made of a high level to a low level, the switching element main body section 28 and 33 are turned off simultaneously. For this reason, zero current switching with small switching loss can be realized even in the off-turning period of each of the switching element main bodies 28 and 33 in the third and fourth MOSFETs 25 and 30. In addition, since the switching element bodies 28 and 33 are simultaneously turned off with zero current, no surge component is generated due to the inductance of the circuit wiring or the intermittent current flowing through the first and second resonance reactors 27 and 32.

As shown in FIG. 4A, at t ₆ , the first
And the main control pulse signal voltage V _G1, V _G2 of the second switching element main body section 12 and 15 in the MOSFET3,6 is composed of a high level and low level, the switching element main body section 12 and 15 are turned off simultaneously. At this time, as shown in FIG. 4 (G), the first and second MOSFETs 3, 6
A charging current flows through each of the built-in capacitors 14 and 17 in FIG. 4, and the built-in capacitors 14 and 17 are charged and the voltages V _Q1 and V _Q2 applied to each of the switching element main bodies 12 and 15 are shown in FIG.
It gradually increases from 0 V as shown in FIG.

As shown in FIG. 4C, at t ₇ , the first
And the built-in capacitors 1 of the second MOSFETs 3 and 6
4 and 17, ie, the first and second MOSFs.
When the voltages V _Q1 and V _Q2 applied to the switching element bodies 12 and 15 of the ETs 3 and 6 respectively reach V _IN / 2 (V _IN : power supply voltage of the DC power supply 1), the primary winding 5 of the transformer 4
And the voltage induced in the secondary winding 8 is approximately 0V. At the same time, the rectifying diode 7 in the rectifying / smoothing circuit 35 is turned off, the exciting inductance of the transformer 4 and the built-in capacitors 14 and 17 resonate, and the voltages V _Q1 and V _Q2 further increase in a sine function. . Then, each voltage V _Q1 , V
_When the maximum value of _Q2 reaches the sum of the maximum value of the resonance voltage and the voltage V _IN / 2, the voltages V _Q1 and V _Q2 drop sinusoidally, and at t ₈ , the voltages V _Q1 and V _Q2 . _Q2 is each equal to V _IN / 2. At this time, the primary to
No current flows through the quaternary windings 5, 8, 37, 38, and no voltage is induced. The load 2 includes a smoothing reactor 10, a smoothing capacitor 9, a load 2, and a return diode 9.
The load current I _OUT flows through the path.

As described above, the embodiment shown in FIG. 3 can obtain the same effect as that of the embodiment shown in FIG. 1 with respect to the switching loss. Further, in the embodiment shown in FIG.
Zero-current switching with little switching loss can be realized even during the off-turning period (turn-off) of each of the switching element main bodies 28 and 33 in the MOSFETs 25 and 30. Therefore, the inductance of the circuit wiring and the first and second resonances are reduced. No surge component occurs due to the intermittent current flowing through the reactors 27 and 32. Therefore, the embodiment shown in FIG. 3 is more effective than the embodiment shown in FIG.

The embodiment of the present invention is not limited to the above embodiment, and various modifications are possible. For example, the following (a)-
(e) is a part of the modification. (A) First to fourth MOSFETs 3, 6, 25, 30
Each of the built-in diodes 13, 16, 29, and 34 may be an independent diode instead of being a built-in diode. (B) An independent capacitor can be connected to each of the built-in capacitors 14 and 17 in the first and second MOSFETs 3 and 6 without using the parasitic capacitance of the MOSFET. (C) Instead of MOSFETs, bipolar transistors, thyristors, and the like can be used as the main switching element and the auxiliary switching element. When an element that does not include a diode of a reverse polarity, such as a bipolar transistor or a thyristor, is used, the diodes 26 and 31 for preventing reverse current need not be inserted. (D) The circuit of the embodiment shown in FIG. 1 may be modified to the circuit shown in FIG. The diode 36 shown in FIG.
Need not be inserted. (E) The resonance reactors 27 and 32 may use the leakage inductance of the transformer 4.

[0031]

As described above, according to the present invention, zero voltage switching of the first and second main switching elements can be easily achieved, so that the voltage waveform and the current waveform of each main switching element overlap. And the power loss at the on-turning period of each main switching element, that is, the switching loss at the time of turning on each main switching element, can be reduced. For this reason, the amount of heat generated by each main switching element can be reduced to reduce the size of the heat dissipating fins and the like, so that a high-frequency switching is possible and a small two-piece insulated switching power supply can be realized.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram of a two-piece insulated switching power supply showing an embodiment of the present invention.

FIG. 2 is a waveform chart showing voltages and currents of respective parts of the circuit of FIG.

FIG. 3 is an electric circuit diagram of a two-piece insulated switching power supply showing another embodiment of the present invention.

FIG. 4 is a waveform chart showing the voltage and current of each part of the circuit of FIG.

FIG. 5 is an electric circuit diagram showing a modification of the circuit of FIG. 1;

FIG. 6 is a block diagram showing details of a control circuit shown in FIGS. 1, 3 and 5;

FIG. 7 is a waveform chart showing voltages of respective parts of the circuit of FIG. 6;

[Explanation of symbols]

1. . . DC power supply, 2. . . Load 3, 6, 25, 3
0. . . First to fourth N-channel MOSFETs,
4. . . Trans, 5, 8, 37, 38. . . Primary to 4
6. Next winding, . . Rectifier diode, 9. . . Reflux diode; . . 10. smoothing reactor, . . Smoothing capacitor, 18. . . Control circuit, 19, 20. . . Output terminals, 26, 31. . . First and second backflow prevention diodes, 27, 32. . . First and second resonance reactors,
35. . . Rectifier smoothing circuit

Claims (1)

(57) [Claims] 1. A first main switching element, a primary winding of a transformer, and a second main switching element are connected in series to both ends of a DC power supply, and a second main switching element is connected between a secondary winding of the transformer and a load. A rectifying / smoothing circuit is connected, an AC voltage is generated from the secondary winding of the transformer by simultaneously turning on and off the first and second main switching elements, and the AC voltage is supplied to the rectifying / smoothing circuit. And a DC output of a constant voltage level different from the voltage of the DC power supply to the load, wherein the first switching element is connected in parallel with the first main switching element. A first series circuit of a first reactor and a first backflow rectifying element and a first auxiliary switching element is connected, and a second resonance reactor and a second resonance switching element are connected in parallel with the second main switching element. A second series circuit of a rectifying element for preventing current flow and a second auxiliary switching element is connected, and a main control pulse signal is supplied to each control terminal of the first and second main switching elements according to a terminal voltage of the load. And applying an auxiliary control pulse signal to each control terminal of the first and second auxiliary switching elements before applying the main control pulse signal, in series with the first series circuit. The third winding of the transformer is inserted into the second series circuit, and the third winding of the transformer is connected in series with the second series circuit.
A two-stone insulated switching power supply characterized by inserting a secondary winding.