JPH0744453A - Data storage device - Google Patents

Abstract

PURPOSE:To provide a data storage device in which a write defect hardly takes place when data are written in a nonvolatile memory having a limit for a data write number of times. CONSTITUTION:A system area 10 of an EEPROM is made up of plural system data storage areas 10A1, 10A2...10Ai storing address information of a data area 11. When data writing to the data area results in causing a change in an address of head data in the stored data, final data address and a head address of an idle area or the like and in rewriting system data, the data are written in an area next to system data storage area 10Ai to which system data are written precedingly. Hereinafter, every time revision of system data takes place, the system data are written in an area different from the area in which data are written precedingly.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data storage device using a non-volatile memory having a limited number of times of writing data.

[0002]

Prior Art and Problems to be Solved by the Invention RA
In a device that stores data in a volatile memory such as M, the RAM is always backed up by a battery or the like in order to retain the data in the RAM even when the power of the device is turned off. On the other hand, there is also a data storage device in which data is stored in a non-volatile memory, for example, an electrically writable / erasable EEPROM, and backup of the memory by a battery or the like is unnecessary.

At present, the EEPROM has a limited number of times of writing data, and if writing is performed a certain number of times or more,
There is a problem that data cannot be written correctly.
An object of the present invention is to provide a data storage device in which a write failure is less likely to occur when writing data in a non-volatile memory having a limited number of data write times.

[0004]

A data storage device according to the present invention comprises a data storage means having a plurality of data storage areas for storing data, and a plurality of system data storages for storing system data indicating addresses of the data storage areas. And a write control means for writing new system data to a system data storage means different from the system data storage means to which the previous data was written when rewriting the system data.

[0005]

According to the present invention, when the address of the data stored in the data storage area is changed and the system data is rewritten, new system data is stored in the system data storage means different from the system data storage means in which the system data was written last time. I am trying to write. As a result, it is possible to prevent data from being repeatedly written in the same area and causing a write failure in the system data storage means.

[0006]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit block diagram of a data storage device according to one embodiment of the present invention.
00 pieces of name and address data can be stored in alphabetical order.

In FIG. 1, the control unit 1 temporarily stores in the RAM 4 the data consisting of the name and address input from the key input unit 3 according to the control program stored in the ROM 2, and is instructed to write the data. At this time, the data stored in the RAM 4 is stored in the EEPROM 5, which is a non-volatile memory. The data stored in the EEPROM 5 is stored in the key input unit 3 when reading the data.
In accordance with the operation of the cursor key (not shown), the data is read out in the normal order of the alphabet or in the reverse order and displayed on the liquid crystal display unit 6.

The power supply circuit section 7 is, for example, a circuit which stabilizes the output voltage of the solar cell 8 and supplies it to each section of the circuit. Further, the power supply circuit section 7 stabilizes a relatively high external voltage supplied from the external input terminal 9 and outputs it to the EEPROM 5 when writing data to the EEPROM 5.

The structure of the storage area of the EEPROM 5 will be described with reference to FIG. In this example, the EEPR
System area 1 which will be described later with addresses 1 to 100 of OM5
0, addresses 101 to 400 are allocated to the data area 11, and addresses 401 to 512 are allocated to the spare data area 12.

There are a plurality of data areas 11 (30 as described above).
0) data storage areas 11A ₁ , 11A _2, ... 11A
consists of _i . In this embodiment, the more data quantity of the set of name and address data, as when not be fed into a separate data storage area 11A _i stores by dividing the data into a plurality of data storage area 11A _i There is.

Each data storage area 11A _i is arranged in alphabetical order with an area 11a for storing a remaining pointer that points to the next address where the same data is stored when the same data is divided into a plurality of areas and stored. 11 for storing the previous pointer that points to the storage address of the immediately preceding data
b, an area 11c for storing name and address data, and an area 11d for storing a rear pointer that points to a storage address of the next data in alphabetical order.
Note that the spare data area 12 is also a plurality of data storage areas 1
Data area 1 consisting of 2A ₁ , 12A ₂ ... 12A _i
It has the same configuration as that of No. 1.

The system area 10 is the data area 1
It is composed of a plurality of system data storage areas 10A ₁ , 10A ₂ ... 10A _i for storing one address information. Each system data storage area 10A _i is an area 10 for storing a top pointer that points to the storage address of the first data in the data stored in the data area 11 in a predetermined order.
a, an area 10b that stores a bottom pointer that points to the storage address of the last data among the data that are stored in a predetermined order, an area 10c that stores the current pointer that points to the currently displayed address, and data Area 10d for storing a data free pointer that points to the start address of the free area in area 11 and area 1 that stores a free pointer for the spare area that points to the start address of the free area in the spare data area
0e and.

In this embodiment, when the system data is written in the system area 10, the system data storage area 10A is set so that the data is not repeatedly written in the same area.
Data is written to _i sequentially.

Now, as shown in FIG. 2, "AIDA ...", "KAMATA.
. "And" YAGI ... "are stored, and since the data of" AIDA ... "has a large amount of data, it is stored as divided into addresses" 101 "and" 102 ". To do.

The first data "AIDA ..." In alphabetical order is stored in the address "101", and the storage address "102" of the remaining divided data is stored in the remaining pointer 11a, and the previous pointer. 11b is the previous data in alphabetical order, in this case, the last data in alphabetical order, "YAGI ...".
The storage address “104” is stored. The rear pointer 11d stores the storage address "103" of "KAMATA ...", which is the next data in alphabetical order.

The second data "KAMATA ..." In alphabetical order is stored at the next address "102". Since this data is not divided into a plurality of data storage areas 11A _i , no address is stored in the remaining pointer 11a. The previous pointer 11a contains the storage address "10" of the preceding data "AIDA ...".
1 ”is stored, and the rear pointer 11c stores the storage address“ 104 ”of the next data“ YAGI ... ”.

On the other hand, the top pointer 10a of the system area 10 stores the storage address "101" of the first data "AIDA ..." Of the data stored in alphabetical order, and the bottom pointer 10b. , The storage address “1” of the last data among the data stored in alphabetical order “1”
04 ”is stored. In addition, data empty pointer 1
The start address “105” of the free area of the data area 11 is stored in 0d. The free area pointer 10e in the spare area stores "401" which is the start address of the spare data area 12.

Next, the operation at the time of writing data in the data storage device of the embodiment having the above configuration will be described with reference to the flowchart of FIG. In step S1 of FIG. 3, the data input from the key input unit 3 is stored in the RAM 4. If it is detected in step S2 that the write key (not shown) is operated, it is determined in step S3 whether or not an external voltage is supplied to the external input terminal 9. When the voltage for writing is supplied from the outside, the process proceeds to step S4 and it is determined whether or not the address pointed to by the data free pointer 10c is "401" or more. When the address pointed to by the data free pointer 10c is "401" or more, it means that the data is written in all the usable areas of the data area 11, so that the process proceeds to step S5 and new data is stored in the EEPROM 5. The liquid crystal display unit 6 displays that there is no area. Also, step S3
If the external voltage is not supplied at the time of writing the data in the determination of No., the process proceeds to step S6 and an error display is performed.

On the other hand, when the address pointed to by the data free pointer 10d is "400" or less in the determination of step S4,
That is, when there is a vacant area in the data area 11, the process proceeds to step S7, and the data to be written this time is searched alphabetically in order of the previous data and the next data. In the processing of this step S7, for example, the first character of the name data to be written and the first character of the name data already stored in the data area 11 are compared in order, and one character before the alphabetical data and one data Search later data.

Then, in the next step S8, the data is written in the area 11c of the address designated by the data free pointer 10d, and the previous pointer 11a of the address is written.
The storage address of the previous data to the rear pointer 11c
The storage address of the next data is written in each.
Then, in step S9, the data before writing and the EERO
It is determined whether or not the data actually written in M5 matches. At this time, if the data do not match, the data is written and read again, and the data before the writing and the data after the writing are compared.

If the data is normally written in the determination in step S9, the process proceeds to step S10, and the data in the system area 10 is rewritten. Here, the rewriting process of the system area 10 in step S10 will be described with reference to FIG.
~ It demonstrates with reference to FIG.

First, when the data shown in FIG. 2 is stored in the EEPROM 5, the data "N" shown in FIG.
The case of writing "AKANO ..." In the EEPROM 5 will be described.

In this case, since the data free pointer 10d points to the address "105", the data "NAKA"
"NO ..." is written to the address "105".
When the data is written to the address “105”, the start address of the empty area of the data area 11 changes from “105” to “106”, so that the system data is rewritten. When rewriting the system data, since the system data was written in the address "1" of the system area 10 last time as shown in FIG. 2, new system data is written in the next address "2" this time. .

As a result, as shown in FIG. 5, the empty address "106" is written in the data empty pointer 10d at the address "2" in the system area 10. In this case, since the contents of the other pointers have not changed except that the value of the current pointer 10c is different from the state of FIG. 2, the previous value is written as it is.

Next, the rewriting operation of the system area when rewriting the data stored in the EEPROM 5 will be described with reference to FIGS. 6 and 7. As shown in FIG. 6, the data area 11 of the EEPROM 5 has "AIDA.
"", "KAMATA ...", "YAGI ...", "N
It is assumed that the name and address data of four persons of "AKANO ..." are stored. Then, the top pointer 10a of the system area 10 has the storage address "101" of the first data in alphabetical order, and the bottom pointer 10b has the storage address "10" of the last data in alphabetical order.
4 ”indicates that the address“ 105 ”is currently assigned to the pointer 10c.
The free space pointer 10d stores the start address "106" of the free space of the data area 11, and the free space pointer 10e of the spare area stores the start address "401" of the free area of the spare data area 12.

Now, it is assumed that the data "OGAWA ..." Is input while the data "KAMATA ..." Stored at the address "103" is displayed, and the writing of the data is instructed. At this time, data empty pointer 1
Since "106" is designated as the address of the empty area by 0d, the data "O" is assigned to the address "106".
Write "GAWA ..." At the same time, in the data (excluding "KAMATA ...") stored in the data area 11, the data before and after "OGAWA ... The storage addresses of are set in the front pointer 11b and the rear pointer 11d. Further, the back pointer 11d of the immediately preceding data
"OGAWA ...
Set the storage address “106” of “·”. Then, the data "KAMATA ..." At the address "103" is deleted.

Since the start address of the empty area of the data is changed by rewriting the data, the system data is rewritten. In this rewriting of system data, since the system data was written to the address "2" of the system area 10 last time, the system data is written to the next address "3" this time.

As a result, as shown in FIG. 7, the respective pointers are written in the address "3" of the system area 10. In this case, since the address "103" becomes empty, "103" is set in the data empty pointer 10d,
Furthermore, the data "OGA" rewritten to the current pointer 10c
The storage address "106" of "WA ..." Is set.

Returning to FIG. 3, if the data cannot be normally written twice in the determination in step S9, the data storage area 11A _i is determined to be defective, and the process proceeds to step S11, where the empty pointer 10e in the spare area is The address pointed to is the data write address. Then, step S8
Then, the name and address data input and the addresses of the data before and after the search are returned to the empty pointer 10 in the spare area.
Write to the address pointed to by e. Further, the address of the spare data area 12 in which the data was written this time is set in the back pointer 11d of the data immediately before, and similarly, the address of the spare data area 12 in which the data is written in the front pointer 11b of the data immediately after is set. Set the address. After that, the above-described processing of step S9 and thereafter is executed.

In the above embodiment, when rewriting the system data, a plurality of system data storage areas 10A are used.
_By sequentially writing the data to _i , it is possible to prevent the data from being repeatedly written in the same storage area 10A _i and preventing the data from being normally written.

The configurations of the system area 10 and the data area 11 for storing the system data, the name, and the address data are not limited to those described in the embodiment and may be other configurations.
Further, in the above embodiment, the data are sorted in alphabetical order by E.
Although the data is stored in the EPROM 5, the present invention can be applied to the case where data is stored without ordering. Further, the memory is not limited to the EEPROM, and other memory may be used, and the data storage device of the present invention can be applied to a small electronic calculator, an electronic notebook, a word processor, a personal computer and the like.

[0032]

According to the present invention, when rewriting system data, new data is written in an area different from the system data storage area in which the system data was written last time. Therefore, the data is repeatedly written in a specific system data storage area. It is possible to prevent the writing failure in the written area.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of a data storage device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a storage area of an EEPROM.

FIG. 3 is a flowchart of a writing process.

FIG. 4 is a diagram showing an example of data to be added.

FIG. 5 is a diagram showing an example of data stored in an EEPROM.

FIG. 6 is a diagram showing the contents of an EEPROM before rewriting.

FIG. 7 is a diagram showing the contents of an EEPROM after rewriting.

[Explanation of symbols]

 10 system area 11 data area 12 spare data area

Claims (1)

[Claims] 1. A data storage means having a plurality of data storage areas for storing data, a plurality of system data storage means for storing system data indicating an address of the data storage area, and a case of rewriting the system data. A data storage device comprising: a system data storage unit that previously wrote the system data; and a write control unit that writes new system data to a different system data storage unit.