JPH0738080A - Composite semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a composite semiconductor device that allows miniaturization and is highly reliable, by incorporating a Zener diode into a self arc- extinguishing semiconductor switching element and thereby reducing the number of parts. CONSTITUTION:A SI thyristor (or gate turn-off thyristor) 10A is a self arc- extinguishing semiconductor switching element composed of a P-emitter layer 11, a N-base layer 12, a P-gate layer 13, and a N<+>-emitter layer 14. A Zener diode 30, composed of a P-type semiconductor layer 31 and a N<+>-type semiconductor layer 32, is incorporated into the SI thyristor 10A.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a composite semiconductor device, and more particularly to a composite semiconductor device in which a self-extinguishing semiconductor element such as an electrostatic induction thyristor or a gate turn-off thyristor and a constant voltage diode are integrated. .

[0002]

2. Description of the Related Art In recent years, in the field of power semiconductors, there is an increasing demand for semiconductor devices capable of coping with higher frequencies from the viewpoint of high efficiency and low noise of applied devices.

Static induction thyristor (SI thyristor)
Has excellent high-frequency characteristics compared to other power semiconductor devices, but it has the drawback of requiring a large current to be drawn from the gate at turn-off, resulting in higher gate power than other semiconductor devices. . Therefore, a technique has been developed in which the cathode of the SI thyristor is connected in series (cascode connection) to the source of the n-channel MOSFET so that the high-speed SI thyristor can be easily driven as a voltage control type device.

As means for constructing a voltage drive type device by combining a bipolar semiconductor element such as an SI thyristor and a MOSFET, the cascode connection shown in FIG. 4 and the cascade connection shown in FIG. 5, and a combination thereof are shown in FIG. Such cascode / cascade connection has been proposed.

4 to 5, reference numeral 10 denotes an electrostatic induction type thyristor (SI) which is a main self-extinguishing type semiconductor switching element.
Thyristor) or gate turn-off thyristor, the main device, 20A and 20B are n-channel MOSFE
T and 30 are Zener diodes which are constant voltage semiconductor elements, A is an anode terminal, G ₁ is a gate terminal of the main device 10, G ₂ is a gate terminal of the MOSFET 20A,
G ₃ is the gate terminal of MOSFET 20B, D is MOSF
The drain of ET and the source of S are sources, and the respective composite semiconductor devices are connected as shown.

[0006]

In the cascode connection shown in FIG. 4, the SI thyristor used as the main device 10 is basically a normally-on type SI thyristor which is ignited even when a gate current does not flow, and is a Zener. The diode 30 is the gate of the SI thyristor at turn-on.
It is attached for the purpose of applying a forward bias between the cathodes and shortening the turn-on time.

Further, in the cascade connection of FIG. 5 and the cascode cascade connection of FIG. 6, the main device section is the same as that of FIG. 4 for the purpose of supplying a sufficient on-gate current to the gate of the SI thyristor or the gate turn-off thyristor. The Zener diode 30 is connected to.

In the current technology, the Zener diode is manufactured separately from the main device such as the SI thyristor and the gate turn-off thyristor, and is generally arranged on a base substrate on which metal wiring such as copper is provided on ceramic, and the main device is formed by wire bonding. And made an electrical connection.

The Zener diode is a necessary device in terms of characteristics, but the presence of the Zener diode increases the number of parts, which is a negative factor from the viewpoint of downsizing of the entire module and improvement of reliability. For this reason, the emergence of SI thyristors and gate turn-off thyristors with a built-in Zener diode has been desired.

The present invention has been made in view of the above problems, and an object thereof is to reduce the number of parts by incorporating a Zener diode in a self-arc-extinguishing type semiconductor switching element, thereby reducing the size and reliability of the module. It is an object of the present invention to provide a composite semiconductor device capable of improving the above.

[0011]

In order to achieve the above-mentioned object, the present invention uses a first semiconductor layer of a predetermined polarity as a common base region, and the first semiconductor layer is formed on one surface of the first semiconductor layer. Second semiconductor layer having a polarity different from that of the first semiconductor layer is formed as an anode layer, and a third semiconductor layer having a polarity different from that of the first semiconductor layer is formed on the other surface of the first semiconductor layer. Provided as a gate layer and adjacent to and separated from the third semiconductor layer.
On the surface portion of the semiconductor layer of the fourth semiconductor layer having the same polarity as the first semiconductor layer.
A semiconductor layer is formed as a cathode layer, and a fifth semiconductor layer separated from the third semiconductor layer by a high resistance semiconductor layer is formed close to the third semiconductor layer. And a sixth semiconductor layer having the same polarity as that of the above semiconductor layer is formed.

[0012]

A self-extinguishing type semiconductor switch element is formed by the first semiconductor layer, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer, and the fifth semiconductor layer and the sixth semiconductor layer. Form a Zener diode.

Furthermore, by narrowing the distance between the two diffusion layers surrounding the Zener diode, the operation of the parasitic device due to the built-in Zener diode is suppressed.

[0014]

Embodiments of the present invention will be described below with reference to FIGS.

FIG. 1 shows a composite semiconductor device according to a first embodiment of the present invention, in which an SI thyristor which is a main device and a Zener diode are integrally incorporated.

In FIG. 1, 11 is a P emitter layer (first
P-type semiconductor layer), 12 is an N base layer, 13 is a P-type gate layer having a comb shape, and 14 is an adjacent P-type gate layer 1.
N ⁺ emitter layer (first N ⁺ type semiconductor layer) provided between 3; 15 is an anode electrode provided on the surface of the P emitter layer 11; 16 is a cathode provided on the surface of the N ⁺ emitter layer 14 An electrode, 17 is a gate electrode provided on the surface of the P-type gate layer 13, and 18 is an oxide film, and these constitute the SI thyristor 10A.

Adjacent gate layers are connected to each other by metal or low resistance diffusion. Similarly, the N ⁺ type emitter layers 14 are also connected by metal or diffusion layers.

In FIG. 1, 31 is another P-type diffusion layer (third P-type semiconductor layer) independent of the P-type gate layer 13 (separated by a high resistance layer), and 32 is P-type diffusion. Between the layer 15 and the adjacent P-type gate layer 13 (13a), the N ⁺
Another N ⁺ -type diffusion layer (second
N ⁺ type semiconductor layer), 33 is a P type gate layer 13 (13
a) and a second gate electrode for short-circuiting the N ⁺ type diffusion layer 32, 34 is a second gate electrode provided on the surface of the P type diffusion layer 31, and these constitute the Zener diode 30. .

That is, the composite semiconductor device of the present invention is
In the composite semiconductor device shown in FIG. 1, the SI thyristor generally includes a zener diode between the P-type emitter layer 11, the N base layer 12, and the comb-shaped P-type gate layer 13 and the adjacent gate. The N-type emitter layer 14 is provided. Adjacent gate layers are connected to each other by a metal or a low resistance diffusion layer, and the N-type emitter layers are similarly connected by a metal or a diffusion layer. The SI thyristor of the present invention is provided with another P-type diffusion layer 15 adjacent to the P-type gate and separated from the P-type gate (separated by the high resistance layer), and further in the vicinity of the P-type diffusion layer. Another N-type diffusion layer 32 independent of the N-type emitter layer is provided between the P-type gate layer 13a and the N-type emitter layer 13a, and the P-type gate layer 13a and this N-type diffusion layer are short-circuited with a metal on the semiconductor surface to form a first gate. P as an electrode independent of the gate
A second gate electrode is provided on the type diffusion layer 31, and a Zener diode composed of the N type diffusion layer 32 and the P type diffusion layer 31 is used.

Further, in the semiconductor device of FIG. 1, a P-type diffusion layer different from the gate is formed so that the diode formed of the P-type emitter layer 11, the N-type base layer 12 and the N ⁺ diffusion layer 32 does not conduct in the off state. And a P-type gate layer 13a adjacent to the P-type gate layer 13a is narrowed, and a depletion layer extending from both P-type diffusion layers is used to pinch off a region (channel region) between the adjacent P-type diffusion layers. It has a feature.

FIG. 2 shows another embodiment in which a gate turn-off thyristor 10B is used as the main device 10, and the same or corresponding parts as those in FIG. 1 are designated by the same reference numerals.

In the composite type semiconductor device of FIG. 2, a P type emitter layer (first P type semiconductor layer) 11, an N type base layer, a P type base layer (second P type semiconductor layer) 13, an N ⁺ type An emitter layer (first N ⁺ type semiconductor layer) 14, an anode electrode 15,
A gate turn-off thyristor 10B is constituted by the cathode electrode 16 and the gate electrode 17, and a P-type diffusion layer (third
Zener diode 30 is composed of the P-type semiconductor layer 31), the second N ⁺ type semiconductor layer 32, the second gate electrode 33, and the second cathode electrode 34.

The composite semiconductor device of FIGS. 1 and 2 can be represented by the equivalent circuit of FIG. Therefore, when the cascode device of FIG. 4 is manufactured, the first gate electrode terminal G
N-channel M to the second gate electrode terminal G ₂ to ₁ without
The source of the OSFET may be connected, and the cathode electrode K of the main device 10 may be connected to the drain of the MOSFET. Further, in the examples of FIGS. 5 and 6, both gate electrode terminals of the first and second gate electrode terminals G ₁ and G ₂ are used, and G ₁ is the source of the cascade MOSFET and G ₂ is the cathode terminal of the module. The module can be configured by connecting.

The composite semiconductor device according to each of the above-described embodiments has the following embodiments.

(1) An N-type semiconductor is formed on one main surface of a P-type semiconductor, and a second P-type semiconductor layer and the above-mentioned N-type semiconductor layer are formed on the main surface of the N-type semiconductor layer opposite to the P-type semiconductor. In the static induction thyristor, characterized in that N ⁺ type semiconductor layers having a concentration higher than that of the N type layers are alternately arranged.
The third P-type semiconductor layer separated from the N-type high-resistance semiconductor layer is formed close to the second P-type semiconductor layer, and the third P-type semiconductor layer and the second P-type semiconductor layer are formed. wherein a formation of the second N ⁺ -type semiconductor layer separate from the P-type semiconductor layer above the N ⁺ -type semiconductor layer in the region between.

(2) In the semiconductor device according to the item (1), the second N ⁺ semiconductor layer and the second P-type semiconductor layer are connected by a metal film, and the metal is formed on the surface of the third P-type semiconductor layer. A semiconductor device having a second metal film electrically separated from the film.

(3) A semiconductor device according to the above item (2), wherein the first metal film is a first gate electrode and the second metal film is a second gate electrode. .

(4) In the SI thyristor of the above item 1, the third P-type semiconductor and the second P-type semiconductor layer adjacent to the third P-type semiconductor are sufficiently narrowed so that no voltage is applied. A semiconductor device having a depletion layer region that pinches off a first N-type semiconductor region between both P-type semiconductor layers.

(5) A semiconductor device characterized in that the part of the SI thyristor body of the above-mentioned items 1 to 4 is replaced with a gate turn-off thyristor.

[0030]

As described above, according to the present invention, the respective semiconductor layers constituting the Zener diode can be formed at the same time, and the Zener diode can be built in only by changing the mask pattern without increasing the manufacturing process. hand,
The number of parts can be reduced, the module can be downsized, and a highly reliable composite semiconductor device can be obtained.

[Brief description of drawings]

FIG. 1 is a front sectional view of a composite semiconductor device according to an embodiment of the present invention.

FIG. 2 is a front sectional view of a composite type semiconductor device according to another embodiment of the present invention.

FIG. 3 is an equivalent circuit diagram of the composite semiconductor device of FIG. 1 or 2.

FIG. 4 is a cascode connection diagram of the composite semiconductor device.

FIG. 5 is a cascade connection diagram of a composite semiconductor device.

FIG. 6 is a cascode cascade connection diagram of the composite semiconductor device.

[Explanation of symbols]

10A ... Electrostatic induction thyristor (SI thyristor) 10B ... Gate turn-off thyristor 11 ... P emitter layer 12 ... N base layer 13, 13a ... P gate layer 14 ... N ⁺ emitter layer 15 ... Anode electrode 16 ... Cathode electrode 17 ... Gate Electrode 18 ... Oxide film 30 ... Zener diode 31 ... P-type semiconductor layer 32 ... N ⁺ type semiconductor layer 33, 34 ... Metal film G ₁ ... 1st gate electrode terminal G ₂ ... 2nd gate electrode terminal

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H01L 29/744 H01L 29/74 G 7210-4M 27/06 T

Claims (4)

[Claims] 1. A first semiconductor layer (12) having a predetermined polarity is used as a common base region, and a second semiconductor layer having a polarity different from that of the first semiconductor layer is formed on one surface of the first semiconductor layer. (11) is formed to serve as an anode layer, and a third semiconductor layer (13) having a polarity different from that of the first semiconductor layer is provided on the other surface of the first semiconductor layer to serve as a gate layer. The first semiconductor layer is formed on the surface portion of the first semiconductor layer so as to be adjacent to and separated from the third semiconductor layer.
A fourth semiconductor layer (14) having the same polarity as that of the first semiconductor layer is formed as a cathode layer, and a fifth semiconductor layer (31) separated from the third semiconductor layer by a high resistance semiconductor layer is formed. Third
6. A composite semiconductor device, wherein a sixth semiconductor layer (32) having the same polarity as that of the fourth semiconductor layer, which is different from the fourth semiconductor layer, is formed in close proximity to the semiconductor layer. 2. The composite type semiconductor device according to claim 1, wherein
The third semiconductor layer (13a) and the sixth semiconductor layer (3
2) is connected with a first metal film (33), and a second metal film (34) electrically separated from the first metal film is attached to the fifth semiconductor layer (31). A composite semiconductor device characterized by the above. 3. The composite semiconductor device according to claim 2, wherein
A composite type semiconductor device characterized in that the first metal film (33) is used as a first gate electrode and the second metal film (34) is used as a second gate electrode. 4. The composite semiconductor device according to claim 1, wherein
A sixth semiconductor of both semiconductor layers is a depletion layer region formed without applying a voltage by narrowing the distance between the third semiconductor layer (13a) and the fifth semiconductor layer (31) adjacent to the third semiconductor layer (13a). A composite type semiconductor device characterized by pinching off a region.