JPH0737388Y2 - Channel setting device for communication equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a channel setting device for communication equipment.

(B) Problems to be solved by the conventional technology and device PLL circuit, microcomputer for controlling this PLL circuit, frequency division ratio data and predetermined data (for example, CTCSS: Cont
The tone data used for the inuous-Tone-Controlled Squelch System. Hereinafter, an example is given as “tone data”. ), A communication device that sequentially scans communication channels has a PLL circuit for setting the frequency of the communication channel from the memory each time the channel is changed, as shown in FIG. 3 (a). The frequency division ratio data and the predetermined data are read out.

Here, in order to complete the setting of the communication channel, as shown in the timing chart of FIG. 3B, the frequency division ratio data and tone data read time t4 and the frequency division ratio data are sent to the PLL circuit. From the time of giving and setting and until the PLL circuit locks to the frequency of the communication channel, it is mainly determined by the time constant of LPF8 of the PLL circuit, and the PLL of FIG. 3 (b)
The rising time (hereinafter referred to as “unlock time”) t5 indicated by the unlock signal is required, and therefore the channel setting time T1 becomes long and the scan speed cannot be increased. .

The present invention has been made in view of the above points, and an object of the present invention is to provide a channel setting device for a communication device in which the scanning speed of the communication channel is increased.

(C) Means for Solving the Problem The channel setting device of the communication device of the present invention comprises a PLL circuit, a microcomputer for controlling the PLL circuit,
In a communication device that is composed of a memory for storing frequency division ratio data and predetermined data and is capable of sequentially scanning communication channels, the predetermined data is stored until the PLL circuit is locked with the frequency division ratio data. A reading means for reading from the memory is provided.

(D) Operation According to the present invention, the PLL circuit, the microcomputer for controlling the PLL circuit, and the memory for storing the frequency division ratio data and the predetermined data (for example, tone data),
In a communication device capable of sequentially scanning communication channels, a reading means for reading the predetermined data from the memory is provided before the PLL circuit is given the frequency division ratio data and locked. Can be shortened, and therefore the scanning speed can be increased.

(E) Embodiment An embodiment of the channel setting device for communication equipment according to the present invention will be described with reference to FIGS. 1 and 2.

In the figure, 1 is a PLL circuit, 2 is a voltage controlled oscillator of the PLL circuit 1,
3 is a prescaler, 4 is a programmable divider, 5
Is a phase comparator of the PLL circuit 1, 6 is a crystal oscillator, 7 is a frequency divider, 8 is a low-pass filter of the PLL circuit 1, 9 is for controlling this communication device, and the programmable divider 4 has frequency division ratio data. A microcomputer 10 for giving a signal is a memory for storing a frequency division ratio of a communication channel and predetermined data (for example, tone data).

The output of the voltage controlled oscillator 2 is frequency-divided by the prescaler 3 and the programmable divider 4, and the phase comparator 5
Entered in.

The oscillation output of the crystal oscillator 6 is frequency-divided by the frequency divider 7 and is phase-compared with the signal frequency-divided by the programmable divider 4.

The phase comparator 5 controls the voltage controlled oscillator 2 so that the two signals input to the phase comparator 5 have the same phase.

Next, the operation of the channel setting device of the communication device thus configured will be described with reference to FIG.

In FIG. 2 (b), A is the microcomputer 9
Frequency division ratio data that is serial data sent to the PLL circuit 1, B is signal data that instructs the frequency division ratio data A to be set in the PLL circuit 1, and C is tone data that is serial data sent from the microcomputer 9. , T1 is the read time of the division ratio data A, t2 is the unlock time of the PLL, t
Reference numeral 3 is a read time of the tone data C.

Now, whenever the communication channel is changed, the memory is
Although it is necessary to read the frequency division ratio data and tone data of the PLL circuit from 10, in the present invention, the frequency division ratio data A is read first from the memory 10.

This time is indicated by t1.

When the signal data B instructing the PLL circuit 1 to set the division ratio data A is given to the PLL circuit 1, the PLL
The circuit 1 is in the unlocked state until it locks at the frequency instructed to set (steps S1 and S2).

This time is indicated by the unlock time t2.

During the unlock time t2 of the PLL circuit, the tone data C is read (step S3), and all the setting operations are completed before the PLL circuit 1 enters the locked state.

The unlock time t2 of the PLL circuit 1 is the tone data C
Since the channel setting time T is longer than the read time t3 of the frequency division ratio data A and the PLL circuit 1
Is approximately equal to the sum (t1 + t2) of the unlocking time t2 of.

Therefore, compared with the conventional one, the channel setting time T
Becomes shorter.

As described above, the channel setting device of the communication device of the present invention comprises the PLL circuit, the microcomputer for controlling the PLL circuit, the memory for storing the frequency division ratio data and the predetermined data, and the communication channels can be sequentially scanned. In the communication device, the reading means for reading the predetermined data from the memory is provided before the PLL circuit is given the frequency division ratio data and locked.

(F) Effect of the Invention Since the channel setting device for a communication device according to the present invention is configured as described above, the communication channel setting time is shortened, and therefore the scanning speed is increased.

Moreover, it has excellent features such as a simple structure and a low cost, which makes it easy to implement.

[Brief description of drawings]

1 and 2 show an embodiment of a channel setting device for communication equipment according to the present invention, FIG. 1 is a block diagram of hardware, FIG. 2 (a) is a flow chart of the main part, and FIG. (B) is a time chart. FIG. 3 shows a conventional embodiment, FIG. 3 (a) is a flow chart, and FIG. 3 (b) is a time chart. Explanation of main symbols 1: PLL circuit 9: Microcomputer 10: Memory A: Frequency division ratio data C: Tone data t1: Frequency division ratio data read time t2: Unlock time t3: Tone data read time T: Channel set time

Claims (1)

[Scope of utility model registration request] 1. A communication device comprising a PLL circuit, a microcomputer for controlling the PLL circuit, and a memory for storing frequency division ratio data and predetermined data, wherein communication channels can be sequentially scanned. A channel setting device for communication equipment, comprising a reading means for reading the predetermined data from the memory until the frequency division ratio data is given and locked.