JPH0737322Y2 - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPH0737322Y2
JPH0737322Y2 JP1986074855U JP7485586U JPH0737322Y2 JP H0737322 Y2 JPH0737322 Y2 JP H0737322Y2 JP 1986074855 U JP1986074855 U JP 1986074855U JP 7485586 U JP7485586 U JP 7485586U JP H0737322 Y2 JPH0737322 Y2 JP H0737322Y2
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
external
external lead
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1986074855U
Other languages
Japanese (ja)
Other versions
JPS6312854U (en
Inventor
永 清水
栄寿 前原
明 風見
高橋  清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP1986074855U priority Critical patent/JPH0737322Y2/en
Publication of JPS6312854U publication Critical patent/JPS6312854U/ja
Application granted granted Critical
Publication of JPH0737322Y2 publication Critical patent/JPH0737322Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【考案の詳細な説明】 (イ)産業上の利用分野 本考案は混成集積回路に関し、特に混成集積回路の外部
リード構造の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a hybrid integrated circuit, and more particularly to improvement of an external lead structure of the hybrid integrated circuit.

(ロ)従来の技術 従来の混成集積回路は第2図に示す如く、回路素子(1
3)及び外部リード(14)が固着された二枚の混成集積
回路基板(11)(12)の回路素子(13)が互いに向き合
う様に枠体(15)によって離間固定されていた。その
際、混成集積回路基板(11)(12)の一周辺に設けられ
た外部リード(14)は同一方向に水平に導出されてい
た。上述した同様の技術は実公昭55−8316号公報に記載
されている。
(B) Conventional technology As shown in FIG. 2, a conventional hybrid integrated circuit has a circuit element (1
The circuit elements (13) of the two hybrid integrated circuit boards (11) and (12) to which the external lead (14) and the external lead (14) are fixed are separated and fixed by a frame (15) so as to face each other. At that time, the external leads (14) provided around the hybrid integrated circuit boards (11) (12) were led out horizontally in the same direction. The same technique as described above is described in Japanese Utility Model Publication No. 55-8316.

(ハ)考案が解決しようとする問題点 斯上の如く、夫々の外部リード(14)が同一方向に水平
に導出された混成集積回路では外部リード間に制限があ
るため夫々の外部リード(11)に外部コネクターを挿入
する際において、非常に困難な作業であり、作業能率を
低下させる問題があった。
(C) Problems to be solved by the invention As described above, in the hybrid integrated circuit in which the respective external leads (14) are horizontally drawn out in the same direction, there is a limitation between the external leads, so that the respective external leads (11 It is a very difficult work when inserting the external connector into the), and there is a problem that the work efficiency is reduced.

(ニ)問題点を解決するための手段 本考案は上述した点に鑑みてなされたものであり、第1
図に示す如く、第2の混成集積回路基板(2)に設けら
れた第2の外部リード(5)に角度を持たせて第1の外
部リード(4)と離間する様に第2の外部リード(5)
を導出させて解決するものである。
(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned points.
As shown in the figure, the second external lead (5) provided on the second hybrid integrated circuit board (2) is angled to separate the second external lead (4) from the second external lead (4). Reed (5)
Is derived to solve the problem.

(ホ)作用 斯上の如く、第2の外部リード(5)に角度を持せて導
出させることにより、外部コネクター等を挿入しやすく
なる。
(E) Action As described above, the external connector or the like can be easily inserted by deriving the second external lead (5) at an angle.

(ヘ)実施例 以下に第1図に示した実施例に基づいて本考案を詳細に
説明する。本考案による混成集積回路は第1図に示す如
く、第1及び第2の混成集積回路基板(1)(2)と、
基板(1)(2)上に設けられた回路素子(3)及び一
周辺に設けられた第1及び第2の外部リード(4)
(5)と、第1及び第2の基板(1)(2)を離間して
固定する枠体(6)とから構成されている。
(F) Embodiment The present invention will be described in detail below based on the embodiment shown in FIG. As shown in FIG. 1, a hybrid integrated circuit according to the present invention includes first and second hybrid integrated circuit boards (1) and (2).
The circuit element (3) provided on the substrates (1) and (2) and the first and second external leads (4) provided on one periphery.
(5) and a frame body (6) for fixing the first and second substrates (1) and (2) separately.

第1及び第2の混成集積回路基板(1)(2)は良熱伝
導性の優れたアルミニュウム基板が用いられ、その面上
は絶縁処理が施され、更にその面上に所望の導電路を形
成してトランジスタ、パワートランジスタ、チップ抵
抗、チップコンデンサー等の回路素子(3)が設けら
れ、更に導電路が延在される基板(1)(2)の夫々の
一周辺には第1及び第2の外部リード(4)(5)が固
着される。
As the first and second hybrid integrated circuit boards (1) and (2), an aluminum board having excellent thermal conductivity is used, an insulating treatment is applied on the surface, and a desired conductive path is formed on the surface. A circuit element (3) such as a transistor, a power transistor, a chip resistor, a chip capacitor, etc. is provided to form a circuit board, and further, a conductive path is extended. Two external leads (4) and (5) are fixed.

本考案の特徴はこの第2の外部リード(5)にある。第
2の混成集積回路基板(2)に固着される第2の外部リ
ード(5)に所定の角度を持せ、第1の混成集積回路基
板(1)に固着される第1の外部リード(4)と離間さ
せる様に第2の外部リード(5)を上側に向く様に形成
する。その際の第2の基板(2)に固着される第2の外
部リード(5)の角度は第1の外部リード(4)とある
程度離間できなければ任意である。第1及び第2の混成
集積回路基板(1)(2)を枠体(6)の上下に挿入し
て第1及び第2の外部リード(4)(5)と枠体(6)
とで形成された空間に樹脂(7)を注入して第1及び第
2の外部リード(4)(5)を保護する。またその反対
面も樹脂によって封止する。
The feature of the present invention lies in this second external lead (5). A second external lead (5) fixed to the second hybrid integrated circuit board (2) is provided with a predetermined angle, and a first external lead (5) fixed to the first hybrid integrated circuit board (1) ( The second external lead (5) is formed so as to face upward so as to be separated from 4). The angle of the second external lead (5) fixed to the second substrate (2) at that time is arbitrary as long as it cannot be separated from the first external lead (4) to some extent. The first and second hybrid integrated circuit boards (1) and (2) are inserted above and below the frame body (6) to insert the first and second external leads (4) and (5) and the frame body (6).
Resin (7) is injected into the space formed by and to protect the first and second external leads (4) and (5). The opposite surface is also sealed with resin.

斯上の如く、第2の外部リード(5)に角度を持たせる
ことにより、第1の外部リード(4)と離間することが
でき、第1及び第2の外部リード(4)(5)に外部コ
ネクターを挿入する際に容易に挿入することができるの
で作業性が向上する。
As described above, the second external lead (5) can be separated from the first external lead (4) by providing the second external lead (5) with an angle, and the first and second external leads (4) (5) can be separated. The workability is improved because the external connector can be easily inserted.

(ト)考案の効果 上述の如く、本考案によれば、第2の外部リードに角度
を持たせることにより、外部リードに外部コネクターが
容易に且つリードが曲折することなく挿入できるので作
業性が向上する利点を有するものである。
(G) Effect of the Invention As described above, according to the present invention, since the second external lead is angled, the external connector can be easily inserted into the external lead without bending the lead, and thus workability is improved. It has the advantage of improving.

【図面の簡単な説明】[Brief description of drawings]

第1図は本考案の実施例を示す断面図、第2図は従来例
を示す断面図である。 (1)(2)…第1及び第2の混成集積回路基板、
(3)…回路素子、(4)(5)…第1及び第2の外部
リード、(6)…枠体、(7)…樹脂。
FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. (1) (2) ... First and second hybrid integrated circuit boards,
(3) ... Circuit element, (4) (5) ... First and second external leads, (6) ... Frame body, (7) ... Resin.

───────────────────────────────────────────────────── フロントページの続き (72)考案者 高橋 清 群馬県山田郡大間々町大間々414−1 東 京アイシー株式会社内 (56)参考文献 特開 昭60−47448(JP,A) 実開 昭60−103852(JP,U) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kiyoshi Takahashi Kiyoshi Takahashi 414-1 Omama, Omama-cho, Yamada-gun, Gunma Prefecture Tokyo Icy Co., Ltd. (56) Reference JP-A-60-47448 (JP, A) -103852 (JP, U)

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】回路素子及び少なくとも一周辺に第1及び
第2の外部リードが設けられた第1及び第2の混成集積
回路基板と、該第1及び第2の混成集積回路基板を対向
して離間配置する枠体とから成り、両外部リードはそれ
ぞれ別々のコネクタにより接続される混成集積回路にお
いて、 前記第1(または第2)の外部リードを水平に導出さ
せ、前記第2(または第1)の外部リードには、前記コ
ネクタと接続される側の外部リードの端部も含めて上側
に向くように角度を持たせ前記第1(または第2)の外
部リードと離間する様に導出することを特徴とする混成
集積回路。
1. A first and a second hybrid integrated circuit board provided with first and second external leads on at least one periphery of a circuit element, and the first and second hybrid integrated circuit boards facing each other. In a hybrid integrated circuit in which both outer leads are connected by separate connectors, the first (or second) outer lead is led out horizontally, and the second (or second) The external lead of 1) has an angle so as to face upward including the end portion of the external lead on the side connected to the connector, and is led out so as to be separated from the first (or second) external lead. A hybrid integrated circuit characterized by:
JP1986074855U 1986-05-19 1986-05-19 Hybrid integrated circuit Expired - Lifetime JPH0737322Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986074855U JPH0737322Y2 (en) 1986-05-19 1986-05-19 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986074855U JPH0737322Y2 (en) 1986-05-19 1986-05-19 Hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPS6312854U JPS6312854U (en) 1988-01-27
JPH0737322Y2 true JPH0737322Y2 (en) 1995-08-23

Family

ID=30920460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986074855U Expired - Lifetime JPH0737322Y2 (en) 1986-05-19 1986-05-19 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH0737322Y2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6047448A (en) * 1983-08-25 1985-03-14 Nec Ic Microcomput Syst Ltd Semiconductor integrated circuit device
JPS60103852U (en) * 1983-12-20 1985-07-15 三洋電機株式会社 Hybrid integrated circuit device

Also Published As

Publication number Publication date
JPS6312854U (en) 1988-01-27

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