JPH0736369A - Programmable controller - Google Patents

Abstract

PURPOSE:To provide a PLC capable of providing a data exchange time according to a processing content by giving a priority to the data exchange processing between a PLC body and a peripheral unit. CONSTITUTION:A common memory 20 is divided into a plurality of areas, and has an area priority setting flag 21 for preliminarily setting the priority of data exchange processing. When the presence of a data transmission request is judged by an area data processing request flag 22 for judging the presence or absence of the data transmission request from either one of a PLC body 1 and a peripheral unit 3, the priority set in the area priority setting flag 21 is selected by a selector 23, and the data according to it is transmitted through a plurality of signal lines.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PLC for exchanging data between a programmable controller (hereinafter referred to as PLC) main body and a peripheral unit via a shared memory.

[0002]

2. Description of the Related Art Conventionally, a PL for exchanging data between a PLC main body and a peripheral unit via a shared memory.
C is known.

FIG. 8 shows an example of a conventional PLC, in which a shared memory 2 is inserted between a PLC body 1 and a peripheral unit 3, and the shared memory 2 is surrounded by the PLC body 1. A data exchange buffer memory 2a for transmitting data to the unit 3 and a data exchange buffer memory 2b for transmitting data from the peripheral unit 3 to the PLC body 1 are provided.

[0004]

However, in the PLC shown in FIG. 8, for example, when data is transmitted from the PLC body 1 to the peripheral unit 3, the data exchange buffer memory 2a is used. The data exchange buffer memory 2a stores the data transmitted from the PLC main body in the order of reception, and transmits the data to the peripheral unit 3 in the order of reception. For this reason, the priority of the data exchange processing becomes single, and when the load of processing such as message communication and cyclic communication in the PLC main body 1 and the peripheral unit 3 increases, waiting for the processing order and discarding of data occur, resulting in data exchange. There is a problem that the time required for the time changes, the data exchange time is difficult to estimate, and the emergency data exchange such as the machine emergency stop command cannot be performed.

Therefore, the present invention has been made to solve the above problem, and by providing a priority to the data exchange process between the PLC main body and the peripheral unit, it is possible to obtain the data exchange time according to the contents of the process. It is intended to provide a PLC capable of performing.

[0006]

In order to achieve the above object, the invention of claim 1 is a PLC for bidirectional data transmission / reception between a PLC main body and its peripheral unit via a shared memory. Is divided into a plurality of areas, and it is determined whether or not there is a data transmission request from any one of the PLC main body and the peripheral unit, and priority setting means for setting the priority of the data exchange processing in advance in the area. The selecting means, the selecting means for selecting the data exchange processing according to the priority according to the priority set in the priority setting means and the presence / absence of a data transmission request from the determining means, and the selecting means for selecting And a plurality of signal lines for transmitting data according to priority.

According to a second aspect of the present invention, in the first aspect of the invention, the priority setting means can set a plurality of priorities.

According to a third aspect of the present invention, in a PLC that performs bidirectional data transmission / reception between a PLC body and its peripheral units via a shared memory, the shared memory is divided into a plurality of areas, and data is previously stored in the areas. Priority setting means for setting the priority of the exchange process, and the PLC
A determination means for determining whether or not there is a data transmission request from either the main body or the peripheral unit; and a signal line for transmitting data when the determination means determines that there is a data transmission request, When data is transmitted through the signal line, the high priority data is preferentially received and processed based on the priority set by the priority setting means.

The invention of claim 4 is characterized in that, in the invention of claim 3, the priority setting means can set a plurality of priorities.

According to a fifth aspect of the invention, in the third or fourth aspect of the invention, the priority setting means is P
It is characterized in that it is built in the LC body and the peripheral unit.

According to a sixth aspect of the present invention, in the first or third aspect of the invention, when data is transmitted and received between the PLC main bodies, a priority setting area is provided in the header portion of the data. To do.

[0012]

According to the invention of claim 1, the shared memory is divided into a plurality of areas and has priority setting means for setting the priority of the data exchange process in advance, and either the PLC main body or the peripheral unit is provided. When it is judged that there is a data transmission request by the judgment means for judging the presence or absence of a data transmission request from one side, the priority set in the priority setting means is selected, and the corresponding data is transmitted via a plurality of signal lines. To send.

According to the second aspect of the present invention, since a plurality of priorities are set in the priority setting means, a data exchange process corresponding to the plurality of priorities is selected, and the corresponding data is transmitted via a plurality of signal lines. To send.

According to the third aspect of the invention, when the PLC main body receives the data transmission request signal from the judging means, the PLC main body reads the priority set in the setting means and executes the data exchange processing according to the set priority. .

In the invention of claim 4, since a plurality of priorities are set in the priority setting means, a plurality of set priorities are read and a data exchange process is executed in accordance with the plurality of set priorities. To do.

According to the invention of claim 5, in the invention of claim 1 or 3, since the priority setting means is provided in both the PLC main body and the peripheral unit, when there is a data transmission request,
The data exchange process according to the priority is executed by both the PLC main unit and the peripheral unit. In the invention of claim 6, PL
When data is transmitted and received between the C main bodies, a priority setting area is provided in the header portion of the data, and the data exchange process according to the priority is executed.

[0017]

Embodiments of the PLC according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing a schematic configuration of the first embodiment. In this embodiment as well, a shared memory 20 is arranged between the PLC main body 1 and the peripheral unit 3 to transmit and receive data. However, in this embodiment, the PLC main body 1
A memory area selection unit 10 having a shared memory 20 is provided between and the peripheral unit 3.

As shown in FIG. 2, the memory area selection unit 10 has a shared memory 20 divided into four areas, a data processing request flag 22 for each area, and a priority for each area for setting a priority for each divided area. Setting flag 21, priority setting flag 21 for each area when a data processing request is made
The selector 23 has a selector 23 for selecting the priority set to, and the selector 23 is connected to the normal processing request signal line 23a and the priority processing request signal line 23b for transmitting the data processing request signal according to the selected priority. There is.

As shown in FIG. 2, the shared memory 20 is composed of a normal data exchange area 20a into which normal transmission data is input and a priority data exchange area 20b into which priority transmission data is input. The exchange area 20a further includes an area 20a-1 for exchanging data from the PLC main body 1 to the peripheral unit 3 and an area 20a-2 for exchanging data from the peripheral unit 3 to the PLC main body 1.
Is divided into In addition, the priority data exchange area 20b
PL as well as the normal data exchange area 20a
It is divided into an area 20b-1 for exchanging data from the C main body 1 to the peripheral unit 3 and an area 20b-2 for exchanging data from the peripheral unit 3 to the PLC main body 1.

As described above, the shared memory 20 is divided into four areas, and the normal data exchange area 20a and the priority data exchange area 20b are provided from the PLC main body 1 to the peripheral unit 3.
Data exchange area to the PLC main body 1 and a data exchange area from the peripheral unit 3 to the PLC main body 1.

The area-specific priority setting flag 21 is used to set the area-specific priority when a data transmission request is made to any of the shared memories 20, and the four areas 20a-1 constituting the shared memory 20. , 20a-2, 20b
-1, 20b-2 are provided.

That is, as shown in FIG. 2, the area-specific priority setting flag 21 is the area 20a-1 priority setting flag 21a and the area 20a-2 priority setting flag 2.
1b, an area 20b-1 priority setting flag 21c, and an area 20b-2 priority setting flag 21d. When the flag is set to 0, the corresponding area becomes a normal data exchange area 20a into which normal transmission data is input. When the flag is set to 1, the corresponding area is set as the priority data exchange area 20b to which the priority transmission data is input.

In this embodiment, the priority setting flag 21a for area 20a-1 and the priority setting flag 21b for area 20b-1 are 0, and the priority setting flag 21c for area 20b-1 and the area 20b- The 2D priority setting flag is 1. That is, the area 20a-
1, the area 20a-2 is set as the normal exchange area 20a, and the areas 20b-1 and 20b-2 are set as the priority data exchange area 20b.

The area-specific data processing request flag 22 is for judging whether or not there is a data transmission request to any of the areas forming the shared memory 20, and for the area 20a-1 data processing request flag 22a and area 20a-2. The data processing request flag 22b, the area 20b-1 data processing request flag 22c, and the area 20b-2 data processing request flag 22d are included.

Therefore, when there is a data processing request to any area forming the shared memory 20, the corresponding data processing request flag is checked, and if the flag is 0, the data is written in the area. Then, 1 is set to the corresponding flag, and a signal that there is a data request is input to the selector 23 described below.

Upon receiving the signal from the area-specific data processing request flag 22, the selector 23 selects the priority set in advance by the area-specific priority setting flag 21, and the selector 2
A processing request signal corresponding to the priority is transmitted via any one of the processing request signal lines 23a and 23b connected to No. 3.

Next, the operation of this embodiment will be described with reference to FIG.

Now, for example, the case of transferring a normal processing message from the peripheral unit 3 to the PLC main body 1 will be described. In this case, the area 20a-2 of the shared memory 20 is described.
Is used, the data processing request flag 2 for the area 20a-2 is issued when there is a data processing request from the peripheral unit 3.
2b is checked and, for example, if the data processing request flag 22b for area 20a-2 is 0, there is no data in area 20a-2, so data is written in area 20a-2 and data processing request flag 22b for area 20a-2 is written. Set 1 to. When the data processing request flag 22b for the area 20a-2 becomes 1, a signal indicating that there is a data request is input to the selector 23 (step 10).

In step 11, the above area 20a-2
It is determined whether the use priority setting flag 21b is 0 or 1. When the area 20a-2 priority setting flag 21b is 1, the process proceeds to step 12, and when the area 20a-2 priority setting flag 21b is 0, the process proceeds to step 13.
Here, since the priority setting flag 21b for the area 20a-2 is set to 0, the process proceeds to step 13 and the normal processing signal is transmitted via the normal processing request signal line 23a to the PLC main body 1
Entered in.

The PLC main body 1 receives this normal processing request signal, and by the normal message processing in the processing cycle,
Process this message. In this case, the PLC main body 1 performs data reception processing in a normal processing cycle.

In the above description, the peripheral units 3 to P
The case where the normal processing message is transmitted to the LC body 1 has been described, but when the priority processing message is transmitted from the peripheral unit 3 to the PLC body 1, the data is stored in the shared memory 2.
Since it is input to the area 20b-2 of 0, when there is a data processing request from the peripheral unit 3, the data processing request flag 22d for the area 20b-2 is checked and the area 2b
If the 0b-2 data processing request flag 22d is 0, there is no data in the area 20b-2, so a message is written in the area 20b-2 and 1 is set in the area D data processing request flag 22d. Then, when the data processing request flag 22d for the area 20b-2 becomes 1, the signal that the data processing request is issued is input to the selector 23.

Then, in the selector 23, the area 2
It is determined whether the 0b-2 priority setting flag 21d is 0 or 1.

Area D priority setting flag 21d
Is set to 1, so the priority processing request signal line 23
The priority processing request signal is input to the PLC main body 1 via b.

The PLC main body 1 receives this priority processing request signal and processes this message by interrupt processing. In this case, since the PLC main body 1 performs processing by interruption, there is no waiting time until the message processing is executed.

In this way, the area of the shared memory 20 is divided into a plurality of areas and the priorities are provided for the respective areas, so that the data exchange time can be obtained according to the processing content.

In the above description, the peripheral units 3 to P
The case of transmitting a message to the LC main body 1 has been described, but when transmitting a normal processing message from the PLC main body 1 to the peripheral unit 3, data is transmitted to the area 20a-1 of the shared memory 20 and in the case of priority processing message transmission. ,
Since the area 20b-1 is used and the method of data exchange processing is performed in the same manner as described above in detail, description thereof will be omitted.

Further, in the above embodiment, since the area-specific priority setting flag 21 of each area in the shared memory 20 is composed of 1 bit per area, the method of data exchange processing has priority over normal processing. Although only two methods of processing can be set, it is also possible to give a plurality of data exchange priorities by giving the area priority setting flag 21 a plurality of bits per area.

For example, if the area-specific priority setting flag 21 has n bits for each area, it is possible to give priority to 2 ⁿ pieces of data exchange.

Next, the second embodiment will be described in detail with reference to FIGS.

FIG. 4 is a block diagram showing a schematic structure of the second embodiment. The same members as those in the above embodiment are designated by the same reference numerals and detailed description thereof will be omitted.

In this embodiment as well, as in the first embodiment, P
A memory area selection unit 10 having a shared memory 20 is provided between the LC body 1 and the peripheral unit 3.

As shown in FIG. 2, the memory area selection unit 10 has a shared memory 20 divided into four areas, a data processing request flag 22 for each area, and an area priority for setting a priority for each area. Has a setting flag 21,
A data processing request signal line 24 for transmitting a data processing request signal is connected to the shared memory.

Area-specific data processing request flag 2
2 checks the corresponding data request flag when there is a data processing request to any area forming the shared memory 20, writes the data in the area if the flag is 0, and The flag is set to 1 and a data processing request signal indicating that there is a data request to the PLC main body 1 is input through the data processing request signal line 24 connected to the shared memory 20.

Next, the operation of this embodiment will be described with reference to FIG.

Now, for example, the case of transmitting a priority processing message from the peripheral unit 3 to the PLC body 1 will be described. In this case, the area 20b-2 of the shared memory 20 is described.
Is used, the data processing request flag 2 for the area 20b-2 is issued when a data processing request is issued from the peripheral unit 3.
2d is checked. For example, if the data processing request flag 22d for the area 20b-2 is 0, there is no data in the area 20b-2, so the data is written in the area 20b-2.
The data processing request flag 22d for the area 20b-2 is set to 1. When it is determined that there is a data processing request for the area 20b-2, a data processing request signal is transmitted to the PLC body 1 via the data processing request signal line 24 (step 30). Then, the PLC main body 1 senses the area 20b-2 data priority setting flag of the area-specific priority setting flag 21 (step 31). to be continued,
In step 32, it is judged whether the priority setting flag 21d for the area 20b-2 is 0 or 1. Here, the priority setting flag 21d for the area 20b-2, which is the corresponding area, is 1
If so, the process proceeds to step 33, and if the area 20b-2 priority setting flag 21d is 0, the process proceeds to step 34. Here, the area 20b-2 priority setting flag 21d is set to 1. Therefore, the process proceeds to step 33, and the PLC main body 1 processes this message by interrupt processing.

In the above description, the peripheral units 3 to P
The case where the priority processing message is transmitted to the LC main body 1 has been described, but when transmitting normal data, the area 20a-2 of the shared memory 20 is used for data, and therefore, when there is a data processing request from the peripheral unit 3, the area 20a is transmitted. −
The data processing request flag 22b for 2 is checked, and if the data processing request flag 20b for area 20a-2 is 0, there is no data in the area 20a-2, so the area 20
A message is written in a-2, and 1 is set in the data processing request flag 20b for area 20a-2. When the data processing request flag 20b for the area 20a-2 becomes 1, the data processing request signal is transmitted to the PLC body 1 via the data processing request signal line 24. Then, PLC main body 1
Is the area 20a-2 of the priority setting flag 21 for each area.
The data data priority setting flag is sensed. Then, in step 32, it is judged whether the priority setting flag 21d for the area 20a-2 is 0 or 1. Area 2 here
Since the priority setting flag 21b for 0a-2 is set to 0, the PLC main body 1 executes the normal message processing in the processing cycle.

In the above description, the case where the message is transmitted from the peripheral unit 3 to the PLC main body 1 has been described, but when the normal processing message is transmitted from the PLC main body 1 to the peripheral unit 3, the data is shared by the shared memory 20. In the case of transmitting the priority processing message to the area 20a-1, the area 20b-1 is used, and the method of the data exchange processing is performed in the same manner as described above in detail, and therefore the description thereof is omitted.

With this structure, two data processing request signal lines are required in the first embodiment, whereas one data processing request signal line can be used in the above embodiments. There is an advantage.

As described in the first embodiment, it is possible to set a plurality of priorities by providing the area-specific priority setting flag 21 with a plurality of bits per area in the above-described embodiment as well.

Further, in the first to the above-mentioned embodiments, the area-specific priority setting flag 2 in the shared memory 20 is set.
By providing 1 to both the PLC main body 1 and the peripheral unit 3, the priority selection and the priority flag sensing when a data processing request is made can also be performed inside the PLC main body 1 or the peripheral unit 3.

Next, the third embodiment will be described in detail with reference to FIGS. 6 and 7.

FIG. 6 is a schematic configuration diagram of message communication in the third embodiment, and FIG. 7 is a conceptual diagram of a message format.

In the third embodiment, a memory area selection unit 10 not shown is provided between the PLC bodies 1a and 1b and the communication units 4a and 4b. In the case of this embodiment, the memory area selection unit 10 is shown. PLC main body 1 via
a, 1b and the communication units 4a, 4b are configured to perform bidirectional data transmission / reception. The data exchange between the PLC main bodies 1a and 1b and the communication units 4a and 4b is performed by the configuration described in detail in the first embodiment or the second embodiment, and the description thereof will be omitted.

In FIG. 6, the PLC main body 1 of this embodiment is shown.
In the case of message communication between a and the PLC main body 1b, the transmission side includes the PLC main body 1a and the communication unit 4a, and the reception side includes the PLC main body 1b and the communication unit 4b.

The message communication of this embodiment is performed by providing a priority setting area in the header portion of the data as shown in FIG. 7 and setting the flag of the priority setting area.

For example, the PLC body 1a is the PLC body 1b
When issuing a message requiring priority processing (hereinafter referred to as a priority event), the PLC main body 1a sets a desired priority in the priority setting area and issues the priority.

Data transfer from the PLC main unit 1 to the communication unit 4a is performed by the priority processing means described in detail in the first or second embodiment. Upon receiving the priority event, the transmission unit 4a on the transmission side reads the setting of the priority setting area of the header part of the transmission data, and transmits the data on the communication line by the processing according to the priority set in the priority setting area. .

Next, the communication unit 4b on the receiving side which has received the data first reads the priority setting area of the data and judges the priority of the data. According to the priority, data transfer from the communication unit 4b on the receiving side to the PLC body 1b is performed by the priority processing means described in detail in the first or second embodiment, as in the transmitting side.

As described above, since the area for setting the priority is provided in the header portion of the data, the transmission source and the reception destination can execute the processing according to the priority.

[0061]

As described above, according to the first aspect of the invention, the data exchange area is divided into a plurality of areas, the priority is set for each area, and a plurality of data exchange request signal lines are used.
Since the processing request signal according to the priority is transmitted to the PLC main body, it becomes possible to obtain the data exchange time according to the processing content, and the load of processing such as message communication and cyclic communication increases. However, it is possible to exchange emergency data such as a machine emergency stop command without waiting for the processing order or discarding the data.

According to the invention of claim 2 or claim 4, since a plurality of bits of the priority flag are provided for one data exchange area, it is possible to set a plurality of priorities, and it is possible to set the data according to the detailed processing content. You can get a replacement time.

According to the third aspect of the present invention, the priority set in the area-specific priority setting flag is read when it is determined that there is a data processing request. It is possible to use only one signal line for transmitting the processing request signal.

According to the fifth aspect of the present invention, since the priority setting means is built in the PLC main body and the peripheral unit, respectively, the response of data exchange is improved.

According to the invention of claim 6, since the area for setting the priority is provided in the header portion of the data, the transmission source,
Even the receiver can execute processing according to the priority.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a first embodiment.

FIG. 2 is a schematic configuration diagram showing a state of a priority flag for each area in which a shared memory is divided into areas.

FIG. 3 is a flowchart showing the operation of the first embodiment.

FIG. 4 is a block diagram showing a schematic configuration of a second embodiment.

FIG. 5 is a flowchart showing the operation of the second embodiment.

FIG. 6 is a block diagram showing a schematic configuration of message communication according to a third embodiment.

FIG. 7 is a conceptual diagram of a message format according to the third embodiment.

FIG. 8 is a block diagram showing a conventional PLC.

[Explanation of symbols]

1 PLC main body 1a PLC main body (sending side) 1b PLC main body (receiving side) 2 Interface (I / F) 2a Data exchange buffer memory (main body → unit) 2b Data exchange buffer memory (unit ← main body) 3 Peripheral unit 4a Communication unit (transmission side) 4b Transmission unit (reception side) 10 Memory area selection unit 20 Shared memory 20a Normal data exchange area 20b Priority data exchange area 21 Area-specific priority setting flag 21a Area 20a-1 priority setting flag 21b area 20a-2 priority setting flag 21c area 20b-1 priority setting flag 21d area 20b-1 priority setting flag 22 area-specific data processing request flag 22a area 20a-1 data processing request flag 22b area 20a-2 Data processing required Flag 22c areas 20b-1 data processing request flag 22d areas 20b-2 for the data processing request flag 23 selectors 23a normal processing request signal line 23b priority processing request signal line 24 processing request signal line

Claims (6)

[Claims] 1. A programmable controller for bidirectional data transmission / reception between a programmable controller main body and its peripheral unit via a shared memory, wherein the shared memory is divided into a plurality of areas, and data exchange processing is performed in advance in the areas. Priority setting means for setting the priority, judgment means for judging whether or not there is a data transmission request from either the programmable controller main body or the peripheral unit, and the priority set in the priority setting means. And a plurality of signal lines for transmitting data according to the priority selected by the selecting means, according to the priority and the presence or absence of a data transmission request from the determining means. A programmable controller characterized by having. 2. The programmable controller according to claim 1, wherein the priority setting means can set a plurality of priorities. 3. A programmable controller for bidirectional data transmission / reception between a programmable controller main body and its peripheral units via a shared memory, wherein the shared memory is divided into a plurality of areas, and data exchange processing is performed in advance in the areas. Priority setting means for setting the priority, judgment means for judging whether or not there is a data transmission request from either the programmable controller main body or the peripheral unit, and a data transmission request by the judgment means. A signal line for transmitting data when it is determined, and when data is transmitted through the signal line, priority is given to data having a high priority based on the priority set in the priority setting means. A programmable controller characterized by receiving processing. 4. The programmable controller according to claim 3, wherein the priority setting means can set a plurality of priorities. 5. The programmable controller according to claim 3, wherein the priority setting means is incorporated in the programmable controller main body and the peripheral unit, respectively. 6. The programmable controller according to claim 1, wherein a priority setting area is provided in a header portion of the data when data is transmitted and received between the programmable controller main bodies.