JPH0734416B2 - Grain boundary insulating porcelain composition - Google Patents

Description

TECHNICAL FIELD The present invention relates to a grain boundary insulating porcelain composition used for a dielectric or the like of a porcelain capacitor.

2. Description of the Related Art With the miniaturization and improvement of reliability of electronic devices, there is a strong demand for miniaturization and improvement of reliability of mounted electronic components. Therefore, there is a strong demand for miniaturization of the grain boundary insulation type semiconductor ceramic capacitor, and improvement of the dielectric constant and breakdown voltage of the dielectric is desired.

The conventional grain boundary insulation type semiconductor capacitor will be described below.

BaTiO ₃ or SrTiO ₃ is the main component, and a small amount of a metal oxide such as Nb or W is added to it, followed by firing in a neutral or reducing atmosphere to produce a semiconductor porcelain plate. A metal oxide consisting of oxides of metals such as Bi and Cu is applied to the semiconductor porcelain plate produced in this way, and this is heat-treated in air to insulate the grain boundaries and to insulate the grain boundary type semiconductor porcelain plate. To make. Electrodes are provided on the surface of this grain boundary insulation type semiconductor porcelain plate to complete a capacitor.

The characteristics of the grain boundary insulation type semiconductor capacitor configured as described above will be described below. In the grain boundary insulation type semiconductor capacitor, a thin dielectric layer is formed at an insulated crystal grain boundary. Capacitor characteristics such as capacitance, insulation resistance, breakdown voltage, etc. depend on the properties and thickness of the dielectric layer generated at the grain boundaries. At this time, the thickness of the dielectric layer formed at the crystal grain boundary is thin. Therefore, a larger electrostatic capacity can be obtained than a capacitor using a normal porcelain dielectric, but it has the drawback of low breakdown voltage and low insulation resistance.

Problems to be Solved by the Invention BaTiO ₃ or BaTiO ₃ based grain boundary insulator type semiconductor porcelain containing solid solution thereof as a main component can obtain a high apparent dielectric constant, so that the shape of a capacitor made of this can be miniaturized. However, since BaTiO ₃ has a large temperature dependency of the dielectric constant, the temperature dependency of the capacitance of BaTiO ₃ -based grain boundary insulating semiconductor ceramics is large. In addition, since BaTiO ₃ exhibits ferroelectricity near room temperature, waveform distortion and hysteresis occur due to nonlinear effects near room temperature. Also, the dielectric loss is large at about 5%. SrTiO ₃ -based materials are materials that overcome the shortcomings of capacitors using these BaTiO ₃ -based materials. Grain boundary insulation type semiconductor capacitors using porcelain mainly composed of SrTiO ₃ or its solid solution have a smaller temperature dependence of the dielectric constant than BaTiO ₃ series, and therefore a smaller temperature dependence of the capacitance.
Since TiO ₃ exhibits paraelectric properties near room temperature, it does not show waveform distortion or hysteresis due to nonlinear effects. Further, the dielectric loss rate is 1% or less, which is small.

As described above, it has excellent characteristics as a material for capacitors, but has a low relative dielectric constant. In the grain boundary insulation type semiconductor ceramic capacitor, the breakdown voltage decreases when the apparent permittivity is large and the capacitance per unit area is large. This is because the electrostatic capacity and breakdown voltage of the grain boundary insulation type semiconductor ceramic capacitor are related to the thickness of the dielectric layer formed at the crystal grain boundary. The capacity increases, but the breakdown voltage decreases. Conversely, if the thickness of the dielectric layer is increased, the breakdown voltage increases, but the capacitance per unit area decreases.

In addition, if the relative dielectric constant of the dielectric layer generated at the grain boundaries is increased in order to increase the breakdown voltage and increase the electrostatic capacitance per unit area, the capacitance change rate due to DC bias and the temperature of the electrostatic capacitance will increase. There was a drawback that the dependence became large.
These drawbacks are one of the major restrictions in using the grain boundary insulation type semiconductor ceramic capacitor.

Means for Solving the Problems In order to solve the above problems, the present invention provides Sr _1-X Ca _X TiO ₃
(However, 0 ≦ x ≦ 0.2) and 100 parts by mol of Nb ₂ O ₅ , Ta ₂
0.01 to 1.0 part by mole of at least one metal oxide selected from O ₅ , WO ₃ , La ₂ O ₃ , Y ₂ O ₃ , Nd ₂ O ₃ , Sm ₂ O _3, and CeO ₂ and M
A porcelain composition containing 0.05 to 3.00 parts by mol of gO and 0.05 to 1.00 parts by mol of Al ₂ O ₃ , or 0.01 to 1.0 parts by mol of SiO _{2 in the} above composition.

Action The present invention has the following features by the above means as compared with the conventional SrTiO ₃ -based grain boundary insulation type semiconductor ceramic capacitor.

(I) The apparent dielectric constant is 78000 or more and the CR product is 1000 μF ・ μ
There is more than Ω, which is about 4 times higher than the conventional one.

(Ii) The breakdown voltage is 650 to 700 Volt / mm, which is about 1.5 to 2 times higher.

(Iii) Capacitance change rate by DC bias is 16 Volt,
It is about 5% or less under the condition of DC application.

(Iv) The temperature dependence of dielectric loss and capacitance is not inferior to the conventional example.

Due to the above characteristics, it is possible to greatly relax the restrictions on the use of the conventional grain boundary insulation type semiconductor ceramic capacitor. A detailed description will be given below with reference to specific examples.

Examples The samples are SrTiO ₃ , CaTiO ₃ , Nb ₂ O ₅ , and T as shown in Table 1.
a ₂ O ₅ , WO ₃ , La ₂ O ₃ , Y ₂ O ₃ , Nd ₂ O ₃ , Sm ₂ O ₃ , CeO ₂ , MgO, Al ₂
The O ₃ salts are weighed so that each has the required composition, and this is wet mixed for 22 hours. After mixing, dehydration and drying, add about 1.0wt% of polyvinyl alcohol as a binder, adjust the particle size to 32 mesh pass, and apply a pressure of 1000kg / cm ^{2 to} a diameter of 9.6mm and a thickness of 0.3.
Mold into a 5 mm disc. These molded bodies are then placed in air 1
000 ° C. The N ₂ 90% by volume after heating to remove the binder at a temperature of, in a gas flow that of H ₂ were mixed 10%
Baking at 1400 ℃ for 4 hours, diameter 8.3mm, thickness 0.3mm
The semiconductor porcelain of Bismuth on the surface of this semiconductor porcelain
A metal oxide salt paste containing 9.4 wt%, copper 0.5 wt%, manganese 0.1 wt% and diethylene glycol 90 wt% is converted into metal oxide with respect to the weight of semiconductor porcelain, and applied at a ratio of 0.4 wt%, This was thermally diffused in air at a temperature of 1100 ° C. for 2 hours to obtain a grain boundary insulating type semiconductor ceramic. A paste containing silver was applied to the surface of this porcelain and baked at 850 ° C. for 30 minutes to form opposing electrodes, and a grain boundary insulated semiconductor porcelain was produced.

Table 2 shows the measurement results of the capacitance, dielectric loss, insulation resistance, breakdown voltage, temperature characteristics, and DC voltage dependence of the capacitance of the capacitor manufactured by the above method. When measuring each sample, the capacitance and dielectric loss were measured at a frequency of 1K.
The voltage was measured at 1 Hz at a frequency of 1 Hz, and the insulation resistance was measured after applying a DC voltage of 25 V for 30 seconds. The breakdown voltage was determined by applying a DC voltage and gradually increasing the applied voltage. The temperature characteristic value was calculated from the change rate (C _T −C ₂₀ ) / C ₂₀ × 100 from the capacitance value at + 85 ° C and −25 ° C. Where C
_T indicates the capacitance at + 85 ° C or -25 ° C. C ₂₀ is +
Capacitance at 20 ° C is shown.

In addition, the bias dependence of the capacitance is 60V DC voltage of 60V.
The capacitance value when applied for 2 seconds is C _16, and (C ₁₆ −C ₀ ) /
It was calculated from the calculation formula of C ₀ × 100.

As a conventional example for comparison, SrTiO ₃ and Nb ₂ O ₅ were used as SrTiO 3
₃ 100 molar parts, a Nb ₂ O ₅ were weighed at a ratio of 0.2 parts by mole to prepare a grain boundary insulation type semiconductor ceramic capacitors in the manner described in Example were examined its characteristics. Further, those marked with * from 1 in Table 1 to 5 in Table 1 and 1 in Table 2 to 5 in Table 2 are outside the scope of the present invention, and otherwise are all within the scope of the present invention. belongs to.

In Table 1, the sample Nos. Falling within the scope of the present invention are Nos. 2 to N.
o.3, No.6 to No.8, No.11 to No.13, No.16 to No.18, No.21 to N
o.23, No.26 to No.28, No.31 to No.33, No.36 to No.38, No.41
~ No.44, No.46 ~ No.48, No.51 ~ No.53, No.56 ~ No.58, other is outside the scope of the present invention, is a material for comparison .

As is clear from the above examples, the grain boundary insulating porcelain composition of the present invention is excellent in all of ε _a , tan δ, insulation resistance, breakdown voltage, temperature change rate of capacity, and capacity dependency of DC bias. These favorable results are due to the fact that a semiconductor porcelain in which abnormal grain growth is suppressed during firing, which has a uniform fine structure, and in which Mg and Al are partially segregated at grain boundaries is obtained.
Nb, Ta, W, La, Y, Nd, Sm, when the composition of each oxide of the oxide salts alone or the total composition ratio of the oxide salts is other than 0.01 to 1.0 parts by mole, that is, the above oxides When the composition ratio of the salts alone or in total is 0.01 part by mol or less, these oxide salts are insufficient as atomization control agents, so that there is no effect of semiconducting, and the composition of these metal oxide salts When the ratio is 1.0 part by mole or more, grain growth of the semiconductor ceramics is remarkably suppressed and neither is preferable. Also, MgO and Al ₂ O ₃ have MgO of 0.05 ≦ X ≦
3.00 parts by mole, Al ₂ O ₃ shows good characteristics when 0.05 ≦ Y ≦ 1.00 parts by mole, and when X <0.05, Y <0.05, insulation resistance decreases, and X ≧ 3.00, Y ≧ 1.00. In this case, grain growth is suppressed, and the porcelain is likely to stick to each other during the firing process, which is not preferable. Further, as is clear from Material Nos. _{2, 5,} and 10, MgO and Al ₂ O ₃ act to improve the characteristics based on the interaction.

In addition, in the above-mentioned embodiment, for insulating the crystal grain boundary of the semiconductor porcelain
The metal was segregated at the grain boundaries using the method of applying a paste consisting of Bi, Cu, Mn oxide salts on the surface of the semiconductor porcelain. It can be applied to the surface. Further, the amount of metal applied to the semiconductor porcelain and the heat treatment temperature differ depending on each metal or its compound, and are not limited to this embodiment.

EFFECTS OF THE INVENTION The present invention relates to Sr _1-X Ca _X TiO ₃ (0 ≦ X ≦ 0T2) with Nb ₂ O ₅ and Ta ₂ O.
0.01 ≦ X ≦ 0.3 of at least one metal oxide salt selected from ₅ , WO ₃ , La ₂ O ₃ , Nd ₂ O ₃ , Sm ₂ O ₃ , Dy ₂ O ₃ and CeO _2.
Mol part, MgO 0.05 ≦ Y ≦ 3.00 mol part, Al ₂ O ₃ 0.05 ≦ Z
Grain boundary insulation type porcelain composition obtained by firing ≦ 1.00 mol part of the composition in a reducing atmosphere to prepare a semiconductor porcelain, coating Bi, Cu, Mn and heat-treating the grain boundary by providing a silver electrode on the surface. The insulating semiconductor ceramic capacitor has the following effects as compared with the conventional example. In other words, the apparent dielectric constant is 78000 or more, the CR product is about 4 times higher, and the breakdown voltage is about 1.5 to 2
It has excellent characteristics that it is about twice as high and the DC bias dependency of the capacitance is about 1/4, and that the dielectric loss and the temperature dependency of the capacitance are comparable to the conventional example. . Furthermore, by adding 1.00 part by mole or less of SiO ₂ to the above composition, the insulation resistance can be further improved as compared with the capacitor made of the porcelain having the above composition. Therefore, by using the grain boundary insulation type ceramic composition of the present invention, it is possible to miniaturize the capacitor and improve the reliability, and thus to expand the range of use of the grain boundary insulation type semiconductor capacitor which has been conventionally limited. Yes, it has great industrial value.

Claims (2)

[Claims] 1. A 100 mol part of Sr _1-X Ca _X TiO ₃ (where 0 ≦ x ≦ 0.2), Nb ₂ O ₅ , Ta ₂ O ₅ , WO ₃ , La ₂ O ₃ , Y ₂ O ₃ , Nd ₂ O ₃ , Sm ₂
0.01 to at least one metal oxide of O ₃ and CeO ₂
1.0 mol part, MgO 0.05 to 3.00 mol part, Al ₂ O ₃ 0.05
A grain boundary insulating porcelain composition containing ˜1.00 parts by mole. 2. 100 parts by mole of Sr _1-X Ca _X TiO ₃ (where 0 ≦ x ≦ 0.2), Nb ₂ O ₅ , Ta ₂ O ₅ , WO ₃ , La ₂ O ₃ , Y ₂ O ₃ , Nd ₂ O ₃ , Sm ₂
At least one metal oxide selected from O ₃ and CeO ₂ should be used.
01-1.0 parts by mole, MgO 0.05-3.00 parts by mole, Al ₂ O ₃
A grain boundary insulating porcelain composition containing 0.05 to 1.00 part by mole and 0 to 1.0 part by mole of SiO ₂ .