JP2937024B2 - Semiconductor porcelain composition and method for producing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor porcelain composition, and more particularly, to a current / voltage non-current component used as an electric noise absorbing component in electric / electronic circuits mounted on various communication equipment, office equipment, audio equipment and the like. The present invention relates to a linear grain boundary insulating semiconductor ceramic composition and a method for producing the same.

[0002]

2. Description of the Related Art A grain boundary insulated semiconductor porcelain has a low melting point metal oxide or the like segregated by thermal diffusion at a grain boundary portion of a sintered ceramic (ceramic) crystallized into a semiconductor to increase resistance, thereby increasing the grain boundary. This is a type of electronic component that uses a portion as a capacitance / resistance component. In general, since a thin grain boundary part having a width of several nm is used, the size is small and a large capacitance can be obtained as compared with other types of capacitive elements.

In particular, strontium titanate (SrTiO ₃ )
An element containing as a main component has the advantages that it tends to have a grain boundary insulating structure, that its electrical characteristics are stable against changes in temperature and frequency, and that its dielectric loss is small. It is easy to cope with higher frequencies of equipment and electronic circuits, and has high reliability in the use environment when used in a wide variety of applications. For this reason, ceramic electronic component manufacturers have been working on high performance and high value-added capacitive elements containing SrTiO ₃ as the main component. noise filter,
It is also widely used for noise absorbing elements of semiconductor devices. As a typical application example, there is a current-voltage non-linear grain boundary insulating semiconductor porcelain element (capacitive varistor).

[0004] A capacitive varistor normally functions as a capacitor, but a high-voltage external surge (lightning surge) of several KV.
Also, when a steep switching noise is generated in a circuit, it is a so-called composite function element having a function (varistor function) that absorbs this and prevents a malfunction or insulation breakdown of the circuit element before it occurs. The absorbed electrical energy is dissipated outside the system as thermal energy. As a material having a varistor function, a ZnO-based material is famous, but since it has a significantly lower dielectric constant than that of an SrTiO ₃ -based material, it cannot have a capacitor function.

On the other hand, in the case of the SrTiO ₃ material, the stability of the current-voltage characteristics (IV curve) is inferior to that of the ZnO material because of the disorder of the grain boundary structure, and thus serves as an index of device performance. There is a disadvantage in that the varistor voltage and the current-voltage nonlinear coefficient lack reliability. For this reason, practical use has not progressed in spite of expectations for use in circuits of various electric and electronic devices.Currently, materials and process technologies are being developed, but current-voltage characteristics are stable. A capacitive varistor element which has good characteristics and can be used for circuit mounting has not yet been obtained.

[0006]

The capacitive varistor is often required to have the following electrical characteristics. That is, (1) The capacitance (C) is set so that steep noise can be absorbed.
Is large enough.

(2) The varistor voltage (V _{1 mA} ) can be freely controlled in accordance with the rated voltage of the element to be protected.

(3) The nonlinear coefficient (α) is sufficiently large and the response is fast.

(4) Changes in capacitance (C), varistor voltage (V _1mA ), nonlinear coefficient (α), etc. after absorbing steep noise are sufficiently small.

Of the above (1) to (4), (1) to (3)
With regard to (2), there is no particular problem with the currently used capacitive varistor. However, (4) remains an unresolved issue. The change in electrical characteristics of the varistor element after steep noise such as high-voltage external surge (lightning surge) or steep switching noise occurs
It is considered that the electrode interface insulating layer existing between the element (ceramic) and the electrode is thereby broken or modified.

Conventionally, in order to suppress the influence of steep noise on the electrode interface insulating layer, a method of modifying the electrode interface insulating layer by applying a surge voltage of several hundreds of volts several tens of times and then performing a heat treatment is conventionally used. Had been taken. However, in this method, an extra step of heat treatment is added.

In order to simplify this process, for example, in Japanese Patent Application Laid-Open No. 5-57724, a surge voltage of at least 5 kV is applied to destroy the electrode interface insulating layer and reduce the change in varistor voltage by about 4% or less. There has been proposed a varistor electrode processing method capable of suppressing the above problem. Although this method has an excellent improvement effect, the step itself of applying a surge voltage is still required, and the man-hour and cost for the step are required.
Rising manufacturing costs cannot be avoided.

The present invention has been made in view of such circumstances, and particularly, a semiconductor porcelain composition having stable electric characteristics after absorbing steep noise, and a special treatment of such a porcelain composition. It is an object of the present invention to provide a manufacturing method without any problem.

[0014]

Means for Solving the Problems As a result of repeated studies to solve the above-mentioned problems, the present inventor has found that the chemical composition of the crystal grains of the SrTiO ₃ -based semiconductor porcelain composition, By controlling the chemical composition, a semiconductor porcelain composition that can sufficiently withstand repetition of steep noise and the like, and a method for producing the same can be established.

The gist of the present invention lies in the following (a) porcelain composition and (b) a method for producing the composition.

(A) A semiconductor porcelain composition wherein the crystal grains are represented by the following chemical composition formula (1), and the grain boundary part is Na ₂ Ti ₃ O ₇ 55 to 84 mol% Bi ₂ O ₃ and At least one of PbO 15 to 40 mol% At least one of Cr ₂ O ₃ and MnO ₂ is mixed at a ratio of 1 to 5 mol% so that the total amount of the materials is 100 mol%. A semiconductor porcelain composition, comprising:

(Sr _1-XY Ca _X Mg _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where 0 <X ≦ 0.25 0 <Y ≦ 0.03 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000 (b) SrCO ₃ , CaCO ₃ , MgCO ₃ , TiO ₂ and Nb ₂ O ₅
The metal elements contained therein are mixed so as to satisfy the following formula (1), and calcined and synthesized. Then, a sintering agent is added thereto, and the mixture is fired in a reducing atmosphere at a temperature of 1420 to 1550 ° C. Na ₂ Ti ₃ O ₇ 55 to 84 mol% At least one of Bi ₂ O ₃ and PbO 15 to 40 mol% At least one of Cr ₂ O ₃ and MnO ₂ 1 to 5 mol% for a total of 100 mol% A method for producing a semiconductor porcelain composition, wherein the components of the mixed material (insulating agent) are segregated at the grain boundary by thermal diffusion.

(Sr _{1 -XY} Ca _X Mg _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where 0 <X ≤ 0.25 0 <Y ≤ 0.03 0.001 ≤ Z ≤ 0.010 0.990 ≤ a / b <1.000

[0019]

The semiconductor ceramic composition of the present invention (the invention of the above (a)) has a perovskite structure in which the crystal grains are represented by the above formula (1) and the general formula is ABO ₃ as described above. doing.

In the formula (1), the reason why X is more than 0 and 0.25 or less is to stabilize the sintering property, and that Y is more than 0 and 0.03 or less is that the crystal grain of the semiconductor ceramic composition is This is because the diameter is made uniform and the sinterability is stabilized. Z
Is set to 0.001 or more and 0.010 or less in order to promote the conversion of crystal grains into a semiconductor. Further, a / b is set to 0.990 or more.
The reason for making it less than 000 is to stabilize the sinterability.

The grain boundary of the semiconductor porcelain composition of the present invention comprises at least one of Na ₂ Ti ₃ O ₇ 55 to 84 mol% Bi ₂ O ₃ and PbO 15 to 40 mol% Cr ₂ O ₃ and MnO ₂ At least one of the components constituting a material (insulating agent) mixed in a ratio of 1 to 5 mol% (total 100 mol%), ie, Na, Ti, Bi
And / or Pb, Cr and / or Mn, and O
(Oxygen) is segregated at the grain boundary by thermal diffusion.

The reason why the mixing ratio of Na ₂ Ti ₃ O ₇ is in the range of 55 to 84 mol% is to develop and stabilize varistor properties.

The mixing ratio of at least one of Bi ₂ O ₃ and PbO is within the range of 15 to 40 mol% in order to stabilize dielectric properties such as capacitance or dielectric loss.
The mixing ratio of at least one of r ₂ O ₃ and MnO ₂ is 1 to 5
mol% is within the range of surge current resistance (ΔC, ΔC
V _1mA ).

The semiconductor ceramic composition of the present invention has good stability of voltage-current characteristics. In particular, the capacitance (C) after absorbing steep noise, the varistor voltage (V _1mA ), and the nonlinear coefficient (α) ) Are sufficiently small, and by using this porcelain composition, a capacitive varistor element that can be used for circuit mounting can be manufactured.

The invention (b) is a method for producing the porcelain composition according to the invention (a). Hereinafter, description will be made in the order of manufacturing steps.

First, SrCO ₃ , CaCO ₃ , Mg
CO ₃ , TiO ₂ and Nb ₂ O ₅ are accurately weighed so that the metal element contained therein satisfies the above formula (1), and mixed together with an appropriate amount of cobblestone, a dispersant and pure water in a pot mill (wet process). Mix). Mixing may be performed for about 24 hours. Note that Sr
CO ₃ , CaCO ₃ and MgCO ₃ all become oxides by firing.

The mixed slurry material is dehydrated, dried and crushed, and the crushed powder is transferred into a baked crucible made of, for example, zirconia, and calcined at 1180 ° C. in the atmosphere. In addition,
It is desirable to confirm that a predetermined solid solution has been synthesized by X-ray analysis, composition analysis, or the like.

The calcined synthetic powder is crushed, and trace amounts of CuO and SiO ₂ are added as sintering aids, and wet mixing is further performed.

The mixed slurry material is dehydrated, dried, and crushed to form a uniform powder having a particle size of about 1.0 μm.

An organic binder or the like is added to the mixture to form a column having a diameter of 8 mm and a thickness of 850 μm.

The molded body is heated to 1000 ° C. and degreased.

After degreasing, the mixture is filled in a firing crucible made of, for example, alumina (Al ₂ O ₃ ) and fired in a reducing atmosphere. The firing is carried out in a temperature range of 1420 to 1550 ° C in order to promote crystal grain growth and uniformity, and to promote semiconductor conversion.
Preferably for 8.0 hours.

As the reducing atmosphere, for example, a mixed gas of 1 to 20% by volume of hydrogen and 80 to 99% by volume of nitrogen may be used.

After washing the obtained sintered body in an organic solvent and hot water, at least one of Na ₂ Ti ₃ O ₇ 55 to 84 mol% Bi ₂ O ₃ and PbO 15 to 40 mol% Cr ₂ O ₃ and at least one of MnO ₂ at a rate of 1 to 5 mol% (total 100 mol%), the components of the insulating agent mixed, that is, Na, Ti, Bi and / or Pb,
Cr and / or Mn and O (oxygen) are segregated at grain boundaries by thermal diffusion in the atmosphere. This is to insulate the crystal grain boundaries of the sintered body. For example, the above-mentioned mixed material is kneaded with an organic vehicle agent, and is applied in the form of a paste to be applied to the surface of the sintered body. The amount may be about 20 to 50 mg in terms of 1 g of the aggregate), and firing may be performed. The baking is preferably performed in air at 1050 to 1350 ° C. for 1.0 to 4.0 hours in order to compensate for the insulation performance of the device and achieve both dielectric properties and varistor properties.

The semiconductor porcelain composition of the present invention can be manufactured through the above-mentioned steps.

Among them, the method of the present invention is characterized in that the raw materials are mixed so as to have a predetermined ratio and that the specific components are thermally diffused to insulate the crystal grain boundaries of the sintered body. There is a feature. May be performed in accordance with a commonly used method.

In order to produce a grain boundary insulated semiconductor porcelain element using the porcelain composition obtained as described above, silver (Ag) paste for a non-ohmic electrode is printed on both sides of the porcelain composition. Then, the electrodes may be baked at 780 to 830 ° C. As described above, when the element is formed into a cylindrical shape having a diameter of 8 mm and a thickness of 850 μm, the element has a diameter of 6 mm and a thickness of 720 μm including the electrode portion.

According to the method of the present invention, the semiconductor ceramic composition (a) having a stable current-voltage characteristic can be easily produced. In addition, by using this porcelain composition, it is possible to manufacture a grain boundary insulated semiconductor device without applying any special treatment such as heat treatment for modifying or destroying the electrode interface insulating layer or load of a surge voltage. it can.

[0039]

EXAMPLES The method of the present invention is applied (Sr _1-XY Ca _X Mg _Y )
_a (Ti _1-Z Nb _Z ) _b O ₃ A semiconductor porcelain composition having a composition of O ₃ was prepared, and a device obtained by baking silver electrodes on both surfaces thereof was tested for capacitance (C: nF) and dielectric loss ( DF:%),
The varistor voltage (V _1mA : V) and the nonlinear coefficient (α) were measured. Next, surge current (8 × 20μsec) between terminals
, 3000 A / cm ² ) were applied five times at one-minute intervals, and the same measurement was performed again to determine the rate of change before and after the application of the surge current. For comparison, the same measurement was performed on a porcelain composition prepared by a method deviating from the conditions specified in the method of the present invention.

The main component composition ratio (X, Y, Z and a / b) of the semiconductor ceramic composition used and the insulating agent (Na ₂ Ti ₃
Tables 1 to 3 show the compositions of O ₇ , PbO and Cr ₂ O ₃ ). The calcined synthesis of the raw materials is performed at 1180 ° C in the air, and the firing is performed at 1480 ° C in a reducing atmosphere (hydrogen: 10% by volume, nitrogen: 90% by volume).
Performed under the condition of 4.0 hours.
This was performed by baking for 2.0 hours. The baking of the silver electrode was performed by printing a silver paste for a non-ohmic electrode on both sides of the porcelain composition and baking at 660 ° C. The shape of the element after completion, including the electrode part, is 6 mm in diameter,
The thickness was set to 720 μm.

Among the above measurement items, the capacitance and the dielectric loss were measured at 1 V and 20 ° C. using an alternating current of 1 KHz. The varistor voltage is represented by a terminal voltage (V _{1 mA} ) when a DC voltage of 0 V to 150 V is continuously applied between the electrodes and a current of 1 mA flows through the device.

The nonlinear coefficient was calculated from the following equation by measuring the voltage between terminals (V _{10 mA} ) when a current of 10 mA further flows.

Α = 1 / log (V _{10 mA} / V _{1 mA} ) The number of samples was 30 for each sample in any of the above measurements.

The measurement results are shown in Tables 1 and 2.
However, only the change rate of the capacitance (ΔC) and the change rate of the varistor voltage (ΔV _1mA ) are shown, and the table shows the average value of 30 samples. As is clear from these results, in the semiconductor ceramic composition of the present invention, good results of 5% or less in both ΔC and ΔV _{1 mA} were obtained.

Although not shown, the semiconductor ceramic composition having the composition specified in the present invention has a capacitance of C ≧ 25 nF and a dielectric loss of DF ≦ 1.0 regardless of whether or not a surge current is applied. %, Varistor voltage: V _1mA ≦ 30 V and nonlinear coefficient: α ≧ 12.

From these results, it can be seen that the device of the present invention has excellent dielectric properties and also has excellent varistor function, and is extremely suitable for circuit mounting.

[0047]

[Table 1]

[0048]

[Table 2]

[0049]

[Table 3]

[0050]

The semiconductor porcelain composition of the present invention is excellent in dielectric properties, in particular, the change in capacitance, varistor voltage, etc. after absorbing steep noise is small. If this porcelain composition is used, it can be used for circuit mounting. A suitable capacitive varistor element can be manufactured. This porcelain composition can be easily produced by the method of the present invention without any special treatment.

Claims (2)

(57) [Claims] 1. A semiconductor porcelain composition wherein the crystal grains are represented by the following chemical composition formula (1), and the grain boundary part is Na ₂ Ti ₃ O ₇ 55 to 84 mol% Bi ₂ O ₃ and PbO At least one of 15 to 40 mol% of Cr ₂ O ₃ and at least one of MnO ₂ at a ratio of 1 to 5 mol% and a total of 100 mol%, and each component of the material is segregated by thermal diffusion. A semiconductor porcelain composition, characterized in that: (Sr _1-XY Ca _X Mg _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where 0 <X ≤ 0.25 0 <Y ≤ 0.03 0.001 ≤ Z ≤ 0.010 0.990 ≤ a / b <1.000 2. SrCO ₃ , CaCO ₃ , MgCO ₃ , TiO ₂ and Nb ₂ O
₅ is mixed so that the metal element contained therein satisfies the following formula (1), calcined and synthesized, added with a sintering aid, fired in a reducing atmosphere, and then Na ₂ Ti ₃ O ₇ 55 to 84 mol% Bi ₂ O ₃ and at least one of PbO 15 to 40 mol% Cr ₂ O ₃ and at least one of MnO ₂ Materials mixed at a ratio of 1 to 5 mol% to give a total of 100 mol%. A method for producing a semiconductor porcelain composition, wherein the constituent component of (1) is segregated to a grain boundary portion by thermal diffusion. (Sr _1-XY Ca _X Mg _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where 0 <X ≤ 0.25 0 <Y ≤ 0.03 0.001 ≤ Z ≤ 0.010 0.990 ≤ a / b <1.000