JP2937039B2 - Semiconductor porcelain composition and method for producing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor porcelain composition and a method for producing the same, and more particularly, to various communication and office equipment,
The present invention relates to a current-voltage nonlinear grain boundary insulated semiconductor porcelain composition used as a noise absorbing component in an electric / electronic circuit or the like mounted on an audio equipment and the like, and a method for producing the same.

[0002]

2. Description of the Related Art A grain boundary insulating semiconductor porcelain is formed by thermally diffusing a low-melting metal oxide or the like into a grain boundary portion of a sintered ceramic (ceramic) crystallized to form an oxide insulating layer. It is a type of electronic component used as a capacitance / resistance element. Generally, a thin grain boundary with a width of several nm is used.
Compared with other types of capacitive elements, the size is small and a large capacitance can be obtained.

In particular, strontium titanate (SrTiO ₃ )
An element containing as a main component has the advantages that it tends to have a grain boundary insulating structure, that its electrical characteristics are stable against changes in temperature and frequency, and that its dielectric loss is small. It is easy to cope with higher frequencies of equipment and electronic circuits, and has high reliability in the use environment when it is used in various applications. For this reason, ceramic electronic component manufacturers have been working on high performance and high value-added capacitive elements containing SrTiO ₃ as the main component. noise filter,
It is also widely used for noise absorbing elements of semiconductor devices. As a typical application example, there is a current-voltage non-linear grain boundary insulating semiconductor porcelain element (capacitive varistor).

[0004] A capacitive varistor normally functions as a capacitor, but a high-voltage external surge (lightning surge) of several KV.
Also, when a steep switching noise is generated in a circuit, it is a so-called composite function element having a function (varistor function) that absorbs this and prevents a malfunction or insulation breakdown of the circuit element before it occurs. The absorbed electrical energy is dissipated outside the system as thermal energy. As a material having a varistor function, a zinc oxide (ZnO 2) -based material is well known. However, since the dielectric constant is remarkably lower than that of a SrTiO ₃ -based material, it cannot have a capacitor function.

On the other hand, in the case of the SrTiO ₃ material, the reproducibility of the current-voltage characteristic (IV curve) is inferior to that of the ZnO material, and therefore, the varistor voltage and the current-voltage nonlinear coefficient which are indicators of the element performance are obtained. It has the disadvantage of lacking reliability. For this reason, practical application has not progressed in spite of the need for circuit mounting in various electrical and electronic devices.Currently, materials and process technology are being developed. A good capacitive varistor element that can be used for circuit mounting has not yet been obtained.

[0006]

The capacitive varistor is often required to have the following electrical characteristics. That is, (1) the capacitance (C) is set so that steep noise can be absorbed.
Is large enough.

(2) The varistor voltage (V _{1 mA} ) can be freely controlled in accordance with the rated voltage of the element to be protected.

(3) The nonlinear coefficient (α) is sufficiently large and the response is fast.

(4) Changes in capacitance (C), varistor voltage (V _1mA ), nonlinear coefficient (α), etc. after absorbing steep noise are sufficiently small.

Of the above (1) to (4), (1) to (4)
Regarding (3), there is no particular problem with the currently used capacitive varistor. However, item (4) remains as an unsolved problem. The change in the electrical characteristics of the varistor element after a steep noise such as a high-voltage external surge (lightning surge) or a steep switching noise is applied is due to the electrode interface insulating layer existing between the element (ceramic) and the electrode. It is thought to be due to destruction or modification.

The following method is effective for suppressing the effect of steep noise on the electrode interface insulating layer.

(A) Abrupt noise or the like is intentionally applied to a varistor element before circuit mounting, and an electrode interface insulating layer is destroyed in advance.

(B) Similarly, the heat treatment is performed to modify the electrode interface insulating layer.

(C) A high insulating layer capable of withstanding repetition of steep noise is formed.

A technique for suppressing the influence of steep noise on the electrode interface insulating layer by applying the methods (a) and (b) is disclosed in, for example, Japanese Patent Application Laid-Open No. 5-57724. According to this, by applying a surge voltage of 5 kV, the electrode interface insulating layer is destroyed, and the change in varistor voltage can be suppressed to about 4% or less.
It is said that the manufacturing process can be simplified as compared with a method of applying a heat treatment after applying a V surge voltage several tens of times. However, even in this method, the step of applying the surge voltage itself is still necessary, and the man-hour and cost for the step are required, and an increase in manufacturing cost cannot be avoided.

The present invention has been made in view of such circumstances, and in particular, a SrTiO ₃ -based material in which a high insulating layer capable of sufficiently withstanding repetition of steep noise or the like is formed at an electrode interface and which has good reproducibility of current-voltage characteristics. It is an object of the present invention to provide a semiconductor porcelain composition and a method for producing such a porcelain composition without special treatment.

[0017]

Means for Solving the Problems As a result of repeated studies to solve the above-mentioned problems, the present inventor has found that the chemical composition of the crystal grains of the SrTiO ₃ -based semiconductor porcelain composition, By controlling the chemical composition, a semiconductor porcelain composition that can sufficiently withstand repetition of steep noise and the like, and a method for producing the same can be established.

The gist of the present invention resides in the following (a) a porcelain composition and (b) a method for producing the composition.

(A) The crystal grain is represented by the following chemical composition formula (1), and the grain boundary part is at least one of Na ₂ Ti ₃ O ₇ 55 to 84 mol% B ₂ O ₃ and Bi ₂ O ₃ the semiconductor ceramic composition constituents of the mixed material so that the total 100 mol% in a proportion of 15~40mol% SiO ₂ 1~ 5mol% is characterized by comprising segregated by thermal diffusion.

(Sr _1-XY Ca _X Pb _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where O <X ≦ 0.25 O <Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000 (b) SrCO ₃ , CaCO ₃ , Pb ₃ O ₄ , TiO ₂ and Nb ₂ O ₅
The metal elements contained therein are mixed so as to satisfy the following formula (1), calcined and synthesized, then added with a sintering aid, fired in a reducing atmosphere, and then Na ₂ Ti ₃ O ₇ 55 8484 mol% B ₂ O ₃ and at least one of Bi ₂ O ₃ 15 to 40 mol% SiO ₂ 1 to 5 mol% The composition of the material mixed so that the total is 100 mol% by thermal diffusion at the grain boundary part. A method for producing a semiconductor porcelain composition, comprising:

(Sr _1-XY Ca _X Pb _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where O <X ≦ 0.25 O <Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000

[0022]

As described above, the semiconductor ceramic composition of the present invention (the invention of (a)) has a perovskite structure (ABO ₃ ) in which the crystal grains are represented by the above formula (1).

In the formula (1), the reason why X is more than 0 and 0.25 or less is to stabilize the sinterability, and if Y is more than 0 and 0.10 or less, the expression of sufficient capacitance is required. This is for obtaining a crystal grain size compatible with the above. Z is 0.001 or more and 0.010
The following is for promoting the conversion of the crystal grains into a semiconductor. The reason why a / b is 0.990 or more and less than 1.000 is to stabilize sinterability.

The grain boundary of the semiconductor porcelain composition of the present invention comprises at least one of Na ₂ Ti ₃ O ₇ 55 to 84 mol% B ₂ O ₃ and Bi ₂ O ₃ 15 to 40 mol% SiO ₂ 1 to Each component constituting the material (insulating agent) mixed so as to have a ratio of 5 mol% (total 100 mol%), that is, Na, Ti, O
(Oxygen), B and / or Bi, and Si are segregated at the grain boundaries by thermal diffusion.

The reason why the mixing ratio of Na ₂ Ti ₃ O ₇ is in the range of 55 to 84 mol% is to develop and stabilize varistor properties.

[0026] B ₂ O ₃ and to the range of 15～40Mol% mixing ratio of at least one kind of Bi ₂ O ₃ is a particle of Na ₂ Ti ₃ O ₇ by the presence of such glass-based compound This is for homogenizing the field segregation state. Mixing ratio of SiO ₂ is 1-5mo
It is for the same reason that it is within the l% range.

The above-mentioned semiconductor ceramic composition of the present invention has good stability of voltage-current characteristics, and in particular, can sufficiently withstand repetition of steep noise. An element manufactured using this porcelain composition has, for example, a diameter of 6 mm and a thickness between electrodes of 700 μm and exhibits the following characteristics.

Before applying surge current Capacitance: C ≧ 25 nF, Dielectric loss: DF ≦ 1.5
%, Varistor voltage: V _{1 mA} ≤ 25 V, non-linear coefficient: α ≥ 10 Variation rate of varistor voltage after application of surge current: ΔV _{1 mA} ≤ 3% Non-linear coefficient change rate: Δ α ≤ 3% And (a) a method for producing the porcelain composition of the invention. Hereinafter, description will be made in the order of manufacturing steps.

First, as raw materials, SrCO ₃ , CaCO ₃ , Pb
Prepare ₃ O ₄ , TiO ₂ and Nb ₂ O ₅ , weigh accurately so that the metal element contained therein satisfies the above formula (1), and put in a pot mill together with an appropriate amount of cobblestone, dispersant and pure water. Mix (wet mix). Mixing may be performed for about 24 hours. Note that both SrCO ₃ and CaCO ₃ become oxides by firing.

The mixed slurry material is dewatered, dried and crushed. The crushed powder is transferred into, for example, a calcined crucible made of zirconia, and calcined at 1180 ° C. in the atmosphere.
It should be noted that the synthesis of the predetermined solid solution was confirmed by X-ray analysis.
It is desirable to confirm by composition analysis or the like.

The calcined synthetic powder is crushed, and trace amounts of CuO and SiO ₂ are added as sintering aids, and wet mixing is further performed.

The mixed slurry material is dewatered, dried, and crushed to form a uniform powder having a particle size of about 1.0 μm.

An organic binder or the like is added to the mixture to form a column having a diameter of, for example, 8 mm and a thickness of 850 μm.

The compact is heated to 1000 ° C. to degrease it.

After degreasing, the material is filled in a firing crucible made of, for example, alumina (Al ₂ O ₃ ) and fired in a reducing atmosphere. The firing is carried out in a temperature range of 1420 to 1550 ° C in order to promote crystal grain growth and uniformity, and to promote semiconductor conversion.
Preferably for 8.0 hours.

As the reducing atmosphere, for example, a mixed gas of 1 to 20% by volume of hydrogen and 80 to 99% by volume of nitrogen may be used.

After washing the obtained sintered body in an organic solvent and hot water, 55 to 84 mol% of Na ₂ Ti ₃ O ₇ 15 to 40 mol% of at least one of B ₂ O ₃ and Bi ₂ O ₃ The components of the insulating agent mixed in a proportion of 1 to 5 mol% of SiO ₂ (total of 100 mol%), that is, Na, Ti, O (oxygen), B and / or Bi, and Si Segregate at the grain boundary by thermal diffusion. This is to insulate the crystal grain boundaries of the sintered body. For example, the above-mentioned mixed material is applied in the form of a paste to the surface of the sintered body. About 20 to 50 mg) and baking.
The firing is performed in air at 1050 to 1350 ° C and 1.0 to 4. to compensate for the insulation performance of the device and achieve both dielectric and varistor properties.
It is preferably performed for 0 hours.

The semiconductor porcelain composition of the present invention can be manufactured through the above-mentioned steps.

In order to produce a grain boundary insulating semiconductor porcelain element using the porcelain composition obtained as described above, a commercially available silver (Ag) paste for electrodes is printed on both sides of the porcelain composition. The electrodes may be baked at 600-820 ° C.

According to the method of the present invention, the semiconductor ceramic composition having the stable current-voltage characteristics (a) is subjected to any special treatment such as heat treatment for modifying or destroying the electrode interface insulating layer or surge voltage load. It can be easily manufactured without any additional processing.

[0041]

EXAMPLES The method of the present invention was applied (Sr _1-XY Ca _X Pb _Y )
_a (Ti _1-Z Nb _Z ) _b O ₃ A semiconductor porcelain composition having a composition of O ₃ was prepared, and a device obtained by baking silver electrodes on both surfaces thereof was tested for capacitance (C: nF) and dielectric loss ( DF:%),
The varistor voltage (V _1mA : V) and the nonlinear coefficient (α) were measured. Next, surge current (8 × 20μsec) between terminals
, 3000 A / cm ² ) were continuously applied 5 times at 1 minute intervals, and the same measurement was performed again to determine the rate of change before and after the application of the surge current. The completed devices were all 6 mm in diameter and 700 μm in thickness between electrodes. For comparison, the same measurement was performed on a porcelain composition prepared by a method deviating from the conditions specified by the method of the present invention.

The composition ratio of the main components (X, Y, Z and a / b) of the semiconductor ceramic composition used and the insulating agent (Na ₂ Ti ₃
Tables 1 and 2 show the compositions of O ₇ , B ₂ O ₃ and SiO ₂ ).
Some were used Bi ₂ O ₃ in place of the B ₂ O _3.

Among the above measurement items, the capacitance and the dielectric loss were measured at 1 V and 20 ° C. using an alternating current of 1 KHz. The varistor voltage is represented by a terminal voltage (V _{1 mA} ) when a DC voltage of 0 V to 150 V is continuously applied between the electrodes and a current of 1 mA flows through the device.

The nonlinear coefficient was calculated from the following equation by measuring the voltage between terminals (V _{10 mA} ) when a current of 10 mA further flows.

Α = 1 / log (V _{10 mA} / V _{1 mA} ) The number of samples was 30 for each sample in any of the above measurements.

The measurement results are shown in Tables 1 and 2.
The table shows the average value of 30 samples. As is clear from the results, the semiconductor ceramic composition of the present invention has a varistor voltage and a change rate (ΔV) of a nonlinear coefficient.
_1mA , Δα) are 3% or less, and the capacitance is C
≧ 25 nF, dielectric loss: DF ≦ 1.5%, and although not shown, varistor voltage: V _1mA ≦ 25V and nonlinear coefficient:
The device characteristics of α ≧ 10 were satisfied.

These device characteristics are excellent performances not found in conventional devices, and are not only compatible with dielectric characteristics and varistor characteristics, but also from the viewpoint that good reproducibility of varistor characteristics can be obtained after steep noise application. It is suitable for. on the other hand,
In a porcelain composition produced under conditions outside the range specified by the method of the present invention, problems such as deterioration of one or both of the varistor voltage and the change rate of the nonlinear coefficient occurred. Although an Ag electrode was used as the electrode material, another material may be used as long as it has a function as an electrode.

[0048]

[Table 1]

[0049]

[Table 2]

[0050]

The semiconductor porcelain composition of the present invention is excellent in both dielectric properties and varistor properties, and can obtain good reproducibility of varistor properties even after the application of steep noise. The device using this porcelain composition is suitable for circuit mounting, and can provide electronic components with higher versatility than conventional capacitive varistor devices to electronic / electric device circuits and the like.

This porcelain composition can be produced by the method of the present invention without any special treatment, and the process can be simplified.

Claims (2)

(57) [Claims] 1. A grain is represented by the chemical composition formula (1), the grain boundary _{portion, Na 2 Ti 3 O 7 55~84mol} % B 2 O 3 and Bi ₂ O ₃ of at least one 15 A semiconductor porcelain composition characterized in that constituent components of a material mixed so as to make a total of 100 mol% at a ratio of 4040 mol% SiO ₂ 1 to 5 mol% are segregated by thermal diffusion. (Sr _1-XY Ca _X Pb _Y ) _a (Ti _1-Z Nb _Z ) _b O ₃ (1) where O <X ≦ 0.25 O <Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000 2. SrCO ₃ , CaCO ₃ , Pb ₃ O ₄ , TiO ₂ and Nb ₂ O
₅ is mixed so that the metal element contained therein satisfies the following formula (1), calcined and synthesized, added with a sintering aid, fired in a reducing atmosphere, and then Na ₂ Ti ₃ O ₇ 55 to 84 mol% At least one of B ₂ O ₃ and Bi ₂ O ₃ 15 to 40 mol% SiO ₂ 1 to 5 mol% The components of the material mixed so as to be 100 mol% in total are thermally diffused. A method for producing a semiconductor porcelain composition, comprising segregating at a grain boundary. (Sr _1-XY Ca _X Pb _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where O <X ≦ 0.25 O <Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000