JP2998586B2 - Semiconductor porcelain composition and method for producing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor porcelain composition and a method for producing the same, and more particularly, to a ceramic porcelain composition used as a noise absorbing component in electric and electronic circuits mounted on various communication equipment, office equipment, audio equipment, and the like. The present invention relates to a current-voltage nonlinear grain boundary insulating semiconductor ceramic composition and a method for producing the same.

[0002]

2. Description of the Related Art A grain boundary insulating semiconductor porcelain is formed by thermally diffusing a low-melting metal oxide or the like into a grain boundary portion of a sintered ceramic (ceramic) crystallized to form an oxide insulating layer. It is a type of electronic component used as a capacitance / resistance element. In general, since a thin grain boundary part having a width of several nm is used, the size is small and a large capacitance can be obtained as compared with other types of capacitive elements.

In particular, strontium titanate (SrTi
An element containing O ₃ ) as a main component has advantages such as easy formation of a grain boundary insulating structure, stable electrical characteristics with respect to changes in temperature and frequency, and low dielectric loss. In recent years, it is easy to cope with a higher frequency of electronic devices, electronic circuits, and the like, and has high reliability in a use environment when a variety of applications are used. For this reason, ceramic electronic component manufacturers have been working on high performance and high value-added capacitive elements containing SrTiO ₃ as a main component. It is also widely used in noise filters and noise absorbing elements of semiconductor devices. As a typical application example, there is a current-voltage non-linear grain boundary insulating semiconductor ceramic element (capacitive varistor).

[0004] Capacitive varistors normally function as capacitors, but high-voltage external surges (lightning surges) of several KV.
Also, when a steep switching noise is generated in a circuit, it is a so-called composite function element having a function (varistor function) that absorbs this and prevents a malfunction or insulation breakdown of the circuit element before it occurs. The absorbed electrical energy is dissipated outside the system as thermal energy. In addition, as a material having a varistor function, a zinc oxide (ZnO) -based material is well known. However, since the dielectric constant is remarkably lower than that of a SrTiO ₃ -based material, it cannot have a capacitor function.

On the other hand, in the case of the SrTiO ₃ material, the reproducibility of the current-voltage characteristics (IV curve) is inferior to that of the ZnO material, and therefore, the varistor voltage and the current-voltage nonlinear coefficient which are indicators of the element performance are reduced. It has the disadvantage of lacking reliability. For this reason, practical application has not progressed in spite of the need for circuit mounting in various electrical and electronic devices.Currently, materials and process technology are being developed. A good capacitive varistor element that can be used for circuit mounting has not yet been obtained.

[0006]

The capacitive varistor is often required to have the following electrical characteristics. That is, (1) the capacitance (C) is set so that steep noise can be absorbed.
Is large enough.

(2) The varistor voltage (V _{1 mA} ) can be freely controlled in accordance with the rated voltage of the element to be protected.

(3) The nonlinear coefficient (α) is sufficiently large and the response is fast.

(4) Changes in capacitance (C), varistor voltage (V _1mA ), nonlinear coefficient (α), etc. after absorbing steep noise are sufficiently small.

Of the above (1) to (4), (1) to (4)
Regarding (3), there is no particular problem with the currently used capacitive varistor. However, item (4) remains as an unsolved problem. The change in the electrical characteristics of the varistor element after a steep noise such as a high-voltage external surge (lightning surge) or steep switching noise is applied is due to the electrode interface insulating layer existing between the element (ceramic) and the electrode. It is thought to be due to destruction or modification.

The following method is effective for suppressing the effect of steep noise on the electrode interface insulating layer.

(A) Abrupt noise or the like is intentionally applied to a varistor element before circuit mounting, and an electrode interface insulating layer is destroyed in advance.

(B) Similarly, the heat treatment is performed to modify the electrode interface insulating layer.

(C) A high insulating layer capable of withstanding repetition of steep noise is formed.

A technique for suppressing the influence of steep noise on the electrode interface insulating layer by applying the methods (a) and (b) is disclosed in, for example, Japanese Patent Application Laid-Open No. 5-57724. According to this, by applying a surge voltage of 5 KV, the electrode interface insulating layer is destroyed, and the change in the varistor voltage can be suppressed to about 4% or less.
It is said that the manufacturing process can be simplified as compared with a method of applying a heat treatment after applying a surge voltage of 00V several tens of times. However, even in this method, the step of applying the surge voltage itself is still necessary, and the man-hour and cost for the step are required, and an increase in manufacturing cost cannot be avoided.

The present invention has been made in view of such circumstances, and in particular, has a good reproducibility of current-voltage characteristics in which a high insulating layer which can sufficiently withstand repetition of steep noise or the like is formed at the electrode interface. An object of the present invention is to provide a SrTiO ₃ -based semiconductor porcelain composition to be obtained, and a method for producing such a porcelain composition without adding any special treatment.

[0017]

As a result of repeated investigations to solve the above-mentioned problems, the present inventor has found that the SrTiO ₃ -based semiconductor porcelain composition has a chemical composition of crystal grains themselves and a grain boundary portion. By controlling the chemical composition, a semiconductor porcelain composition that can sufficiently withstand repetition of steep noise and the like, and a method for producing the same can be established.

The gist of the present invention resides in the following (a) a porcelain composition and (b) a method for producing the composition.

(A) The crystal grains of the ceramics converted into a semiconductor are represented by the following chemical composition formula (1), and the grain boundary portion is Na ₂ Ti ₃ O ₇ 55 to 84 mol% B ₂ O ₃ and Bi ₂ O ₃ At least one of 15 to 40 mol% of Cr ₂ O ₃ and MnO ₂ , at least one of 1 to 5 mol% is mixed at a ratio of 1 to 5 mol% so that a total of 100 mol% of the components of the material is segregated by thermal diffusion. , And A
A semiconductor porcelain composition comprising 0.05 to 0.15% by weight of gO based on the ceramic.

(Sr _{1 -XY} Ca _X Pb _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where 0 <X ≦ 0.25 0 <Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000 (b) The crystal grains of the ceramic after conversion into a semiconductor satisfy the following expression (1), and the AgO content of the ceramic is 0.05 to performs material prepared to have 0.15 wt%, were mixed and the resulting material, after calcination synthesized, firing in a reducing atmosphere by adding a sintering aid, then, Na ₂ Ti ₃ O ₇ mixed so that a total 100 mol% in a proportion of 55~84mol% B ₂ O ₃ and at least one of _{Bi 2 O 3 15~40mol% Cr 2} O 3 and at least one. 1 to 5 mol% of MnO ₂ Of segregated constituents of the material at the grain boundary by thermal diffusion The method of manufacturing a semiconductor porcelain composition according to symptoms.

(Sr _{1 -XY} Ca _X Pb _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ (1) where 0 <X ≦ 0.25 0 <Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000

[0022]

According to the semiconductor ceramic composition of the present invention (the invention of (a) above), as described above, the ceramics (porcelain composition) formed into a semiconductor has a perovskite structure represented by the above formula (1). (ABO ₃ ).

In the formula (1), the reason why X is larger than 0 and 0.25 or less is to stabilize the sintering property, and that Y is larger than 0 and 0.10 or less is sufficient. This is because the crystal grain size is such that a large capacitance can be exhibited.
The reason why Z is set to 0.001 or more and 0.010 or less is to promote the conversion of crystal grains into a semiconductor. The reason why a / b is 0.990 or more and less than 1.000 is to stabilize sinterability.

In the semiconductor ceramic composition of the present invention, the grain boundary portion is 55 to 84 mol% of Na ₂ Ti ₃ O ₇ B ₂ O ₃ and at least one of Bi ₂ O ₃ 15 to 40 mol% of Cr ₂ O ₃ And at least one of MnO ₂ and 1 to 5 mol% of the components of the material (insulating agent) mixed in a total of 100 mol%, that is, Na, Ti, O
(Oxygen), B and / or Bi, and Cr and / or Mn are segregated at the grain boundary by thermal diffusion.

The mixing ratio of Na ₂ Ti ₃ O ₇ is 55 to 84
In order to be within the mol% range, varistor properties are expressed,
And for stabilization.

[0026] to the B ₂ O ₃ and in the range of 15～40Mol% mixing ratio of at least one of Bi ₂ O ₃ is, Na ₂ T by the presence of such glass-based compound
This is for homogenizing the grain boundary segregation state of i ₃ O ₇ .

The reason why the mixing ratio of at least one of Cr ₂ O ₃ and MnO ₂ is in the range of 1 to 5 mol% is as follows.
This is for compensating the surge current resistance and suppressing ΔC (rate of change in capacitance) and ΔV _1mA (rate of change in varistor voltage) to be low.

Further, the semiconductor ceramic composition of the present invention includes:
AgO is 0.05 to 0.15 with respect to the ceramics
% By weight. This is because when the electrode material is baked on the porcelain composition to produce a semiconductor porcelain element, Ag constituting the electrode material (or contained in the electrode material) excessively diffuses into the grain boundary portion of the ceramic, and the grain boundary resistance increases. To prevent the element's insulation from being significantly degraded due to the significant deterioration of
By incorporating AgO in the ceramics in advance, the grain boundary diffusion concentration of Ag constituting the electrode material can be suppressed low. However, when the AgO content is less than 0.05% by weight, the above effect, that is, the stabilization of the insulating performance is insufficient, and
V _1mA (change rate of varistor voltage) and Δα (change rate of non-linear coefficient) cannot be suppressed to 3% or less as described later. On the other hand, if it exceeds 0.15% by weight, AgO acts as a sintering aid. However, C (capacitance) is not sufficient because fine grains are generated in the ceramics.
Smaller than.

The above-mentioned semiconductor ceramic composition of the present invention has good stability of voltage-current characteristics, and in particular can sufficiently withstand repetition of steep noise. A device manufactured using this porcelain composition has, for example, a diameter of 6 mm and a thickness between electrodes of 700.
μm and exhibits the following characteristics.

Before application of surge current Capacitance: C ≧ 20 nF, Dielectric loss: DF ≦
1.0%, varistor voltage: V _1mA ≦ 20V, nonlinear coefficient: α ≧ 10 Variation rate of varistor voltage after application of surge current: ΔV _1mA ≦ 3% Rate of change of nonlinear coefficient: Δα ≦ 3% The invention of (a) is a method for producing the porcelain composition of the invention of (a). Hereinafter, description will be made in the order of the manufacturing process.

First, SrCO ₃ , CaC
O ₃ , Pb ₃ O ₄ , TiO ₂ , Nb ₂ O ₅ and AgO
Is prepared, the metal element contained therein satisfies the above formula (1), and AgO is added to the ceramic in an amount of 0.1%.
0.5-0.15% by weight is accurately weighed,
Mix (wet mixing) in a pot mill with an appropriate amount of cobblestone, dispersant and pure water. Mixing may be performed for about 24 hours. Note that both SrCO ₃ and CaCO ₃ become oxides by firing.

The mixed slurry-like raw material is dehydrated and dried, and then crushed. The crushed powder is transferred into, for example, a calcined crucible made of alumina, and calcined at 1150 ° C. in the atmosphere. It is desirable to confirm that a predetermined solid solution has been synthesized by X-ray analysis, composition analysis, or the like.

The calcined synthetic powder is pulverized, and trace amounts of CuO and SiO ₂ are added as sintering aids, and wet mixing is further performed.

The mixed slurry-like calcined raw material is dehydrated and dried, crushed, and further sized to a uniform powder having a particle size of about 1.0 μm.

An organic binder or the like is added to the mixture to form a column having a diameter of, for example, 8 mm and a thickness of 850 μm.

The compact is heated to 1000 ° C. to degrease it.

After degreasing, the mixture is filled in a firing crucible made of, for example, zirconia and fired in a reducing atmosphere. The firing is carried out in a temperature range of 1420 to 1550 ° C. in order to promote crystal grain growth and uniformity, and to promote semiconductor conversion.
It is preferably performed for up to 8.0 hours. In addition, as a reducing atmosphere, for example, hydrogen 1 to 20% by volume, nitrogen 80 to 99
A volume% mixed gas may be used.

After the obtained sintered body is washed in an organic solvent and hot water, 55 to 84 mol% of Na ₂ Ti ₃ O ₇ 15 to 40 mol% of at least one of B ₂ O ₃ and Bi ₂ O ₃ cr ₂ O ₃ and components of the mixed insulating agent such that the total 100 mol% at a rate of at least one. 1 to 5 mol% of MnO _2, i.e., Na, Ti, O (oxygen),
B and / or Bi, and Cr and / or M
n is segregated at the grain boundary by thermal diffusion in the atmosphere. This is to insulate the crystal grain boundaries of the sintered body. For example, the above-described mixed insulating agent is made into a paste and applied to the surface of the sintered body (the amount applied is 1 g of the sintered body. Converted to 20
５０50 mg) may be fired. The firing is performed at a temperature of 1050 to 1350 ° C. in the atmosphere at 1.0 to 1350 ° C. in order to compensate for the insulating performance of the element and to achieve both dielectric properties and varistor properties.
It is preferably performed for 4.0 hours.

The semiconductor porcelain composition of the present invention can be manufactured through the above-mentioned steps.

In order to produce a grain boundary insulating semiconductor porcelain element using the porcelain composition obtained as described above, a commercially available silver (Ag) paste for an electrode is printed on both sides of the porcelain composition. , At 600 to 820 ° C.

According to the method of the present invention, the semiconductor ceramic composition having a stable current-voltage characteristic (a) is subjected to any special treatment such as a heat treatment for modifying or destroying the electrode interface insulating layer or a surge voltage load. It can be easily manufactured without any additional processing.

[0042]

EXAMPLES The method of the present invention was applied to (Sr _1-XY Ca _X P
b _Y ) _a (Ti ₁ -Z Nb _Z ) _b O ₃ A semiconductor porcelain composition having a composition of _{B 3} was prepared, and silver electrodes were baked on both surfaces thereof. The dielectric loss (DF:%), the varistor voltage ( _V1mA : V) and the nonlinear coefficient (α) were measured. Next, after applying a surge current (8 × 20 μsec, 3000 A / cm ² ) five times at one minute intervals between the terminals, the varistor voltage (V _1mA : V _{1 mA} :
V) and the nonlinear coefficient (α) were measured to determine the rate of change before and after the application of the surge current. In addition, the shapes of the completed devices were all 6 mm in diameter and 700 μm in thickness between electrodes.
For comparison, the same measurement was performed on a porcelain composition prepared under conditions deviating from the conditions specified by the method of the present invention.

The main component composition ratios (X, Y, Z and a / b) of the semiconductor ceramic composition used, the content of AgO, and the insulating agents (Na ₂ Ti ₃ O ₇ , B ₂ O ₃ and Cr ₂ O)
The composition of ₃ ) is shown in Tables 1 to 3. Some, Bi ₂ O ₃ in place of the B ₂ O _3, and using MnO ₂ in place of the Cr ₂ O _3.

Among the above measurement items, the capacitance and the dielectric loss were measured at 1 V and 20 ° C. using an alternating current of 1 KHz.
The varistor voltage is a DC voltage between the electrodes of 0 V to 150 V.
And a voltage between terminals (V _{1 mA} ) when a current of 1 mA flows through the device. The nonlinear coefficient is the voltage between terminals (V _10mA ) when a current of 10 mA further flows.
Was measured and calculated from the following equation.

Α = 1 / log (V _{10 mA} / V _{1 mA} ) The number of samples was 30 for each sample in any of the above measurements.

The measurement results are shown in Tables 1 to 3. In the table, the average value of 30 samples was shown. As is clear from the results, the semiconductor ceramic composition of the present invention has a varistor voltage and a change rate (ΔV) of a nonlinear coefficient.
_{1 mA} , Δα) are 3% or less, and are not shown, but the capacitance is C ≧ 20 nF, and the dielectric loss is DF ≦
1.0%, and further satisfied the element characteristics of varistor voltage: V _1mA ≦ 20 V and nonlinear coefficient: α ≧ 10.

These device characteristics are excellent performances not found in conventional devices, and are not only compatible with dielectric characteristics and varistor characteristics, but also from the viewpoint that good reproducibility of varistor characteristics can be obtained after steep noise application. It is suitable for. on the other hand,
In a porcelain composition produced under conditions outside the range specified by the method of the present invention, problems such as deterioration of one or both of the varistor voltage and the change rate of the nonlinear coefficient occurred. Although an Ag electrode was used as the electrode material, another material may be used as long as it has a function as an electrode.

[0048]

[Table 1]

[0049]

[Table 2]

[0050]

[Table 3]

[0051]

The semiconductor porcelain composition of the present invention is excellent in both dielectric properties and varistor properties, and can obtain good reproducibility of varistor properties even after the application of steep noise. The device using this porcelain composition is suitable for circuit mounting, and can provide electronic components with higher versatility than conventional capacitive varistor devices to electronic / electric device circuits and the like.

This porcelain composition can be produced by the method of the present invention without any special treatment, and the process can be simplified.

Claims (2)

(57) [Claims] (1) A crystal grain of a ceramic that has been made into a semiconductor is represented by the following chemical composition formula (1), and the grain boundary portion is 55 to 84 mol% of Na ₂ Ti ₃ O ₇ B ₂ O ₃ and Bi ₂ O ₃ . At least one of 15 to 40 mol% of Cr ₂ O ₃ and MnO ₂ , at least one of 1 to 5 mol%, and a constituent component of a material mixed so as to be 100 mol% in total; Furthermore, A
A semiconductor porcelain composition comprising 0.05 to 0.15% by weight of gO based on the ceramic. _{(Sr 1-XY Ca X Pb} Y) a (Ti 1-Z Nb Z) b O 3 ··· (1) , however, 0 <X ≦ 0.25 0 < Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000 2. The crystal grains of the ceramic after conversion into a semiconductor satisfy the following formula (1), and the Ag of the ceramic is
Raw materials are prepared so that the O content is 0.05 to 0.15% by weight, and the obtained raw materials are mixed and calcined.
Added sintering aid was fired in a reducing atmosphere and _{then, Na 2 Ti 3 O 7 55~84mol} % B 2 O 3 and Bi ₂ O at least one 15~40mol% Cr ₂ O ₃ of ₃ and A method for producing a semiconductor porcelain composition, wherein constituent elements of a material mixed so that a total of 100 mol% of at least one kind of MnO ₂ is 1 to 5 mol% is segregated to a grain boundary part by thermal diffusion. _{(Sr 1-XY Ca X Pb} Y) a (Ti 1-Z Nb Z) b O 3 ··· (1) , however, 0 <X ≦ 0.25 0 < Y ≦ 0.10 0.001 ≦ Z ≦ 0.010 0.990 ≦ a / b <1.000