JPH07335814A - Surface mount parts including semiconductor integrated circuit and fabrication thereof - Google Patents

Surface mount parts including semiconductor integrated circuit and fabrication thereof

Info

Publication number
JPH07335814A
JPH07335814A JP6165733A JP16573394A JPH07335814A JP H07335814 A JPH07335814 A JP H07335814A JP 6165733 A JP6165733 A JP 6165733A JP 16573394 A JP16573394 A JP 16573394A JP H07335814 A JPH07335814 A JP H07335814A
Authority
JP
Japan
Prior art keywords
independent
surface mount
joints
small number
mount component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6165733A
Other languages
Japanese (ja)
Inventor
Akira Kitahara
明 北原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP6165733A priority Critical patent/JPH07335814A/en
Publication of JPH07335814A publication Critical patent/JPH07335814A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79Apparatus for Tape Automated Bonding [TAB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To automatically correct mounting error upon melting a solder and hereby prevent exfoliation by providing independent larger joint parts of a minimum number joined with a wiring board not conducted and coupled with electrodes of an IC chip independently of a plurality of ultrafine joint parts. CONSTITUTION:An electrode of an IC chip 1 and a lead wire 2 comprising a conductive metal plate lead frame are conducted and coupled through wire bonding 3 and are packaged with sealing resin 4. Independently of a plurality of ultrafine outer leads 6 protruded outwardly of the package 5 from the lead 2 a die pad support lead 7 is formed into a gullwing and is protruded as independent large joint parts of a minimum number not conducted and coupled with the electrodes of the IC chip 1. Even when there is any mounting error, and even when there is slightly displaced connection surfaces of the independent large junction parts 34 of a minimum number independent of a solder paste 32 and a solder precoating 33 on the wiring board, the connection surface are large areas so that exfoliation is prevented and hence surface packaging parts are pulled nearer to the pad upon the solder being solidified for automatic correction of the mounting error.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体集積回路を内蔵し
た、1個以上のICチップ(以下ICチップと略称す
る)の電極と導通連結され、外方へ向けて突設した、配
線板へ接続されるべき複数の極微細な接合部の配列を設
けた高密度表面実装部品及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board which is conductively connected to the electrodes of one or more IC chips (hereinafter abbreviated as IC chips) having a semiconductor integrated circuit built therein and which is projected outward. The present invention relates to a high-density surface mount component provided with an array of a plurality of extremely fine joints to be connected and a manufacturing method thereof.

【0002】[0002]

【従来の技術】近年のプリント配線板(以下配線板と略
称する)に対する半導体部品の高集積化に伴って、半導
体パッケージの配線板への実装方式は、接合部である複
数本のアウターリードを配線板の孔へ挿入するリード挿
入実装方式から、配線板の表面に形成したパッド(導体
パターン)へ直接に接合部を接続する表面実装方式が主
流となりつつある。
2. Description of the Related Art With the recent increase in the integration of semiconductor components on a printed wiring board (hereinafter abbreviated as a wiring board), the mounting method of a semiconductor package on a wiring board is such that a plurality of outer leads that are joints are used. From the lead insertion mounting method of inserting into the hole of the wiring board, the surface mounting method of directly connecting the joint portion to the pad (conductor pattern) formed on the surface of the wiring board is becoming mainstream.

【0003】前記表面実装部品であるICパッケージや
LSIパッケージ(以下ICパッケージと略称する)と
しては、SOP、SOJ、QFP、QFJ(PLC
C)、TCP、PGA、LCC、モジュール、ハイブリ
ッドIC、COB等が代表的に知られている。
As the IC package and the LSI package (hereinafter abbreviated as IC package) which are the surface mount components, SOP, SOJ, QFP, QFJ (PLC) are available.
C), TCP, PGA, LCC, module, hybrid IC, COB, etc. are typically known.

【0004】ところで、従来において、前記ICチップ
の電極と導通連結され、外方へ向けて突設した、配線板
へ接続されるべき複数のアウターリードは夫々の先端部
が絶縁性の連結部材によって互いに連結され、該連結部
材は、直ちに、又は他の連結部材(ブリッジ、枠体等)
を介して前記ICチップ本体又は、該本体を封止したパ
ッケージと、一体に連結された表面実装部品(以下一体
に連結された表面実装部品と略称する)において、前記
アウターリードと離れた複数箇所に前記ICチップの電
極と導通連結されていない独立した、配線板との接合用
パッドが形成されたものがある。(特開平6−2934
8参照)
By the way, conventionally, a plurality of outer leads, which are conductively connected to the electrodes of the IC chip and project outwardly and which are to be connected to a wiring board, are connected at their tips by insulating connecting members. Connected to each other, the connecting members being immediately or other connecting members (bridges, frames, etc.)
In the IC chip main body or the package in which the main body is sealed via the IC chip and the surface mount component integrally connected (hereinafter, abbreviated as an integrally connected surface mount component), at a plurality of locations separated from the outer lead. In some cases, an independent bonding pad with a wiring board is formed, which is not electrically connected to the electrode of the IC chip. (JP-A-6-2934
(See 8)

【0005】又上記とは別に、前記ICチップの電極と
導通連結された配線板へ接続されるべき複数の接合部の
内、極少数の接合部は配線板との各接続面積が、その他
の接合部に比較して、数倍乃至数十倍に形成された大接
合部であることを特徴とする表面実装部品(以下導通さ
れた大接合部を有する表面実装部品と略称する)があ
る。(特許出願日、平成6年5月26日参照)
Apart from the above, among the plurality of joints to be connected to the wiring board electrically connected to the electrodes of the IC chip, a very small number of joints have different connection areas with the wiring board. There is a surface mount component (hereinafter, abbreviated as a surface mount component having a conductive large joint) characterized in that the large joint is formed several times to several tens of times as large as the joint. (See patent application date, May 26, 1994)

【0006】[0006]

【発明が解決しようとする課題】最近とくに、電子機器
の軽薄短小、高機能、多機能等の市場での要求に伴い、
半導体の大規模集積回路を内蔵したLSI、VLSIや
ULSIパッケージ(以下ICパッケージと統一略称す
る)等が開発され、高密度の表面実装がなされつつあ
る。
Recently, in particular, in response to market demands for electronic equipment such as lightness, thinness, shortness, high functionality, and multi-functionality,
LSIs, VLSIs, ULSI packages (hereinafter collectively referred to as IC packages) incorporating large-scale semiconductor integrated circuits have been developed, and high-density surface mounting is being performed.

【0007】該高密度表面実装においては、配線板と接
続されるべき複数の接合部は多ピン化に伴って、配線板
との接続ピッチが益々狭小化しつつあり、最近では0.
5mmピッチのQFPや0.3mmピッチのTCPが登
場しており、更なる狭ピッチの極微細な接合部における
高密度表面実装技術の開発が進められている。
In the high-density surface mounting, a plurality of joints to be connected to the wiring board have become increasingly narrower in connection pitch with the wiring board due to the increase in the number of pins.
QFP with a pitch of 5 mm and TCP with a pitch of 0.3 mm have been introduced, and the development of a high-density surface mounting technique for an even finer joint with a narrower pitch is underway.

【0008】ところが、高密度実装には問題が多い。前
記複数の接合部は極微細であり、配線板のパッドも同じ
く極微細であって、該パッドに搭載されるハンダ層であ
るハンダペースト(クリーム状)やハンダプリコート
(熔融後固形化したもの)も微量であり、尚且つ、狭ピ
ッチ(極狭いリード間隔)である。
However, there are many problems in high-density mounting. The plurality of joints are extremely fine, and the pad of the wiring board is also extremely fine, and a solder paste (cream-like) or a solder precoat (solidified after melting) which is a solder layer mounted on the pad. Is a very small amount and has a narrow pitch (an extremely narrow lead interval).

【0009】従って実装機における、僅かな搭載誤差に
よっても図11に示す通り前記複数の極微細な接合部6
は、ハンダペースト32やハンダプリコート33上から
の脱落問題がある。更に図12に示す通りハンダペース
ト32にあっては、搭載誤差やリード浮き又は、配線板
のパッド等のバラツキによって、ハンダペースト32の
倒壊におけるハンダタッチやハンダ接続しない等の問題
がある。
Therefore, even with a slight mounting error in the mounting machine, as shown in FIG.
Has a problem of falling off from the solder paste 32 or the solder precoat 33. Further, as shown in FIG. 12, the solder paste 32 has a problem such as a solder touch or a solder connection in the collapse of the solder paste 32 due to a mounting error, lead floating, or variation of pads on the wiring board.

【0010】又高密度の表面実装後、配線板との全ての
接続面積が微小でハンダも微量であるため、接続強度が
きわめて小さい。従って輸送や不注意による落下時等の
ショックに弱くハンダのはずれ等による市場クレームの
問題がある。
After high-density surface mounting, the connection area with the wiring board is very small and the amount of solder is very small. Therefore, the connection strength is extremely low. Therefore, there is a problem of market complaints due to detachment of solder, which is vulnerable to shocks such as transportation and accidental fall.

【0011】又TAB(熱圧着による実装技術)を使用
せず、軽薄なICパッケージを実装する場合、該パッケ
ージ本体や前記複数の極微細な接合部の各接続面の全て
が平坦でない時、パッケージ本体の重量不足により、各
前記極微細な接合部の浮き、片寄り、更には前記極微細
な接合部全体の浮き、傾斜等によるハンダ接続の不良が
発生する問題がある。尚、上記TABを使用したとして
も、搭載誤差や配線板のパッド精度の問題があり、脱落
したままアウターリードを熱圧着するため、尚更大問題
である。
Further, in the case of mounting a light and thin IC package without using TAB (a thermocompression mounting technique), when all the connection surfaces of the package body and the plurality of ultrafine joints are not flat, the package Due to insufficient weight of the main body, there is a problem that floating and deviation of each of the ultra-fine joints, and further, floating of the whole of the ultra-fine joints and poor solder connection due to inclination and the like occur. Even if the above-mentioned TAB is used, there are problems of mounting error and pad precision of the wiring board, and since the outer leads are thermocompression-bonded while they are detached, this is an even greater problem.

【0012】本発明の目的は、狭ピッチである前記複数
の極微細な接合部を配線板に接続する場合に、前記一体
に連結された表面実装部品、又は、前記導通された大接
合部を有する表面実装部品に限定した手段を用いなくて
も、前記問題はなく、更には前記搭載誤差をハンダ熔融
時自動修正し、正確に高密度表面実装が可能である表面
実装部品を提供することである。
An object of the present invention is to connect the integrally mounted surface mount components or the conductive large joints when connecting the plurality of ultrafine joints having a narrow pitch to a wiring board. It is possible to provide a surface mount component that does not have the above-mentioned problem even if a means limited to the surface mount component has, and further corrects the mounting error automatically at the time of solder melting and enables accurate high-density surface mount. is there.

【0013】[0013]

【課題を解決するための手段】上記目的を達成するため
に、本発明に係る表面実装部品においては、前記一体に
連結されたものを除くその他の前記表面実装部品におい
て、前記複数の極微細な接合部とは別に、前記ICチッ
プの電極と導通連結されておらず、しかも、配線板と接
合されるべき、独立した極少数の大接合部(以下独立し
た極少数の大接合部と略称する)が設けられている。
In order to achieve the above object, in the surface mount component according to the present invention, in the other surface mount components other than the integrally connected ones, Separately from the joint portion, a small number of independent large joint portions which are not electrically connected to the electrodes of the IC chip and are to be joined to the wiring board (hereinafter abbreviated as independent small number of large joint portions). ) Is provided.

【0014】前記独立した極少数の大接合部は、前記I
Cパッケージの種類により、金属板のリードフレームか
らなるリード又はダイパッドサポートリードや金属箔か
らなるリード又は接合用パッド又は、後記するパッドリ
ード等である。又はこれらの組み合わせによる接合部で
形成され構成されている。
The small number of independent large junctions are
Depending on the type of the C package, the lead may be a lead frame made of a metal plate or a die pad support lead, a lead made of a metal foil or a bonding pad, or a pad lead described later. Alternatively, it is formed of a joint portion formed by a combination thereof.

【0015】前記独立した極少数の大接合部は、前記複
数の極微細な各接合部に比較して、配線板との接続面積
が、数倍乃至数十倍に形成されている。尚、前記大接合
部の前記接続面積が大きければ大きい程後記する理由か
ら好ましい。
The number of independent large number of large joints is several times to several tens of times larger than the area of connection with the wiring board, as compared with the plurality of extremely fine joints. The larger the connection area of the large joint portion, the better for the reason described below.

【0016】又現実的に、前記複数の極微細な接合部の
数は、100乃至500程度であり、これに対し、前記
極少数の大接合部の数は4乃至8程度で十分に、後記す
る効果が発揮する。
In reality, the number of the plurality of extremely fine joints is about 100 to 500, whereas the number of the extremely small number of large joints is about 4 to 8, which will be described later. The effect to do is demonstrated.

【0017】尚、ICパッケージのコーナー(角)部に
おけるデッドスペース(通常利用しない場所)を活用し
て前記独立した極少数の大接合部をコーナー部又はその
周辺に設けることが好ましい。
It is preferable that the dead space (a place that is not normally used) in the corner portion of the IC package is utilized to provide the independent small number of large joint portions at the corner portion or its periphery.

【0018】但し、前記独立した極少数の大接合部はコ
ーナー部に設けることだけでなく、必要に応じて、最適
な場所に形成することは可能であるのは言うまでもな
い。
However, it is needless to say that the extremely small number of independent large-sized joints can be formed not only at the corners but also at optimum places as needed.

【0019】前記複数の極微細な接合部の間隔が狭小に
なればなるほど、リードフレームの打ち抜き金型も困難
となり、金属箔をフォトエッチング等にて形成されるこ
とが好ましく、前記独立した極少数の大接合部と前記複
数の極微細な接合部を同一資材、例えば銅箔等にて同時
に形成することが好ましい。
As the distance between the plurality of extremely fine joints becomes narrower, the die for punching the lead frame becomes more difficult, and it is preferable to form the metal foil by photo-etching or the like. It is preferable that the large joint portion and the plurality of ultrafine joint portions are simultaneously formed of the same material, for example, copper foil.

【0020】尚、前記独立した極少数の大接合部の配線
板との各接続面は対向する位置に、配線板上の各パッド
面との相方の形状及び面積が同一に形成されていること
が好ましい。後記する搭載誤差をハンダ熔融時、自動修
正させる理由である。
It is to be noted that each of the connection surfaces of the independent small number of large-sized joint portions with the wiring board is formed at the position facing each other so as to have the same shape and area as the opposite side of each pad surface on the wiring board. Is preferred. This is the reason why the mounting error described below is automatically corrected during solder melting.

【0021】[0021]

【作用】上記のように構成された表面実装部品であるか
ら、図13(a)に示すように、例え実装機における搭
載誤差があったとしても、配線板上のハンダペースト3
2やハンダプリコート33から前記独立した極少数の大
接合部34の接続面が僅かにずれることがあっても大面
積であるため、脱落することがない。従って前記複数の
極微細な接合部6の接続面も同様に脱落することがな
い。即ち、前記独立した極少数の大接合部34と前記複
数の極微細な接合部6は、後記するパッケージ5又はフ
レーム13によって双方同じく支持されているためであ
る。
Since the surface mount component is constructed as described above, as shown in FIG. 13A, even if there is a mounting error in the mounting machine, the solder paste 3 on the wiring board 3
Even if the connection surface of the small number of independent large-sized joint portions 34 from the soldering precoat 33 or the solder precoat 33 slightly shifts, it does not fall off because it has a large area. Therefore, the connection surfaces of the plurality of extremely fine joint portions 6 also do not fall off. That is, this is because both the independent small number of large joint portions 34 and the plurality of ultrafine joint portions 6 are both supported by the package 5 or the frame 13 described later.

【0022】上記のように脱落問題がないので、前記複
数の極微細な接合部6は、配線板8上のパッド9と完全
に離間していたとしても、前記大接合部34が離間する
程、大きな搭載誤差をしていない場合には、前記倒壊問
題もなく、後記するハンダ熔融時自動修正し、位置決め
するためハンダ接続が可能である。
Since there is no drop-out problem as described above, even if the plurality of extremely fine joints 6 are completely separated from the pads 9 on the wiring board 8, the larger joints 34 are separated from each other. If there is no large mounting error, the above collapse problem does not occur, and solder connection is possible for automatic correction and positioning during solder melting described later.

【0023】尚、輸送や不注意による落下等のショック
においても、前記独立した極少数の大接合部34と配線
板との接続強度が大のため、パッケージ本体のショック
における上・下動が無視でき、前記独立した極少数の大
接合部34がはずれることはない。従ってパッケージ5
又はフレーム13によって支持されているため、前記複
数の極微細な接合部6に与えるショックも無視でき問題
はなく、ハンダのはずれ不良の発生を防ぐ。
Even in the event of a shock such as transportation or inadvertent drop, since the connection strength between the independent small number of large joints 34 and the wiring board is large, the upward and downward movement of the package body due to the shock is neglected. Therefore, the very small number of the large number of large joint portions 34 which are independent from each other are not separated. Therefore package 5
Alternatively, since it is supported by the frame 13, a shock given to the plurality of ultra-fine joints 6 can be neglected and there is no problem, and the occurrence of defective solder detachment is prevented.

【0024】図13(b)に示す通りハンダペースト3
2にて、前記独立した極少数の大接合部34を接続する
場合、ハンダペースト32がリフロー処理によって、熔
融時固形化する際容積が半減する過程において、表面実
装部品全体を配線板8上のパッド9に引き寄せる効果を
有するから、例え表面実装部品本体(パッケージ)や前
記接合部の各接続面の平坦性が保たれていない場合で
も、前記独立した極少数の大接合部34の接続面が大き
いため、強引に配線板8上のパッド9へ引き寄せ、隣接
する各極微細な接合部6を連鎖的にハンダ接続が進行し
(図示省略)、最終的には全ての接合部が接続されるこ
とになり、接続不良の発生が防止できる。但し大接合部
がなく、従来のように極微細な接合部だけでは、この力
は発揮できない。又、図13(a)に図示する如く、片
方の大接合部34の接続面がCの矢印に示すように、ハ
ンダペースト32から片浮き(傾斜)している場合にお
いても、前記連鎖接続によってCの矢印に示す浮き間隔
も狭くなり、更に図13(b)のDの矢印に示すように
中心が高く盛り上がった分量と併せて、最終的に全ての
接合部がハンダ接続される。尚、前記大接合部34の接
続面に対向する配線板8のパッド9上のハンダペースト
32は全面に搭載しなくてもよく、面積を僅かに縮小
し、高さを同じに搭載することができる。この場合表面
実装部品全体をその減量分更に下降せしめて、配線板8
のパッド9へ強引に引き寄せる効果を発揮する。
As shown in FIG. 13B, the solder paste 3
2, when the independent small number of large joints 34 are connected, the entire surface mount component is placed on the wiring board 8 in a process in which the volume of the solder paste 32 is halved when it solidifies during melting by reflow processing. Since it has the effect of attracting to the pad 9, even if the flatness of the surface mounting component body (package) or the connecting surfaces of the joints is not maintained, the connecting surfaces of the independent small number of large joints 34 are Since it is large, it is forcibly drawn to the pad 9 on the wiring board 8, and solder connection progresses in a chain manner between adjacent ultrafine joints 6 (not shown), and finally all joints are connected. Therefore, it is possible to prevent the occurrence of connection failure. However, this force cannot be exerted only with an extremely fine joint as in the conventional case without a large joint. Further, as shown in FIG. 13A, even when the connecting surface of one of the large joints 34 is floated (inclined) from the solder paste 32 as shown by the arrow C, the chain connection causes The floating interval shown by the arrow C also becomes narrower, and as shown by the arrow D in FIG. 13 (b), together with the amount that the center rises up, finally all the joints are soldered. The solder paste 32 on the pad 9 of the wiring board 8 facing the connection surface of the large joint 34 does not have to be mounted on the entire surface, and the area may be slightly reduced and the same height may be mounted. it can. In this case, the entire surface mount component is further lowered by the amount of reduction, and the wiring board 8
It exerts the effect of forcibly drawing to the pad 9.

【0025】[0025]

【発明の効果】図13(b)に示す通り、更にハンダペ
ースト32がリフロー処理によって熔融する際、Dの矢
印に示す如く重心が中心Dに集まり、引き寄せる特性が
あるため、該熔融の過程で表面実装部品が所定の実装位
置からずれていた場合にも、Eの矢印に示す如くずれを
修正する方向E、即ち前記大接合部34の接続面を配線
板8上のパッド9の中心へ強引に合致せしめる方向に、
表面実装部品全体を引き寄せる効果を発揮する。従って
各極微細な接合部6の接続面も、たとえ配線板のパッド
と完全に離間していたとしても、夫々対応するハンダ層
へ正確に位置決めされて、接続ずれを生じることなく、
確実にハンダ付けされることになる。尚、コーナー部の
デッドスペースを活用して、前記大接合部の接続面積が
十分大きければ、実験結果4カ所でも十分前記効果があ
った。従って、高密度における前記極微細な接合部を出
来るだけ多く形成することができる。
As shown in FIG. 13 (b), when the solder paste 32 is further melted by the reflow process, the center of gravity is gathered at the center D as shown by the arrow D, and there is a characteristic that it attracts. Even when the surface-mounted component is displaced from the predetermined mounting position, the displacement is corrected in the direction E as indicated by the arrow E, that is, the connection surface of the large joint 34 is forced to the center of the pad 9 on the wiring board 8. In the direction to match
It exerts the effect of attracting the entire surface mount component. Therefore, even if the connection surface of each ultra-fine joint portion 6 is completely separated from the pad of the wiring board, the connection surface is accurately positioned on the corresponding solder layer, without causing connection deviation.
It will be soldered securely. Incidentally, if the connection area of the large joint portion was sufficiently large by utilizing the dead space of the corner portion, the above-mentioned effect was sufficiently obtained even at the four experimental results. Therefore, it is possible to form as many as possible the above-mentioned ultrafine junctions at high density.

【0026】以上の如く、本発明の表面実装部品におい
て、前記独立した極少数の大接合部の接続面が極端に大
面積であることを、特徴としているためにハンダペース
トの熔融時の特性を有効活用して、高密度表面実装にお
いても前記問題を解消し、正確にハンダ付けされること
が可能となる。又、前記絶縁性の連結部材としてのフレ
ーム13を本発明と併用すれば、前記極微細な接合部と
してのアウターリードは、前記フレーム13の支持によ
って平坦度が安定し、尚一層本発明の効果が発揮する。
As described above, the surface mounting component of the present invention is characterized in that the connecting surface of the independent small number of large joints has an extremely large area. By effectively utilizing it, even in high-density surface mounting, the above problems can be solved and soldering can be performed accurately. When the frame 13 as the insulating connecting member is used in combination with the present invention, the outer leads as the ultra-fine joints have stable flatness due to the support of the frame 13, and the effect of the present invention is further enhanced. Exerts.

【0027】従来において、前記ICチップの電極と導
通連結された極少数の大接合部は、前記導通しているた
め、配置に制限がある。又、導通連結リードにハンダが
熔融時流出するから、前記自動修正させるためには、ハ
ンダ絶縁膜(ハンダレジスト)を事前にしておく必要が
ある。この場合コストアップとなる。従って前記独立し
た極少数の大接合部においては、独立しているため、前
記配置制限や前記導通連結リードへのハンダレジストの
問題がない利点がある。
Conventionally, the arrangement of the very small number of large joints electrically connected to the electrodes of the IC chip is limited because they are electrically connected. In addition, since the solder flows out to the conductive connection lead during melting, it is necessary to previously prepare a solder insulating film (solder resist) in order to automatically correct the solder. In this case, the cost will increase. Therefore, since the independent small number of large joints are independent, there is an advantage that there is no problem of the arrangement limitation or solder resist on the conductive connection lead.

【0028】本発明の表面実装部品においては、前記搭
載誤差における脱落問題がないため、前記複数の極微細
なアウターリードが配線板上のハンダ層から離間せず、
僅かにずれている程度であれば、熱圧着によるTAB実
装においても使用可能である。又、配線板上のパッドの
精度が悪く、僅かにバラツキがあったとしても、その最
適な中間点の位置にパッケージを移動させ、ファジー
(FUZZY)にハンダ接続し、確実な表面実装が可能
である。
In the surface mount component of the present invention, since there is no drop-out problem due to the mounting error, the plurality of extremely fine outer leads are not separated from the solder layer on the wiring board,
If it is slightly displaced, it can be used in TAB mounting by thermocompression bonding. In addition, even if the pads on the wiring board are inaccurate and there are slight variations, the package is moved to the optimum midpoint position and soldered in a fuzzy (FUZZY) mode, enabling reliable surface mounting. is there.

【0029】[0029]

【実施例】実施例について図面を参照して説明すると、
図1に示す実施例は、ICチップ1の電極と導電性金属
板のリードフレームからなるリード2をワイヤーボンデ
ィング3にて導通連結され、封止樹脂4でパッケージ5
されて、該リード2からパッケージ5の外方へ突設した
複数の極微細なアウターリード6とは別に、ICチップ
1の電極と導通連結されていない、独立した極少数の大
接合部としてのダイパッドサポートリード7がパッケー
ジ5の外方へ突設したQFP型本発明の表面実装部品で
ある。尚、アウターリード6とダイパッドサポートリー
ド7は、夫々ガルウイング型にフォーミング(折り曲げ
加工)されている。
EXAMPLES Examples will be described with reference to the drawings.
In the embodiment shown in FIG. 1, the electrodes of the IC chip 1 and the leads 2 made of a lead frame made of a conductive metal plate are conductively connected by wire bonding 3, and a package 5 is formed by a sealing resin 4.
In addition to the plurality of extremely fine outer leads 6 projecting from the leads 2 to the outside of the package 5, a small number of independent large joints that are not electrically connected to the electrodes of the IC chip 1 are provided. The die pad support lead 7 is a surface mounted component of the QFP type of the present invention in which the die pad support lead 7 is protruded to the outside of the package 5. The outer lead 6 and the die pad support lead 7 are each formed into a gull wing type (bending process).

【0030】配線板8上のパッド9に搭載されたハンダ
層10を介し、熔融しながら、複数の極微細なアウター
リード6と独立した極少数の大接合部であるダイパッド
サポートリード7を配線板8上のパッド9とハンダ接続
し、表面実装される。
While melting through the solder layer 10 mounted on the pad 9 on the wiring board 8, a very small number of die pad support leads 7 which are independent of the plurality of extremely fine outer leads 6 and are connected to the wiring board. It is soldered to the pad 9 on 8 and is surface-mounted.

【0031】尚、ダイパッドサポートリード7は、従来
パッケージ5のコーナー部にて切断されパッケージ5の
外方へ突設せず、配線板8上のパッド9とは接続しな
い。従って本発明に係るダイパッドサポートリード7
は、パッケージ5のコーナー部にて切断せず、外方へ突
設させガルウィング型にフォーミングして配線板のパッ
ドとハンダ接続し活用する。
The die pad support leads 7 are not cut out at the corners of the conventional package 5 and do not project outside the package 5, and are not connected to the pads 9 on the wiring board 8. Therefore, the die pad support lead 7 according to the present invention
Is not cut at the corners of the package 5, but is projected outward and is formed into a gull wing shape for solder connection with the pad of the wiring board.

【0032】図2に示す実施例では、前記アウターリー
ド6及びダイパッドサポートリード7の夫々がフォーミ
ングされていないQFP型本発明の他の実施例における
表面実装部品である。尚、図2(b)に図示する如く凹
部を有する多層配線板11に、前記パッケージ5の凸部
を落とし込み(挿入して)ハンダ接続し表面実装され
る。尚、凹部を有する多層配線板11でなく、空洞部を
有する配線板を用いてもよいことは、勿論である。
In the embodiment shown in FIG. 2, the outer lead 6 and the die pad support lead 7 are surface-mounted components in another embodiment of the QFP type in which the outer lead 6 and the die pad support lead 7 are not formed. As shown in FIG. 2B, the convex portion of the package 5 is dropped (inserted) and solder-connected to the multilayer wiring board 11 having a concave portion to be surface-mounted. It is needless to say that a wiring board having a cavity may be used instead of the multilayer wiring board 11 having a recess.

【0033】図3に示す実施例では、前記QFPと同様
の内部構造で封止樹脂にてパッケージ5された後、前記
アウターリード6及び前記ダイパッドサポートリード7
の夫々が図3(b)に図示する如く、J型にフォーミン
グされたQFJ型本発明の表面実装部品である。
In the embodiment shown in FIG. 3, the outer lead 6 and the die pad support lead 7 are formed after being packaged 5 with an encapsulating resin with the same internal structure as the QFP.
As shown in FIG. 3 (b), each of them is a QFJ type surface-mounted component of the present invention formed into a J type.

【0034】図4に示す実施例では、電気的絶縁性フィ
ルムであるパッケージ5上にフォトエッチング等により
形成された銅箔(金属箔)リード2とICチップ1の電
極を接合層であるバンプ12を介して導通連結され、封
止樹脂4にて固定され、リード2からパッケージ5の外
方へ突設された複数の極微細な銅箔のアウターリード6
の先端部には、電気的絶縁性の連結部材であるフレーム
13が貼着されている。更に、該フレーム13には、I
Cチップ1とは導通連結されていない、独立した極少数
の大接合部である接合用パッド14が夫々設けられてい
るTCP型本発明の表面実装部品である。
In the embodiment shown in FIG. 4, a copper foil (metal foil) lead 2 formed by photoetching or the like on a package 5 which is an electrically insulating film and an electrode of the IC chip 1 are bumps 12 which are a bonding layer. Outer leads 6 made of a plurality of extremely fine copper foils, which are electrically connected to each other via a cable, are fixed by a sealing resin 4, and project from the leads 2 to the outside of the package 5.
A frame 13, which is an electrically insulating connecting member, is attached to the tip of the frame. Further, in the frame 13, I
It is a TCP type surface mount component of the present invention, which is provided with respective bonding pads 14 which are a very small number of independent large bonding portions which are not electrically connected to the C chip 1.

【0035】尚、パッケージ5のコーナー部にICチッ
プ1と導通連結されていない、独立した極少数の大接合
部である接合用パッド15、16が色々の形状で設ける
ことが可能であることを示す実施例である。
It should be noted that it is possible to provide the bonding pads 15 and 16 that are a very small number of independent large bonding portions, which are not conductively connected to the IC chip 1, at the corners of the package 5 in various shapes. It is an example shown.

【0036】凹部を有する多層配線板11上のパッド9
に搭載されたハンダ層10を介して複数の極微細なアウ
ターリード6と、前記独立した極少数の大接合部である
接合用パッド14、15、16の何れかを接続し表面実
装される。尚、パッケージ5の対向する前記多層配線板
11上のパターン50は、従来同様他の目的に活用す
る。
Pad 9 on multilayer wiring board 11 having a recess
A plurality of extremely fine outer leads 6 are connected to any one of the independent bonding pads 14, 15 and 16 which are a very small number of large bonding portions via the solder layer 10 mounted on the surface mounting. The pattern 50 on the multilayer wiring board 11 facing the package 5 is used for other purposes as in the conventional case.

【0037】図5(a)は、前記極微細なアウターリー
ド6の先端部に貼着されている前記フレーム13の下
面、即ち配線板との対向面に前記独立した極少数の大接
合部である接合用パッド17が形成されている。更にア
ウターリード6が図5(b)の図示の如くフォーミング
されて、配線板に表面実装されているTCP型本発明の
他の表面実装部品における実施例を示す。又、パッケー
ジ5やフレーム13の上面に補強材90を貼着すること
が可能である実施例を示す。尚、該補強材90がパッケ
ージ5やフレーム13と入れ替わった図示は省略する。
FIG. 5 (a) shows the independent small number of large joints on the lower surface of the frame 13 attached to the tip of the outer fine outer lead 6, that is, the surface facing the wiring board. A certain bonding pad 17 is formed. Furthermore, the outer lead 6 is formed as shown in FIG. 5 (b) and is mounted on the surface of the wiring board in the TCP type. Further, an embodiment is shown in which the reinforcing material 90 can be attached to the upper surfaces of the package 5 and the frame 13. Incidentally, the illustration in which the reinforcing material 90 is replaced with the package 5 and the frame 13 is omitted.

【0038】前記フレーム13は、別途形成し、貼着す
ることは可能であるが、図8に示す如く従来のTCPの
製造工程に一部の変更を加えてアウターリード6や独立
したパッド14と合わせて同時に形成することが好まし
い。即ち、フレーム13に相当する部分を残し、図中の
AとBの破線に沿って切断して前記同時に形成すること
ができる。
The frame 13 can be separately formed and attached, but as shown in FIG. 8, the outer lead 6 and the independent pad 14 are formed by partially modifying the conventional TCP manufacturing process. It is preferable that they are simultaneously formed. That is, the portion corresponding to the frame 13 can be left and cut along the broken lines A and B in the figure to form the above simultaneously.

【0039】図6における実施例では、パッケージ5か
ら外方へ向けて、突設した複数の極微細なアウターリー
ド60は極短小(50乃至100μ程度)に形成し、突
設している。更に、パッケージ5のコーナー部には、前
記独立した大接合部である接合用パッド18乃至20が
設けられたTCP型本発明の表面実装部品の更に他の実
施例である。尚、パッド20は、一か所内で複数に分割
することが可能であることを示す実施例である。
In the embodiment shown in FIG. 6, the plurality of extremely fine outer leads 60 projecting outward from the package 5 are formed to be extremely short (about 50 to 100 μ) and project. Furthermore, it is still another embodiment of the TCP type surface mount component of the present invention in which the bonding pads 18 to 20 which are the independent large joints are provided at the corners of the package 5. Note that the pad 20 is an embodiment showing that it can be divided into a plurality of pieces in one place.

【0040】又、パッドリード21は、パッケージ5の
コーナーに配置された前記独立した極少数の大接合部で
ある接合用パッドが一部パッケージ5の外方へ、極短小
はみだし、突設しているTCP型本発明の更に他の表面
実装部品の実施例を示す。
In the pad lead 21, the bonding pads, which are the small number of independent large-sized bonding portions arranged at the corners of the package 5, partially protrude outside the package 5 and are projected in a very short and small size. FIG. 9 shows an example of yet another surface mount component of the present invention of TCP type.

【0041】パッケージ5の外方へ突設している極微細
短小のアウターリード60や接合用パッドリード21の
はみ出し部分も極短小であるのは、従来のアウターリー
ドとして切断する際に該アウターリードが長ければ長い
ほど夫々浮き、オープン(リード間隔の不揃い)等のバ
ラツキが大きく発生する。従って前記極短小にすればす
るほど、アウターリード60の片方が、パッケージ5に
支えられているため前記バラツキが発生しにくい。
The protruding portion of the outer lead 60 and the bonding pad lead 21 which are extremely small and small protruding outwardly of the package 5 are also very short and short. This is because the outer lead is cut when it is cut as a conventional outer lead. The longer the length, the higher the floating and the greater the variation such as open (uneven lead intervals). Therefore, as the length is made extremely short, one side of the outer lead 60 is supported by the package 5, and thus the variation is less likely to occur.

【0042】尚、アウターリード60やパッドリード2
1のはみ出し部分が極短小(50乃至100μ程度)で
あった場合でも、ハンダ接合確認の外観カメラ検査がで
き前記接合強度の心配もなく、更には、表面実装部品全
体の占有面積が小である利点がある。従って、前記フレ
ーム13が設けてなくても信頼のおける安定した表面実
装ができる。又、極微細リード2には、ハンダレジスト
22を設けておくことが好ましい。
The outer lead 60 and the pad lead 2
Even if the protruding portion of 1 is extremely small (about 50 to 100 μ), the appearance camera inspection for solder joint confirmation can be performed, there is no fear of the joint strength, and the area occupied by the entire surface mount component is small. There are advantages. Therefore, reliable and stable surface mounting can be performed without the frame 13. Further, it is preferable to provide a solder resist 22 on the ultrafine lead 2.

【0043】図7に示す実施例では、複数のICチップ
1や複数の他の電子部品70が搭載されており、複数の
極微細なアウターリード6の先端部に貼着されておる絶
縁性連結部材であるフレーム13には、前記独立した極
少数の大接合部であるパッド17が配線板との対向面に
設けられているモジュール型本発明の表面実装部品を示
す。尚、複数のICチップ1や電子部品70の全体を一
括して樹脂封止してパッケージしたハイブリッドICも
同様に適用できることは、勿論である(図示省略)。
In the embodiment shown in FIG. 7, a plurality of IC chips 1 and a plurality of other electronic components 70 are mounted, and an insulating connection is attached to the tip ends of a plurality of ultrafine outer leads 6. A modular type surface mount component of the present invention is shown in which a frame 17, which is a member, is provided with a pad 17 that is a very small number of independent large joints on a surface facing a wiring board. Incidentally, it goes without saying that a hybrid IC in which the plurality of IC chips 1 and the entire electronic component 70 are collectively resin-sealed and packaged can be similarly applied (not shown).

【0044】尚、配線板8上のハンダ層10と前記リー
ド6及び前記パッド17とが夫々接続され表面実装され
る。
The solder layer 10 on the wiring board 8, the leads 6 and the pads 17 are connected to each other and surface-mounted.

【0045】図8は、アウターウインドウ80が打ち抜
かれている従来のTCPにおいて、図中AとBの破線に
沿って切断することによって、前記複数の極微細なアウ
ターリード6や前記独立した極少数の大接合部であるパ
ッド14更には前記フレーム13等が同時に形成できる
製造方法を示す実施例である。当然この同様な製造方法
にて、図4乃至図7に示すTCP型本発明の様々な形態
の表面実装部品が前記同時に形成し製造できることは勿
論であり、様々な独立したパッド及び形態の製造方法に
おける図面及び説明は省略する。
FIG. 8 shows a conventional TCP in which an outer window 80 is punched out, by cutting along the broken lines A and B in the figure to form the plurality of extremely fine outer leads 6 and the independent minute numbers. This is an embodiment showing a manufacturing method capable of simultaneously forming the pad 14 which is a large joint portion, and further the frame 13 and the like. Of course, in this same manufacturing method, it is of course possible to simultaneously form and manufacture the TCP type surface mount components of various embodiments of the present invention shown in FIGS. 4 to 7, and various independent pads and manufacturing methods of various shapes. The drawings and description in FIG.

【0046】図9では、ICチップが収納されたパッケ
ージ23であり、該ICチップの電極と導通連結(図示
省略)され、且つ、該パッケージ23の側面に設けられ
た複数のノンリード24が、該パッケージ23の裏面2
5すなわち、配線板と対向する面に設けられ、導通連結
されている複数の極微細なパッド26とは別に、ICチ
ップの電極と導通連結されていない、独立した極少数の
大接合部としてのパッド27が形成されているLCC
(QFN)型本発明の表面実装部品における実施例であ
る。
In FIG. 9, a package 23 accommodating an IC chip is provided, and a plurality of non-leads 24, which are electrically connected (not shown) to the electrodes of the IC chip and are provided on the side surface of the package 23, Back side 2 of package 23
5, that is, apart from a plurality of extremely fine pads 26 that are provided on the surface facing the wiring board and are conductively connected, as a small number of independent large joints that are not conductively connected to the electrodes of the IC chip. LCC with pad 27 formed
(QFN) type It is an example of the surface mount component of the present invention.

【0047】図10では、ICチップが収納されたパッ
ケージ28であって、該ICチップの電極と導通連結
(図示省略)され、且つ、該パッケージ28の裏面2
9、すなわち配線板と対向する面に突設している複数の
極微細な接合用端子30とは別にICチップの電極と導
通連結されていない独立した極少数の大接合部であるパ
ッド31が形成されているPGA型本発明の表面実装部
品における実施例である。
In FIG. 10, there is shown a package 28 in which an IC chip is housed, which is electrically connected (not shown) to the electrodes of the IC chip, and the back surface 2 of the package 28.
9, that is, the pad 31 which is a very small number of independent large-joint portions which are not conductively connected to the electrodes of the IC chip, apart from the plurality of ultra-fine joining terminals 30 protruding on the surface facing the wiring board. It is an example of the surface mount component of the present invention formed PGA type.

【0048】以上の実施例の説明の中で、図1乃至図8
において極微細短小アウターリード60を除く前記複数
の極微細なアウターリード6又ICチップ1、リード
2、封止樹脂4、パッケージ5、フレーム13は符号上
統一略称した。
In the description of the above embodiment, FIGS.
In the above, the plurality of ultrafine outer leads 6 except for the ultrafine short outer leads 60, the IC chip 1, the leads 2, the sealing resin 4, the package 5, and the frame 13 are abbreviated as the same symbols.

【0049】尚、TCP型本発明のパッケージ5やフレ
ーム13の基材は従来の軟質のフィルムでなくてもよ
く、適切な材質であれば何でもよく、例えば硬質のガラ
ス基材を使用することは、平坦性を維持するためにも好
ましい。
The base material of the TCP type package 5 or the frame 13 of the present invention does not have to be a conventional soft film and may be made of any suitable material. For example, a hard glass base material may not be used. It is also preferable for maintaining flatness.

【0050】又、軟質のフィルム基材で構成されたTC
P型本発明の表面実装部品のパッケージ5やフレーム1
3の上面又は下面に夫々の平坦性を維持するために、補
強材90として硬質のガラス基材等を夫々に貼着するこ
とも可能である。尚、前記補強材90が配線板との対向
面(下面)に配設された場合には、補強材90に前記独
立した大接合部を設けることも可能であることは勿論で
ある。
TC composed of a soft film base material
P type Package 5 and frame 1 of the surface mount component of the present invention
In order to maintain the flatness of each of the upper surface and the lower surface of 3, it is possible to attach a hard glass base material or the like as the reinforcing material 90 to each. Incidentally, when the reinforcing material 90 is disposed on the surface (lower surface) facing the wiring board, it is of course possible to provide the reinforcing material 90 with the independent large joint portion.

【0051】従来において、パッケージから外方へ突設
した微細アウターリードの先端を通常、切断して配線板
上のパッドとハンダ層を介してハンダ接続(接合)す
る。上記切断された各アウターリード(微細になれば銅
箔リード)は、軽箔で硬度も微弱で夫々個別に上下の浮
き、又は、オープン(隣接間隔の不統一)のバラツキ等
が発生する。ましてやリードのフォーミングにおいては
尚更である。狭ピッチの場合、ハンダ層の高さも微小で
あるため、僅かな上記バラツキにもハンダ接続不良が発
生する。従って出来るだけ前記バラツキ防止や軽箔で硬
度も微弱なため各アウターリードの先端をフレーム13
にて押さえておくために採用した前記理由である。
Conventionally, the tips of the fine outer leads protruding outward from the package are usually cut and soldered (bonded) to the pads on the wiring board via the solder layer. Each of the cut outer leads (copper foil leads if finer) is a light foil and has a weak hardness, so that the upper and lower floats individually, or variations in openness (inconsistency between adjacent intervals) occur. Even more so when it comes to forming leads. In the case of a narrow pitch, the height of the solder layer is also very small, so that solder connection failure will occur even with the slight variations. Therefore, since the above-mentioned variations are prevented and the hardness of the light foil is weak, the tip of each outer lead should be attached to the frame 13
This is the reason for adopting it in order to hold it down.

【0052】前記各バラツキを押さえても、100%完
璧でない。即ち、前記フレーム13の僅かな傾斜と、パ
ッケージ全体も軽箔で重量不足のために問題があり、配
線板上のパッドから僅かに片浮きしたりする。又、実装
機の搭載誤差や配線板のパッド精度の問題もある。更に
は、ハンダ層からの脱落やハンダペーストの倒壊問題も
あり、高密度実装における配線板とのハンダ接続不良が
発生する。熱圧着によるTAB実装においては、尚更問
題が大きい。
Even if each variation is suppressed, it is not 100% perfect. That is, there is a problem that the frame 13 is slightly inclined and the entire package is made of a light foil, and the weight is insufficient, so that it slightly floats from the pad on the wiring board. In addition, there are problems of mounting error of the mounting machine and pad precision of the wiring board. Further, there is a problem that the solder paste may fall off from the solder layer or the solder paste may collapse, resulting in poor solder connection with a wiring board in high-density mounting. In TAB mounting by thermocompression bonding, the problem is even greater.

【0053】本発明の表面実装部品にあっては、上記問
題がない。以上実施例を列記したが、いずれの場合にお
いても、半導体集積回路を内蔵した1個以上のチップの
電極と導通連結されていない独立した極少数の大接合部
であるリードやパッド又はパッドリード等は、その他の
複数の極微細な接合部に比較して配線板との接続面積が
比較にならない程の大きな面積を有する極端な特徴とな
っている。尚、実施例における各部構成例を本発明の表
面実装部品のいずれかのパッケージに可能な限り採用で
きることは、勿論である。
The surface mount component of the present invention does not have the above problem. Although the examples are listed above, in any case, a lead, a pad, a pad lead, or the like, which is a very small number of independent large junctions which are not conductively connected to the electrodes of one or more chips containing a semiconductor integrated circuit, etc. Is an extreme feature that it has such a large area that the connection area with the wiring board is incomparable compared to the other plurality of extremely fine joints. It goes without saying that the configuration of each part in the embodiment can be adopted as much as possible in any package of the surface mount component of the present invention.

【0054】上記実施例の説明は、本発明を説明するた
めのものであって、他のICパッケージ等の実施例や前
記極少数の大接合部の配置は、コーナー部だけでなく中
央部や他の配置にした、又は、星形等様々な形状の実施
例又は、前記独立した極少数の大接合部であるリードに
おける実施例は、省略している。特許請求の範囲に記載
の発明を限定し、或いは範囲を減縮するように解すべで
ない。又、本発明の各部構成は、上記実施例に限らず、
特許請求の範囲に記載の技術的範囲内で種々の変化が可
能であることは勿論である。
The above description of the embodiments is for explaining the present invention, and other embodiments such as IC packages and the arrangement of the very small number of large joints are not limited to the corners but also to the central portion. Examples of other arrangements or various shapes such as a star shape, or examples of the lead having a large number of independent small junctions are omitted. It should not be construed as limiting the invention or limiting the scope of the invention. Further, the configuration of each part of the present invention is not limited to the above embodiment,
It goes without saying that various changes can be made within the technical scope described in the claims.

【0055】例えば本発明は、SOP、SOJやICチ
ップ(LSI、VLSI、ULSIチップ等含む)以外
の電子部品と混在してパッケージされたハイブリッドI
Cであっても適用可能である。又、ICチップ本体に本
発明の構成例を適用することも可能である。即ち該IC
チップ本体をパッケージの基材である表面実装基板や前
記配線板に表面実装するCOB(Chip On Bo
ard)型本発明の表面実装部品にも適用することも可
能である。
For example, the present invention is a hybrid I packaged together with electronic components other than SOP, SOJ and IC chips (including LSI, VLSI, ULSI chips, etc.).
Even C is applicable. It is also possible to apply the configuration example of the present invention to the IC chip body. That is, the IC
COB (Chip On Bo) for surface-mounting the chip body on the surface-mounting substrate, which is the base material of the package, or the wiring board.
It is also applicable to the surface mount component of the present invention.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)本発明に係るQFP型表面実装部品の平
面図である。 (b)該表面実装部品の実装例を示す破断正面図であ
る。 (c)該表面実装部品の一部破断断面における斜視図で
ある。
FIG. 1A is a plan view of a QFP type surface mount component according to the present invention. (B) It is a fracture | rupture front view which shows the mounting example of this surface mount component. (C) It is a perspective view in a partially broken cross section of the surface mount component.

【図2】(a)本発明に係るQFP型表面実装部品の他
の実施例における平面図である。 (b)該表面実装部品の実装例を示す破断正面図であ
る。
FIG. 2A is a plan view of another embodiment of the QFP type surface mount device according to the present invention. (B) It is a fracture | rupture front view which shows the mounting example of this surface mount component.

【図3】(a)本発明に係るPLCC(QFJ)型表面
実装部品の平面図である。 (b)該表面実装部品の破断正面図である。
FIG. 3A is a plan view of a PLCC (QFJ) type surface mount component according to the present invention. (B) It is a fracture | rupture front view of this surface mount component.

【図4】(a)本発明に係るTCP型表面実装部品であ
る。 (b)該表面実装部品の実装例を示す一部破断正面図で
ある。
FIG. 4A is a TCP type surface mount component according to the present invention. (B) It is a partially broken front view showing a mounting example of the surface mount component.

【図5】(a)絶縁性フレーム13の本発明に係る要部
を示す斜視図である。 (b)該絶縁性フレーム13を用いた又、更に補強材9
0を貼着した本発明に係る他のTCP型表面実装部品の
実装例を示す一部破断正面図である。
5 (a) is a perspective view showing a main part of the insulating frame 13 according to the present invention. FIG. (B) Using the insulating frame 13, and further a reinforcing material 9
It is a partially broken front view showing a mounting example of another TCP type surface mount component according to the present invention to which 0 is attached.

【図6】(a)本発明に係る更に他のTCP型表面実装
部品の平面図である。 (b)該表面実装部品の実装例を示す一部破断正面図で
ある。
FIG. 6A is a plan view of still another TCP type surface mount component according to the present invention. (B) It is a partially broken front view showing a mounting example of the surface mount component.

【図7】(a)本発明に係るモジュール型表面実装部品
の要部を示す一部平面図である。 (b)該表面実装部品の実装例を示す破断正面図であ
る。
FIG. 7 (a) is a partial plan view showing a main part of the module-type surface mount component according to the present invention. (B) It is a fracture | rupture front view which shows the mounting example of this surface mount component.

【図8】本発明に係るTCP型表面実装部品の製造方法
を示す斜視図である。
FIG. 8 is a perspective view showing a method of manufacturing a TCP type surface mount component according to the present invention.

【図9】本発明に係るLCC(QFN)型表面実装部品
の平面図及び破断正面図である。
FIG. 9 is a plan view and a cutaway front view of an LCC (QFN) type surface mount component according to the present invention.

【図10】本発明に係るPGA型表面実装部品の平面図
及び破断正面図である。
FIG. 10 is a plan view and a cutaway front view of a PGA type surface mount component according to the present invention.

【図11】従来の表面実装法における、問題点を説明す
るための要部を示す一部断面図である。
FIG. 11 is a partial cross-sectional view showing a main part for explaining a problem in the conventional surface mounting method.

【図12】従来の表面実装法における、更に他の問題点
を説明するための要部を示す一部断面図である。
FIG. 12 is a partial cross-sectional view showing a main part for explaining still another problem in the conventional surface mounting method.

【図13】本発明に係る表面実装部品の表面実装法にお
ける、作用及び効果を説明するための要部を示す一部断
面図である。
FIG. 13 is a partial cross-sectional view showing the main parts for explaining the operation and effect in the surface mounting method of the surface mounting component according to the present invention.

【符号の説明】[Explanation of symbols]

1 ICチップ 5、23、25、28、29 パッケージ 6 極微細なアウターリード 7 独立した大接合部としてのダイパッドサポートリー
ド(ICチップの電極と導通していない) 13 絶縁性フレーム 14乃至20、27、31 独立した大接合部としての
接合用パッド 21 独立した大接合部としての接合用パッドリード 26 極微細な接合用パッド 30 極微細な接合用端子 60 極微細短小なアウターリード 90 補強材
1 IC chip 5, 23, 25, 28, 29 Package 6 Ultrafine outer lead 7 Die pad support lead (not electrically connected to the electrode of the IC chip) 13 as an independent large joint 13 Insulating frame 14 to 20, 27 , 31 Bonding pad as an independent large bonding portion 21 Bonding pad lead as an independent large bonding portion 26 Ultrafine bonding pad 30 Ultrafine bonding terminal 60 Ultrafine short and small outer lead 90 Reinforcing material

Claims (12)

【特許請求の範囲】[Claims] 【請求項1】 半導体集積回路を内蔵した、1個以上の
ICチップの電極と導通連結され、外方へ向けて突設し
た、配線板へ接続されるべき複数の極微細な接合部の配
列を設けた表面実装部品の種類の内で、前記複数の極微
細な接合部としてのアウターリードは、夫々の先端部が
絶縁性の連結部材によって互いに連結され、該連結部材
は直に、又は他の連結部材を介して前記チップ本体、又
は該本体を封止したパッケージに対して一体に連結され
たものを除くその他の前記表面実装部品であって、前記
複数の極微細な接合部とは別に、前記ICチップの電極
と導通連結されておらず、しかも配線板と接合されるべ
き、独立した極少数の大接合部を設けたことを特徴とす
る表面実装部品。
1. An array of a plurality of extremely fine joints to be connected to a wiring board, which are conductively connected to electrodes of one or more IC chips containing a semiconductor integrated circuit and project outwardly. Among the types of surface mount components provided with, the outer leads as the plurality of ultra-fine joints are connected at their tips to each other by an insulating connecting member, and the connecting member is directly or The surface mount component other than those integrally connected to the chip body or the package in which the body is sealed via the connecting member of, separately from the plurality of ultrafine joints. A surface mount component, characterized in that a very small number of independent large joints which are not electrically connected to the electrodes of the IC chip and are to be joined to a wiring board are provided.
【請求項2】 前記独立した極少数の大接合部は、金属
板のリードフレームからなる、リード又はダイパッドサ
ポートである請求項1に記載の表面実装部品。
2. The surface mount component according to claim 1, wherein the very small number of independent large joints are leads or a die pad support made of a lead frame made of a metal plate.
【請求項3】 前記独立した極少数の大接合部は、金属
箔からなるリード又は接合用パッドである請求項1に記
載の表面実装部品。
3. The surface mount component according to claim 1, wherein the very small number of independent large joints are leads or joint pads made of metal foil.
【請求項4】 前記独立した極少数の大接合部は、請求
項2又は3に記載の大接合部の何れかとの組み合わせに
より形成し、構成された請求項1に記載の表面実装部
品。
4. The surface mount component according to claim 1, wherein the extremely small number of independent large joints are formed and combined with any one of the large joints according to claim 2 or 3.
【請求項5】 前記ICチップ本体又は該本体を封止し
たパッケージの配線板との対向面に、前記独立した極少
数の大接合部である接合用パッドが設けられている請求
項1乃至請求項4に記載の表面実装部品。
5. The bonding pad, which is a very small number of independent large bonding portions, is provided on the surface of the IC chip body or the package sealing the body facing the wiring board. Item 5. The surface mount component according to item 4.
【請求項6】 前記複数の極微細な接合部としてのアウ
ターリードは、夫々の先端部が絶縁性連結部材であるフ
レーム13に連結された表面実装部品であって、前記フ
レーム13に前記独立した極少数の大接合部である接合
用パッドを設けたことを特徴とする請求項1乃至請求項
5に記載の表面実装部品。
6. The outer leads as the plurality of ultra-fine joints are surface-mounted components whose tip ends are connected to a frame 13 which is an insulating connecting member, and are independent of the frame 13. The surface mount component according to claim 1, further comprising a bonding pad that is a very small number of large bonding portions.
【請求項7】 前記パッケージや前記フレーム13に絶
縁性補強材90を設け、尚且つ、該補強材90に、前記
独立した極少数の大接合部を設けたことを特徴とする請
求項1乃至請求項6の表面実装部品。
7. The package and the frame 13 are provided with an insulating reinforcing material 90, and the reinforcing material 90 is provided with the independent small number of large joint portions. The surface mount component according to claim 6.
【請求項8】 前記パッケージの側面に設けられたノン
リード24を介して、前記ICチップの電極と導通連結
された前記複数の極微細な接合部としてのパッド26と
は別に、前記独立した極少数の大接合部としての接合用
パッド27が設けられている請求項1に記載の表面実装
部品。
8. The independent very small number of pads independent of the pads 26 as the plurality of ultrafine bonding parts that are conductively connected to the electrodes of the IC chip via the non-leads 24 provided on the side surface of the package. The surface-mounted component according to claim 1, wherein a bonding pad 27 is provided as a large bonding portion of.
【請求項9】 前記パッケージの配線板との対向面に設
けられている前記複数の極微細な接合部としての接合用
端子30とは別に、前記独立した極少数の大接合部とし
ての接合用パッド31が設けられている請求項1に記載
の表面実装部品。
9. In addition to the bonding terminals 30 as the plurality of ultrafine bonding portions provided on the surface of the package facing the wiring board, the bonding terminals as the independent small number of large bonding portions. The surface mount component according to claim 1, wherein a pad 31 is provided.
【請求項10】 前記独立した極少数の大接合部として
の接合用パッドが1箇所の場所内で複数に分割された大
接合部に形成されている請求項1乃至請求項9に記載の
表面実装部品。
10. The surface according to claim 1, wherein the bonding pads as the independent small number of large-sized joints are formed in a plurality of large-joint portions in one place. Mounting parts.
【請求項11】 前記独立した極少数の大接合部として
のパッドが、前記パッケージ又は、前記フレーム13か
ら外方へ向けてはみ出し、突設したパッドリード21が
設けられていることを特徴とする請求項1乃至請求項1
0に記載の表面実装部品。
11. The small number of independent pads as large joints protrude from the package or the frame 13 toward the outside, and are provided with protruding pad leads 21. Claims 1 to 1
The surface mount component described in 0.
【請求項12】 前記絶縁性連結部材としてのフレーム
13は別途に形成し、貼着することなく、該フレーム1
3に相当する部分を残し、従来のTCP製造工程に一部
の変更を加えて、図8に示す、図中破線AとBに沿って
切断し同時に形成して構成された請求項6、10又は1
1に記載の表面実装部品及びその製造方法。
12. The frame 13 as the insulating connecting member is formed separately, and the frame 1 is not attached.
The method according to claim 6 or 10, wherein a part corresponding to No. 3 is left, a part of the conventional TCP manufacturing process is changed, and the TCP is cut along the broken lines A and B shown in FIG. Or 1
1. The surface mount component according to 1 and a method for manufacturing the same.
JP6165733A 1994-06-13 1994-06-13 Surface mount parts including semiconductor integrated circuit and fabrication thereof Pending JPH07335814A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6165733A JPH07335814A (en) 1994-06-13 1994-06-13 Surface mount parts including semiconductor integrated circuit and fabrication thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6165733A JPH07335814A (en) 1994-06-13 1994-06-13 Surface mount parts including semiconductor integrated circuit and fabrication thereof

Publications (1)

Publication Number Publication Date
JPH07335814A true JPH07335814A (en) 1995-12-22

Family

ID=15818049

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6165733A Pending JPH07335814A (en) 1994-06-13 1994-06-13 Surface mount parts including semiconductor integrated circuit and fabrication thereof

Country Status (1)

Country Link
JP (1) JPH07335814A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2364435A (en) * 1999-12-24 2002-01-23 Nec Corp Surface-mount package

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2364435A (en) * 1999-12-24 2002-01-23 Nec Corp Surface-mount package
GB2364435B (en) * 1999-12-24 2002-11-20 Nec Corp Surface-mount package with side terminal
US6756666B2 (en) 1999-12-24 2004-06-29 Nec Corporation Surface mount package including terminal on its side

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