JPH08191111A - Electronic part package - Google Patents
Electronic part packageInfo
- Publication number
- JPH08191111A JPH08191111A JP310595A JP310595A JPH08191111A JP H08191111 A JPH08191111 A JP H08191111A JP 310595 A JP310595 A JP 310595A JP 310595 A JP310595 A JP 310595A JP H08191111 A JPH08191111 A JP H08191111A
- Authority
- JP
- Japan
- Prior art keywords
- leads
- package
- lead
- bumps
- electronic component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】この発明は、半導体素子あるいは
電子部品等を搭載する電子部品パッケージ構造に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component package structure for mounting a semiconductor element or electronic component.
【0002】[0002]
【従来の技術】従来の電子部品パッケージは、これを搭
載する回路基板上の基板電極との接続をリードを介して
行なう形式のものとバンプを介して行なう形式のものに
大きく分類される。このうちリード形式のパッケージ
は、さらにリード挿入方式と表面実装方式に分類され
る。表面実装方式は、リードの形状によりさらにガルウ
ィング(G)、Jベンド(J)、Iリード(I)等に分
類される。2. Description of the Related Art Conventional electronic component packages are broadly classified into those of the type in which they are connected to the substrate electrodes on the circuit board on which they are mounted via leads and those of the type in which they are connected via bumps. Among them, the lead type package is further classified into a lead insertion type and a surface mounting type. The surface mounting method is further classified into a gull wing (G), a J bend (J), an I lead (I), etc. depending on the shape of the lead.
【0003】図4、図5に上記分類による代表的な形状
のものの外観図又は断面側面図を示す。図4の(a)は
バンプ形パッケージ(BGA等)の裏面側から見た外観
図であり、多数の半球形部がバンプである。(b)はリ
ード形パッケージの外観形状であり、リードの形式によ
りDIP(挿入リード)、SOP(G)、QFP
(G)、SOJ(J)PLC(J)Cの略記号が与えら
れている。又、図5の(a)はリード挿入方式、(b)
は表面実装方式のものである。さらに(b′)はリード
形状の種類を示している。FIGS. 4 and 5 show an external view or a sectional side view of a typical shape according to the above classification. FIG. 4A is an external view of the bump type package (BGA or the like) viewed from the back side, and a large number of hemispherical portions are bumps. (B) is the external shape of the lead-type package. Depending on the lead type, DIP (insertion lead), SOP (G), QFP
Abbreviated symbols of (G) and SOJ (J) PLC (J) C are given. Also, FIG. 5A is a lead insertion method, and FIG.
Is a surface mount type. Further, (b ') shows the type of lead shape.
【0004】上述した電子部品パッケージのうちバンプ
形接続形式のものの一例が特開平2−37753号公報
に開示されている。この公報によるパッケージは、この
パッケージ内に一体化される能動素子(IC)、受動素
子(抵抗、コンデンサ等)を固定する基板の裏面にその
入出力端子としてのバンプ端子をグリッドアレイ状に配
置している。An example of the above-mentioned electronic component package of the bump type connection type is disclosed in JP-A-2-37753. The package according to this publication has bump terminals as input / output terminals arranged in a grid array on the back surface of a substrate for fixing active elements (IC) and passive elements (resistors, capacitors, etc.) integrated in the package. ing.
【0005】基板の四隅の所定位置に設けた穴を通って
基板の裏側へ突出するモールドピンを上記素子部品の上
に一体に被せられるモールド樹脂部と一体に形成し、モ
ールドピンをこのパッケージの電子部品を実装しようと
するプリント基板への実装位置及び方向を示すための案
内部材として設けている。従って、モールドピンをプリ
ント基板の穴に挿入すれば、バンプ端子が相手方のプリ
ント基板上の電極に接触して接続が行なわれる。Mold pins projecting to the back side of the substrate through holes provided at predetermined positions at the four corners of the substrate are integrally formed with a mold resin portion which is integrally covered on the above-mentioned element component, and the mold pins are formed in this package. It is provided as a guide member for indicating the mounting position and direction on the printed circuit board on which the electronic component is to be mounted. Therefore, when the mold pin is inserted into the hole of the printed circuit board, the bump terminal comes into contact with the electrode on the other printed circuit board for connection.
【0006】一方、リード形パッケージの一例として特
開平3−231448号公報に記載のものが知られてい
る。この公報に記載のパッケージは、樹脂で一体成形さ
れたパッケージ裏面から垂直に多数の接合ピンを突出さ
せ、パッケージ四隅のみは側方へL字状に突出するリー
ドとし、このパッケージを搭載する回路基板には上記接
合ピンに対応する配置の半田バンプをグリッドアレイ状
に配置し、かつ突出リードに対応してパッドを回路基板
に設けている。On the other hand, as an example of the lead type package, the one described in Japanese Patent Application Laid-Open No. 3-231448 is known. In the package described in this publication, a large number of joining pins are vertically projected from the back surface of the package integrally molded of resin, and only the four corners of the package are leads protruding laterally in an L shape, and a circuit board on which this package is mounted is mounted. The solder bumps are arranged in a grid array corresponding to the bonding pins, and pads are provided on the circuit board corresponding to the protruding leads.
【0007】この例のパッケージは、上記突出リードを
回路基板のパッドに接合すれば各接合ピンの半田バンプ
に対する位置合せも同時に行なわれて電気的接合ができ
るというものである。In the package of this example, if the projecting leads are joined to the pads of the circuit board, the respective joining pins are aligned with the solder bumps at the same time, and electrical joining is possible.
【0008】[0008]
【発明が解決しようとする課題】ところで、上述したリ
ード型パッケージでは一般にリードが側面に形成される
場合が多く、多ピン化への対応が困難でありパッケージ
底面が有効に利用されていない。上記第二の公報では、
この点を改善するためリードをパッケージ下面に突出さ
せているが、しかしリードを多数設けて多ピン化しよう
とするとそれぞれのピンと回路基板上のバンプとの接合
の位置を正確に合致させるのが困難である。By the way, in the above-mentioned lead type package, the leads are generally formed on the side surface in many cases, it is difficult to cope with the increase in the number of pins, and the bottom surface of the package is not effectively utilized. In the above-mentioned second publication,
In order to improve this point, the leads are projected to the lower surface of the package. However, when trying to increase the number of pins by providing a large number of leads, it is difficult to accurately match the position of each pin and the bump on the circuit board. Is.
【0009】一般的な例として、上記公報の例のように
バンプではなくリードを底面にアレイ状に並べ、かつ挿
入式ではなくリードを基板に突き当て表面実装式とした
タイプのパッケージで、位置決めリードを設け位置ズレ
を防ぐという事例もあるが、この場合、リードをアレイ
状に形成する場合とバンプをアレイ状に形成する場合で
は、一般的にバンプの方が形成が容易で、コスト的にも
安く、狭ピッチ化が図りやすい。[0009] As a general example, as in the example of the above publication, the leads are arranged in an array on the bottom surface instead of the bumps, and the leads are abutted against the substrate instead of the insertion type and the surface mounting type package is used. There are cases in which leads are provided to prevent misalignment, but in this case bumps are generally easier to form and cost effective when forming leads in array form and bumps in array form. It is also cheap and it is easy to narrow the pitch.
【0010】一方、バンプ型パッケージでは多ピン化へ
の対応は容易であるが、一般には底面にバンプのみ形成
されているため、バンプと基板電極を接続する際の位置
ずれを防ぐことが難しい。位置ずれが発生するとパッケ
ージの構造上修復および外観目視検査が難しく、ずれの
大小による良否の判定が困難である。On the other hand, the bump type package can easily cope with the increase in the number of pins, but since only the bump is generally formed on the bottom surface, it is difficult to prevent the displacement when connecting the bump and the substrate electrode. When the position shift occurs, it is difficult to repair the package structure and visually inspect the appearance, and it is difficult to judge the quality based on the size of the shift.
【0011】例えば、図6に示すように、パッケージ搭
載時にバンプ2の電極部を融着させると、(a)が融着
後の正常なバンプ融着形状であるが、後に外的に加えら
れる熱的、機械的ストレスによって(b)、(c)に示
したような変形したバンプ2形状となった場合は、特定
箇所に応力が集中し易く、周辺電極部aまたはバンプ2
自体にクラック、断線等の不具合を生じる場合がある。
これはバンプ2のみで回路基板Kへ固定しているため、
バンプ自体が溶融すると上記のような変形を生じるから
である。For example, as shown in FIG. 6, when the electrode portion of the bump 2 is fused at the time of mounting the package, (a) shows a normal bump fusion shape after fusion, but it is externally added later. When the bump 2 has a deformed shape as shown in (b) and (c) due to thermal or mechanical stress, the stress is likely to concentrate at a specific location, and the peripheral electrode portion a or the bump 2
There may be problems such as cracks and disconnections.
Since this is fixed to the circuit board K only by the bumps 2,
This is because when the bumps themselves melt, the above-mentioned deformation occurs.
【0012】又、パッケージ1底面と回路基板K間のク
リアランス量を制御できず、融着後のバンプ2の形状任
せとなる。そのため、バンプ形状によってはパッケージ
1あるいは回路基板Kの電極a周辺又はバンプ2そのも
のに過度のストレスが残留あるいは新たに発生する場合
があり、クラック、断線等の不具合に至る可能性もあ
る。Further, the amount of clearance between the bottom surface of the package 1 and the circuit board K cannot be controlled, and the shape of the bump 2 after fusion is left to the user. Therefore, depending on the shape of the bumps, excessive stress may remain or newly occur around the electrodes a of the package 1 or the circuit board K or on the bumps 2 themselves, which may lead to defects such as cracks and disconnections.
【0013】上述した第一の公報のパッケージでは、上
記種々の問題点を解決しようとしているが、バンプと回
路基板上の電極との接合性についてはなお不十分であ
る。モールド樹脂と一体に形成されたモールドピンは、
回路基板に設けられる穴に挿入して位置合せが行なわれ
るが、穴径とのクリアランスによりモールドピンの位置
が狂ったり、モールドピン自体が正確に設けられていな
いとパッケージ下面のバンプと基板電極との位置がずれ
たりする。又、モールドピンは合成樹脂製であるから、
電気的導通はなく入出力端子として利用できないためス
ペース上のロスが多い。The package of the first publication described above attempts to solve the various problems described above, but the bondability between the bump and the electrode on the circuit board is still insufficient. The mold pin formed integrally with the mold resin is
Positioning is performed by inserting it into a hole provided in the circuit board, but the position of the mold pin is changed due to the clearance with the hole diameter, and if the mold pin itself is not correctly provided, the bump on the bottom surface of the package and the substrate electrode The position of is shifted. Also, since the mold pin is made of synthetic resin,
Since there is no electrical continuity and it cannot be used as an input / output terminal, there is a lot of space loss.
【0014】この発明は、上述した従来の電子部品パッ
ケージの種々の問題に留意して、バンプとリードの両方
を用いて従来パッケージより飛躍的に多ピン化ができか
つバンプ電極部の形状変化が生じないようにして接続不
良を防止した信頼性の高い接合のできる電子部品パッケ
ージを提供することを課題とする。In consideration of various problems of the conventional electronic component package described above, the present invention makes it possible to dramatically increase the number of pins by using both bumps and leads as compared with the conventional package and to change the shape of the bump electrode portion. An object of the present invention is to provide an electronic component package capable of highly reliable bonding in which connection failure is prevented by preventing such occurrence.
【0015】[0015]
【課題を解決するための手段】この発明は、上記課題を
解決する手段として、能動素子や受動素子を含む電子部
品をモールド樹脂と一体に成形し、底面に回路基板の電
極と接続するためのバンプを設け、固定支持及び信号入
出力のためのリードを底面又は側面、あるいはその両面
に設けて成る電子部品パッケージとしたのである。As a means for solving the above problems, the present invention is for integrally forming an electronic component including an active element and a passive element with a molding resin, and connecting it to an electrode of a circuit board on the bottom surface. The electronic component package is provided with bumps and leads for fixed support and signal input / output provided on the bottom surface, the side surface, or both surfaces thereof.
【0016】上記解決手段においては、前記リードを回
路基礎面に接合する表面実装形式のものとすることがで
きる。あるいは、前記リードを回路基板に貫通挿入する
挿入実装形式のものとしてもよい。さらに、前記リード
が表面実装形式のものを組合せたものとすることができ
る。In the above-mentioned solution means, it is possible to adopt a surface mounting type in which the lead is joined to the circuit base surface. Alternatively, it may be of an insertion mounting type in which the lead is inserted through the circuit board. Further, the leads may be a combination of surface mount types.
【0017】[0017]
【作用】上記の構成とした第一及び第二の発明は、複数
のバンプをパッケージ底面に設け、かつリードを底面又
は側面あるいはその両面に設けることによって、従来の
パッケージより飛躍的に多くのピンを設けて多ピン化を
図ると共に、電気的な接続の不良を防止して信頼性の高
い接合を可能としている。According to the first and second inventions having the above-mentioned structure, a plurality of bumps are provided on the bottom surface of the package, and leads are provided on the bottom surface, the side surface, or both surfaces thereof, so that the number of pins is dramatically increased as compared with the conventional package. Is provided to increase the number of pins and to prevent defective electrical connection, thereby enabling highly reliable bonding.
【0018】バンプ電極を基本としてリードを併用し、
リードによりその形状を適宜に変形又は調整して位置、
高さを最適に設定できると共に、リードとバンプの双方
から信号の入出力ができる。Based on the bump electrode, the lead is also used,
The shape can be appropriately deformed or adjusted by the lead to position it,
The height can be set optimally, and signals can be input and output from both leads and bumps.
【0019】従来のバンプ型パッケージと比べると、リ
ードの高さ、形状を所定の値にすることで、パッケージ
底面と基板間のクリアランス量を物理的に固定し、パッ
ケージ搭載時、バンプ電極部の融着時、あるいは融着後
も外的に加えられる熱的、機械的ストレス等に対して
も、バンプ形状が変化しないため、浮きの発生、即ち電
気的なオープン不良等も防止でき、信頼性の高い接合が
得られる。Compared to the conventional bump type package, by setting the height and shape of the leads to predetermined values, the clearance amount between the package bottom surface and the substrate is physically fixed, and when mounting the package, the bump electrode portion The shape of the bumps does not change during fusion, or even after the fusion, even when subjected to external thermal or mechanical stress, it is possible to prevent floating, that is, electrical open defects, etc. A high bond can be obtained.
【0020】第三、第四の発明のようにリード挿入型の
場合は、リードを基板に挿入することでパッケージを基
板に搭載する際、あるいは融着時に正確に位置を固定で
き、さらに融着後も位置がずれることが無いという効果
も得られる。In the case of the lead insertion type as in the third and fourth inventions, by inserting the leads into the substrate, the position can be accurately fixed when the package is mounted on the substrate or at the time of fusion, and further the fusion is performed. There is also an effect that the position does not shift afterward.
【0021】[0021]
【実施例】以下この発明の実施例について図面を参照し
て説明する。図1は第一実施例の電子部品パッケージの
外観斜視図である。電子部品パッケージ1は、図示省略
の基板上に能動素子(ICチップ)や受動素子(抵抗、
コンデンサ等)を設けその上にモールド樹脂を一体成形
したものから成る。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is an external perspective view of the electronic component package of the first embodiment. The electronic component package 1 includes an active element (IC chip) and a passive element (resistor, resistor,
(Capacitor etc.) and a molding resin is integrally molded thereon.
【0022】パッケージ1の裏面には適宜間隔でグリッ
ドアレイ状に多数のバンプ2が配設されている。パッケ
ージ1の側面には表面実装形のリード3が、図1の
(a)に示すようにそれぞれ四隅付近に設けられてい
る。この表面実装は、いわゆるガルウィング型リード形
状のものである。On the back surface of the package 1, a large number of bumps 2 are arranged in a grid array at appropriate intervals. Surface-mounted leads 3 are provided on the side surfaces of the package 1 near the four corners, respectively, as shown in FIG. This surface mounting has a so-called gull wing type lead shape.
【0023】上記構成のパッケージ1を回路基板Kに実
装する際に上記バンプ2、リード3を電気的に接続する
ために回路基板K上には、バンプ2、リード3に対応す
る配置構成で電極a、bが設けられるものとする。電極
bに対してそれぞれのリード3を半田接合cすることに
より、バンプ2と電極a、リード3と電極bが電気的に
導通されると共に、回路基板Kに対して支持、固定され
る。In order to electrically connect the bumps 2 and the leads 3 when the package 1 having the above-described structure is mounted on the circuit board K, electrodes are arranged on the circuit board K in an arrangement corresponding to the bumps 2 and the leads 3. It is assumed that a and b are provided. By soldering the leads 3 to the electrodes b by soldering, the bumps 2 and the electrodes a and the leads 3 and the electrodes b are electrically conducted, and are supported and fixed to the circuit board K.
【0024】ガルウィング型のリード3は、その形状が
略L字状に屈曲して形成されているから、半田接合cに
より固定される前にその脚長を予め調整することによ
り、パッケージ1の裏面と回路基板Kの表面との隙間を
所定距離に設定することができる。バンプ2と対応する
電極aとは予め別々にそのグリッドアレイ配置間隔を正
確に形成しておけば、リード3の設定位置さえ正確に位
置決めするとバンプ2と電極aとの接続は必ず確保でき
る。Since the gull wing type lead 3 is formed by bending the lead 3 into a substantially L shape, the leg length is adjusted in advance before being fixed by the solder joint c, so that The gap with the surface of the circuit board K can be set to a predetermined distance. If the grid array arrangement intervals of the bumps 2 and the corresponding electrodes a are separately formed in advance, the connection between the bumps 2 and the electrodes a can be surely secured even if the lead 3 is accurately set.
【0025】図2は上記実施例のリード3と同様の表面
実装型であるが、リードの形状が異なる他の一部変形例
を示す。(a)はリード3′がパッケージ底面に形成さ
れた例、(b)はリード3″としてJベンド型を用いた
例である。その他は前述の実施例と同じであり、同じ機
能部材には同じ符号を付して説明を省略する。FIG. 2 shows a surface mount type similar to the lead 3 of the above embodiment, but shows another partial modification in which the shape of the lead is different. (A) is an example in which the lead 3'is formed on the bottom surface of the package, and (b) is an example in which a J-bend type is used as the lead 3 ". Others are the same as those in the above-described embodiment, and the same functional members are included. The same reference numerals are given and the description is omitted.
【0026】図3は、リードが挿入実装型である例を示
す。(a)はリード3aをパッケージ側面に形成した
例、(b)はリード3bをパッケージ底面に形成した
例、(c)は(b)の例に図1の実施例のリード3を組
合せた例である。FIG. 3 shows an example in which the lead is of the insertion mounting type. (A) is an example in which the lead 3a is formed on the side surface of the package, (b) is an example in which the lead 3b is formed on the bottom surface of the package, and (c) is an example in which the lead 3 of the embodiment of FIG. 1 is combined with the example in (b). Is.
【0027】従来例のリード挿入実装型の場合と同様
に、回路基板Kに設けたスルーホールに上記リード3
a、3bのいずれかを挿入して取付位置、高さを調整し
て固定する。これにより、バンプ2が回路基板Kの電極
aに正確に接続される。As in the case of the lead insertion mounting type of the conventional example, the lead 3 is inserted in the through hole provided in the circuit board K.
Insert either a or 3b and adjust the attachment position and height to fix. As a result, the bump 2 is accurately connected to the electrode a of the circuit board K.
【0028】[0028]
【効果】以上詳細に説明したように、この出願の第一の
発明ではパッケージ底面にバンプを設け、かつリードを
底面又は側面あるいはその両面に設けたものとしたか
ら、従来のパッケージより飛躍的に多ピン化が容易に可
能となり、リードの取付を調整することにより、基板間
のクリアランスを保ちバンプの変形を防止して信頼性の
高いバンプ接続部を得ることができる。As described above in detail, in the first invention of this application, the bumps are provided on the bottom surface of the package and the leads are provided on the bottom surface, the side surfaces, or both surfaces thereof, so that it is dramatically more advanced than the conventional package. It becomes possible to easily increase the number of pins, and by adjusting the attachment of the leads, it is possible to maintain the clearance between the substrates and prevent the deformation of the bumps, thereby obtaining a highly reliable bump connection portion.
【0029】第二、第三の発明のように、リードを実装
する方式としては表面実装形あるいは挿入実装形のいず
れでもよく、基板とパッケージ底面間のクリアランス量
をリードの形状により制御、固定できる。特にリードを
挿入形とすればパッケージ搭載の際の位置ずれを防ぎ、
信頼性向上だけでなく修復、外観目視検査の簡便化も図
れる。As in the second and third inventions, the method of mounting the leads may be either surface mounting type or insertion mounting type, and the clearance amount between the substrate and the package bottom surface can be controlled and fixed by the shape of the leads. . In particular, if the lead is an insertion type, it prevents misalignment when mounting the package,
Not only can reliability be improved, but repair and visual inspection can be simplified.
【0030】第四の発明のように、表面実装と挿入実装
の両方式によりリードを実装すればさらに接合性につい
て信頼性が高くなる。When the leads are mounted by both the surface mounting method and the insertion mounting method as in the fourth aspect of the invention, the reliability of the bondability is further enhanced.
【図1】第一実施例の電子部品パッケージの外観斜視図
及び部分断面を含む側面図FIG. 1 is an external perspective view of an electronic component package of a first embodiment and a side view including a partial cross section.
【図2】同上の電子部品パッケージの一部変形例を示す
部分断面を含む側面図FIG. 2 is a side view including a partial cross section showing a partially modified example of the electronic component package of the above.
【図3】第二実施例の電子部品パッケージの部分断面を
含む側面図FIG. 3 is a side view including a partial cross section of an electronic component package according to a second embodiment.
【図4】従来例のバンプ型とリード型のパッケージ外観
斜視図FIG. 4 is a perspective view of a bump-type and lead-type package according to the related art.
【図5】従来例のリード型パッケージの分類形成の説明
図FIG. 5 is an explanatory diagram of classification formation of a lead-type package of a conventional example.
【図6】バンプ溶着接合及びその変形状態の説明図FIG. 6 is an explanatory view of bump welding bonding and its deformed state.
1 パッケージ 2 バンプ 3、3′、3″ リード a、b 電極 K 回路基板 1 Package 2 Bumps 3, 3 ', 3 "Leads a, b Electrodes K Circuit board
Claims (4)
ールド樹脂と一体に成形し、底面に回路基板の電極と接
続するためのバンプを設け、固定支持及び信号入出力の
ためのリードを底面又は側面、あるいはその両面に設け
て成る電子部品パッケージ。1. An electronic component including an active element and a passive element is integrally molded with a molding resin, a bump for connecting to an electrode of a circuit board is provided on the bottom surface, and leads for fixed support and signal input / output are provided on the bottom surface. Alternatively, an electronic component package provided on the side surface or both surfaces thereof.
実装形式のものとしたことを特徴とする請求項1に記載
の電子部品パッケージ。2. The electronic component package according to claim 1, wherein the lead is of a surface mount type in which the lead is joined to the surface of the circuit board.
入実装形式のものとしたことを特徴とする請求項1に記
載の電子部品パッケージ。3. The electronic component package according to claim 1, wherein the lead is of an insertion mounting type in which the lead is inserted through a circuit board.
せたものとしたことを特徴とする請求項3に記載の電子
部品パッケージ。4. The electronic component package according to claim 3, wherein the leads are a combination of surface mount type leads.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP310595A JPH08191111A (en) | 1995-01-12 | 1995-01-12 | Electronic part package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP310595A JPH08191111A (en) | 1995-01-12 | 1995-01-12 | Electronic part package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08191111A true JPH08191111A (en) | 1996-07-23 |
Family
ID=11548076
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP310595A Pending JPH08191111A (en) | 1995-01-12 | 1995-01-12 | Electronic part package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH08191111A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2364435A (en) * | 1999-12-24 | 2002-01-23 | Nec Corp | Surface-mount package |
KR100957411B1 (en) * | 2008-02-05 | 2010-05-11 | 엘지이노텍 주식회사 | Light emitting apparatus |
WO2010087856A1 (en) * | 2009-01-30 | 2010-08-05 | Hewlett-Packard Development Company, L.P. | Integrated-circuit attachment structure with solder balls and pins |
KR101007116B1 (en) * | 2010-02-19 | 2011-01-10 | 엘지이노텍 주식회사 | Light emitting apparatus |
CN109244054A (en) * | 2018-09-05 | 2019-01-18 | 吴革洪 | Electronic component |
-
1995
- 1995-01-12 JP JP310595A patent/JPH08191111A/en active Pending
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2364435B (en) * | 1999-12-24 | 2002-11-20 | Nec Corp | Surface-mount package with side terminal |
US6756666B2 (en) | 1999-12-24 | 2004-06-29 | Nec Corporation | Surface mount package including terminal on its side |
GB2364435A (en) * | 1999-12-24 | 2002-01-23 | Nec Corp | Surface-mount package |
US8052317B2 (en) | 2008-02-05 | 2011-11-08 | Lg Innotek Co., Ltd. | Light emitting apparatus and light unit having the same |
KR100957411B1 (en) * | 2008-02-05 | 2010-05-11 | 엘지이노텍 주식회사 | Light emitting apparatus |
US8950925B2 (en) | 2008-02-05 | 2015-02-10 | Lg Innotek Co., Ltd. | Light emitting apparatus and light unit having the same |
US8646963B2 (en) | 2008-02-05 | 2014-02-11 | Lg Innotek Co., Ltd. | Light emitting apparatus and light unit having the same |
US8277107B2 (en) | 2008-02-05 | 2012-10-02 | Lg Innotek Co., Ltd. | Light emitting apparatus and light unit having the same |
US8052321B2 (en) | 2008-02-05 | 2011-11-08 | Lg Innotek Co., Ltd. | Light emitting apparatus and light unit having the same |
WO2010087856A1 (en) * | 2009-01-30 | 2010-08-05 | Hewlett-Packard Development Company, L.P. | Integrated-circuit attachment structure with solder balls and pins |
CN102301469A (en) * | 2009-01-30 | 2011-12-28 | 惠普开发有限公司 | Integrated-circuit Attachment Structure With Solder Balls And Pins |
US20110266672A1 (en) * | 2009-01-30 | 2011-11-03 | Jeffrey Scott Sylvester | Integrated-circuit attachment structure with solder balls and pins |
GB2479312B (en) * | 2009-01-30 | 2013-05-29 | Hewlett Packard Development Co | Integrated-circuit attachment structure with solder balls and pins |
GB2479312A (en) * | 2009-01-30 | 2011-10-05 | Hewlett Packard Development Co | Integrated-circuit attachment structure with solder balls and pins |
KR101007116B1 (en) * | 2010-02-19 | 2011-01-10 | 엘지이노텍 주식회사 | Light emitting apparatus |
CN109244054A (en) * | 2018-09-05 | 2019-01-18 | 吴革洪 | Electronic component |
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