JPH07326677A - Semiconductor integrated circuit and its manufacture - Google Patents

Abstract

PURPOSE:To provide isolation structure which can manufacture a semiconductor integrated circuit of a dielectric isolation structure containing a high withstand voltage element, with high yield and high reliability, and its manufacturing method. CONSTITUTION:In a semiconductor integrated circuit of a dielectric isolation structure constituted of an island 1 composed of single crystal semiconductor, an insulating film 12 covering the lower surface and the side surface of the island 1, retaining members 11, 24 wherein the island l covered with the insulating film is buried and retained, and a retaining substrate 10 on which the retaining members are fixed, the retaining members are constituted of a polycrystalline silicon film 24 which is fixed on the insulating film with which the island 1 is covered, and a boron glass film 11 which is fixed to the polycrystalline silicon film 24 and the retaining substrate 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit and a method of manufacturing the same, and more particularly to a method of manufacturing a semiconductor integrated circuit including a high breakdown voltage semiconductor element in an island separated by a dielectric.

[0002]

2. Description of the Related Art When manufacturing a semiconductor integrated circuit including a semiconductor element having a withstand voltage of several hundreds of volts or more, a dielectric material that does not use a PN junction to separate elements but an oxide film (dielectric material). A separate structure is used. There are several types of manufacturing methods, one of which is
A method is known in which after a groove is formed on the surface of a semiconductor substrate, the groove is filled with polycrystalline silicon and adhered to a supporting substrate, and the opposite surface is polished to use the polished surface as an element formation surface (for example, , JP-A-59-99735).

According to Japanese Patent Laid-Open No. 1-93143, unevenness (grooves) is formed on the main surfaces of the first semiconductor substrate and the second semiconductor substrate, and they are mutually bonded via a fluid adhesive material. After fitting the concavo-convex surface, the adhesive material is heated and melted to bond both semiconductor substrates, and the back surface of one semiconductor substrate is polished to form an island separated by the adhesive and the insulating layer. A method of doing so is disclosed. Here, as the adhesive material having fluidity, B
A glass material such as PSG is used.

[0004]

However, when a semiconductor element such as a transistor having a withstand voltage of several hundreds of volts or more is housed in an island made of a dielectric-isolated single crystal semiconductor, the bottom surface of the base region is changed to the bottom surface of the island. The required depth is about 50 to 100 μm.
Therefore, the U-shaped or V-shaped separating groove also requires a depth of about 50 to 150 μm. However,
If the U-shaped or V-shaped separating groove having such a depth is simply filled with the glass material such as BPSG as described above, the flattening performance of the glass material has a limit.
There is a problem that the U-shaped or V-shaped deep groove cannot always be sufficiently filled.

When the deep U-shaped or V-shaped groove for separation cannot be filled with a dielectric material such as glass material, air or gas is accumulated between the glass material and the supporting substrate, and the semiconductor is heated by the subsequent heat treatment. In some cases, stress may be applied to the substrate or the like to cause cracks in the wafer, the scribe property of the completed semiconductor integrated circuit may be deteriorated, or the yield may be reduced or reliability problems may be caused.

The present invention has been made in view of the problems of the related art, and a semiconductor integrated circuit having a dielectric isolation structure including a high breakdown voltage element can be manufactured with high yield and high reliability. An object is to provide a structure and a manufacturing method thereof.

[0007]

In a semiconductor integrated circuit of the present invention, an island made of a single crystal semiconductor, an insulating film covering the lower surface and side surfaces of the island, and an island covered with the insulating film are embedded and supported. In a dielectric isolation type semiconductor integrated circuit comprising a supporting member and a supporting substrate to which the supporting member is fixed, the supporting member includes a polycrystalline silicon film fixed to an insulating film covering the island, and the polycrystalline silicon film. And a boron glass film fixed to the support substrate.

The method of manufacturing a semiconductor integrated circuit according to the present invention further comprises a step of forming a separating groove on a single crystal semiconductor substrate to form an oxide film on the surface of the semiconductor substrate, and the groove on the surface of the semiconductor substrate. A step of embedding a polycrystalline silicon film by embedding, a step of depositing a boron glass film on the polycrystalline silicon film, a step of attaching the adhered surface of the boron glass film to a support substrate, and And a step of forming an island supported by the boron glass film and the polycrystalline silicon film by polishing from the back surface of the semiconductor substrate until reaching the separation groove; and a step of forming a semiconductor element in the island. Characterize.

[0009]

The island made of a single crystal semiconductor is supported on the substrate by the polycrystalline silicon film fixed to the insulating film covering the island and the polycrystalline silicon film and the boron glass film fixed on the supporting substrate. The polycrystalline silicon film is
Adhesion is good with respect to an insulating film such as an oxide film that covers the island of the single crystal semiconductor. Therefore, when the separation groove is buried, the separation groove is thin and deep and the adhesion is good. be able to. Further, the boron glass film can provide good adhesion between the polycrystalline film and another supporting substrate such as a semiconductor wafer. Therefore, since the island made of the single crystal semiconductor is supported on the supporting substrate by the two-layer structure of the polycrystalline silicon film and the boron glass film, the supporting structure is strong and has a high cushioning property against thermal strain and the like. Will be things. Therefore, a semiconductor integrated circuit including a high breakdown voltage element can be manufactured with a good yield and reliability.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a partial cross-sectional view of a semiconductor integrated circuit according to an embodiment of the present invention, showing a region of an island with dielectric isolation. In the semiconductor integrated circuit of this embodiment, the boron glass film 11 and the polycrystalline silicon film 24 are provided on the support substrate 10.
A large number of islands 1 separated by the dielectric are supported by. Then, a high breakdown voltage bipolar transistor having a breakdown voltage of, for example, several hundreds V in the island 1 separated from the dielectric,
Elements such as DMOS and IGBT are housed.

The island 1 whose bottom and side surfaces are covered with an oxide film 12 and which is dielectrically separated is divided by a groove 3 for V-shaped separation, and the polycrystalline silicon film 24 and boron are interposed via the oxide film 12. It has a structure of being embedded in a supporting member made of the glass film 11. The polycrystalline silicon film 24 is fixed to the oxide film 12 of the island 1, and the boron glass film 11 plays a role of adhering the polycrystalline silicon film 24 to the supporting substrate 10 which is another semiconductor substrate.

In the island 1, a P-type base region 20, an N + type emitter region 21, an N + type collector contact region 19 and an N + constituting a high breakdown voltage transistor are formed.
The mold embedded diffusion layer 17 and the like are provided. N + type buried diffusion layer 1
7 is formed by diffusion from an N + -type impurity layer that has been ion-implanted in advance on the inner surface side of the oxide film 17 around the dielectric island 1.

In the dielectric-isolated transistor having such a structure, the island depth can be set to about 50 to 100 μm, and the distance W between the base 20 and the buried diffusion layer 17 can be set large. Therefore, it becomes possible to mount an element having a high breakdown voltage on a semiconductor integrated circuit, and since it is dielectric-separated, there is no problem such as latch-up. Further, since the island portion is adhered to the supporting substrate by the boron glass film sandwiching the polycrystalline silicon film, the respective adhesiveness is good, so that the structure is strong and it is good for heat distortion and the like. Cushioning property is obtained.

Next, a method of manufacturing the semiconductor integrated circuit of this embodiment will be described. First, as shown in FIG. 2, the surface of the N-type semiconductor substrate 15 is selectively subjected to anisotropic dry etching by resist patterning to form a V-shaped or U-shaped groove 3 having a depth of 50 to 150 μm. The V-shaped or U-shaped groove 3 may be formed by anisotropic etching using a KOH solution.

Next, as shown in FIG. 3, arsenic is ion-implanted into the entire surface of the semiconductor substrate 15 to form an N + -type impurity layer 17 therein.
A is formed and an oxide film 12 having a thickness of about 1 μm is grown. The N + type impurity layer 17A may be formed by diffusion, or may be formed by ion implantation after the oxide film 12 is formed.

Next, as shown in FIG. 4, a polycrystalline silicon film 24 is formed by CVD. Polycrystalline silicon film 24
Is, for example, 50 μm for a groove 3 having a depth of about 100 μm.
It is formed to a thickness of a certain degree. CVD of polycrystalline silicon film 24
Is deposited on the semiconductor substrate 15 at the deepest part of the groove 3.
The film thickness is thicker than that of the flat portion of. In the present invention, the depth of the groove 3 is made substantially shallow by utilizing this difference in film thickness. Then, as shown in FIG. 5, the boron glass film 11 is formed on the surface of the semiconductor substrate 15 to have a thickness of, for example, about 70 μm. The boron glass film 11 is a silicate glass-based coating containing boron called soot, which is formed by reacting silicon tetrachloride with boron trichloride or the like by CVD. The boron glass film 11 is grown to such a thickness that the V-shaped groove 3 is embedded and its surface is substantially flat. In the previous step, since the substantial depth of the groove 3 is made shallow by the polycrystalline silicon film 24, the surface of the boron glass film 11 can be formed as a flat surface.

Next, as shown in FIG. 6, the semiconductor substrate 15 is turned over and its surface is attached to the supporting substrate 10.
That is, the surface of the semiconductor substrate 15 on which the boron glass film 11 is adhered is fitted to the surface of the support substrate 10, and, for example, 1
Heat at 200-1300 ° C. By this heat treatment, the boron glass film 11 is softened and melted, and the polycrystalline silicon film 2
4 and the supporting substrate 10 are firmly bonded and fixed. A semiconductor substrate of the same type as the semiconductor substrate 15 is used as the support substrate 10. Since the supporting substrate 10 is merely for supporting the island 1 by the boron glass film 11, it is preferably the same type as the semiconductor substrate 15 from the viewpoint of the coefficient of thermal expansion and the like, but a ceramic substrate or the like may be used. Absent.

Next, as shown in FIG. 7, polishing is performed from the back surface side of the semiconductor substrate 15 and the polishing is stopped when the head of the V-shaped groove 3 is exposed. The polishing of the semiconductor substrate 15 is performed by ordinary polishing. By this polishing, the single crystal semiconductor substrate 15 is divided into islands 1 that are dielectrically separated by the oxide film 12, and is bonded and supported by the support substrate 10 by the boron glass film 11 and the polycrystalline silicon film 24. The N + -type buried diffusion layer 17 is formed by depositing the polycrystalline silicon film 24 and the boron glass film 11, heat treatment when the semiconductor substrate 15 is attached to the support substrate 10, and the like, and the impurity layer 17 shown in FIG.
Oxide film 1 from the surface layer of A to the bottom and side surfaces of island 1
It is formed by diffusing inside 2.

Next, as shown in FIG. 1, a P-type base diffusion layer 20, an N + type emitter diffusion layer 21, an N + type collector contact diffusion layer 19 and the like are formed one after another, and the dielectrically isolated island region 1 is formed. Diffusion regions for devices such as transistors are formed therein. Then, on other islands (not shown), semiconductor elements such as high breakdown voltage bipolar transistors or small signal transistors that do not require breakdown voltage are simultaneously formed by diffusion. Then, these high breakdown voltage type transistors, small signal transistors and the like are connected by a known wiring technique, and a semiconductor integrated circuit having a dielectric isolation structure including a high breakdown voltage semiconductor element is completed.

In the above-described embodiments, the bipolar transistor is formed in the island region where the dielectric is separated. However, a high breakdown voltage diode, a thyristor or an insulated gate bipolar transistor (IG) is used.
It goes without saying that BT) or the like may be formed.
Also, the boron glass film is not limited to the above-mentioned embodiment, and any film can be used as long as it can fix the dielectrically separated islands on the supporting substrate with the polycrystalline silicon film interposed therebetween. As described above, various modifications can be made without departing from the spirit of the present invention.

[0022]

As described above, according to the present invention,
Since the polycrystalline silicon film makes the depth of the groove shallow, the depth of the groove can be made deeper than the limit depth at which the glass film can be embedded. Therefore, a deep island region can be formed and the element breakdown voltage can be improved. Therefore, it becomes possible to produce a semiconductor integrated circuit including a high breakdown voltage semiconductor element with good yield, reliability and economically.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor integrated circuit according to an embodiment of the present invention, showing a region of an island with dielectric isolation.

FIG. 2 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a manufacturing process of a semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 4 is a cross-sectional view showing the manufacturing process of the semiconductor integrated circuit according to the embodiment of the present invention.

FIG. 5 is a cross-sectional view showing the manufacturing process of the semiconductor integrated circuit according to the embodiment of the present invention.

FIG. 6 is a cross-sectional view showing the manufacturing process of the semiconductor integrated circuit according to the embodiment of the present invention.

FIG. 7 is a cross-sectional view showing the manufacturing process of the semiconductor integrated circuit according to the embodiment of the present invention.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication location H01L 27/06 29/786 29/78 9056-4M H01L 29/78 311 R 321 R

Claims (4)

[Claims] 1. An island made of a single crystal semiconductor, an insulating film covering the lower surface and side surfaces of the island, a support member for embedding and supporting the island covered with the insulating film, and a support substrate to which the support member is fixed. In the dielectric isolation type semiconductor integrated circuit consisting of, the supporting member comprises a polycrystalline silicon film fixed to an insulating film covering the island, and a polycrystalline silicon film and a boron glass film fixed to the supporting substrate. A semiconductor integrated circuit characterized by the following. 2. The semiconductor integrated circuit according to claim 1, further comprising a high-concentration impurity diffusion layer on the inner surface of the insulating film that covers the lower surface and the side surface of the island. 3. A step of forming a separating groove on a single crystal semiconductor substrate to form an oxide film on the surface of the semiconductor substrate, and filling the groove on the surface of the semiconductor substrate to deposit a polycrystalline silicon film. And a step of depositing a boron glass film on the polycrystalline silicon film, a step of attaching a deposition surface of the boron glass film to a supporting substrate, and a step of reaching the separation groove from the back surface of the semiconductor substrate. A method of manufacturing a semiconductor integrated circuit, comprising: a step of polishing up to form an island supported by the boron glass film and the polycrystalline silicon film; and a step of forming a semiconductor element in the island. 4. The method according to claim 3, further comprising the step of forming a high concentration impurity layer to be a buried diffusion layer on the surface of the substrate after forming a separation groove on the semiconductor substrate. Manufacturing method of semiconductor integrated circuit.