JPH07321612A - Frequency multipling circuit - Google Patents

Abstract

PURPOSE:To allow the single circuit to cope with even a periodic waveform input even with any frequency by giving the periodic waveform input to 1st and 2nd comparators so as to generate 1st and 2nd comparison signals having a prescribed time difference. CONSTITUTION:Upon the receipt of a periodic waveform input VIN whose period is, e.g. 2T, an operational amplifier 1 compares the input VIN with a threshold voltage V1 to provide a 1st comparison signal S1 and an operational amplifier 2 compares the input VIN with the threshold voltage V1 simultaneously to provide a 2nd comparison signal S2. Let the signal S1 indicate that the center width of the maximum value of the input VIN has a period of T/2 and that the period is equal to the period 2T as rectangular wave. Furthermore, let the signal S2 indicate that the center width of the minimum value of the input VIN has a period of T/2 and that the period is equal to the period 2T as a rectangular wave. Thus, the deviation of the time T is produced for the maximum value and the minimum value of the input VIN and the signals S1, S2 are given to an OR gate 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a frequency multiplication circuit which is used as an operation clock generation circuit for an LSI or the like and which generates a multiplied frequency signal having a frequency twice that of the original signal.

[0002]

2. Description of the Related Art Conventionally, as a frequency multiplication circuit of this type, there is one shown in FIG. 6, for example.

The frequency multiplying circuit shown in FIG. 6 has a periodic waveform input (cycle 2T) supplied from inside or outside the LSI.
VIN is a capacitor / resistor (C
R) and a delay circuit 102 having a delay time different from the delay time of the delay circuit 101, respectively, to generate two signals S101 and S102 having a certain time difference T0. Then, these two signals S101 and S102 are input to the mixing circuit 103,
A frequency-doubled frequency signal VOUT that is twice the periodic waveform input VIN that is the original signal is obtained.

[0004]

However, the conventional frequency multiplier circuit has the following problems.

(1) In order to obtain a stable multiplied frequency signal VOUT, the above-mentioned constant time difference TO needs to be T0 = T. Therefore, when the frequency of the periodic waveform input VIN is changed, when a single circuit corresponds to this, the delay time of the delay circuit (that is, the constant time difference T0) is adjusted according to the changed frequency, or Multiple delay circuits must be prepared. However, since the delay circuit 101 of the conventional frequency multiplication circuit is a CR delay circuit, its delay time is constant, and it is possible to support only a single frequency. Therefore, there is a problem in that the delay time of the delay circuit 101 has to be changed again so as to correspond to various frequencies in the design.

(2) Delay circuit 101 built in the LSI
When the characteristics of the element change due to the fluctuation of the power supply voltage,
Since an error may occur in the set delay time, it was difficult to always supply a stable frequency-multiplied signal.

The present invention has been made to solve the above-mentioned conventional problems, and an object thereof is to provide a frequency that can supply a stable multiplied frequency signal to various frequencies by the same circuit. It is to provide a multiplication circuit. Another object of the present invention is to provide a frequency multiplying circuit that is less affected by fluctuations in the power supply voltage and can always obtain a stable multiplied frequency signal.

[0008]

In order to achieve the above object, a feature of the present invention is to compare a periodic waveform input from the inside or the outside of a semiconductor integrated circuit with an arbitrary threshold value to obtain a first comparison signal. A first comparator for generating a second comparator for generating a second comparison signal by comparing a threshold different from the threshold in the first comparator with the periodic waveform input; and the first and second comparators. And a mixing circuit that mixes the comparison signals and outputs a multiplied frequency signal.

Further, the first comparison signal has a width centered on the maximum value of the periodic waveform input by adjusting the threshold value of the first comparator so as to have a width of 1 of the period of the periodic waveform input.
It is desirable to generate a rectangular wave of / 4 and having the same period as the period of the periodic waveform input.

Further, the second comparison signal has a width around the minimum value of the periodic waveform input by 1 / th of the period of the periodic waveform input by adjusting the threshold value of the second comparator.
It is desirable that the period is 4 and the period is a rectangular wave that is the same as the period of the periodic waveform input.

[0011]

According to the above configuration, the periodic waveform input is the first
And a second comparator, which generate first and second comparison signals having a constant time difference. At this time, for example, the first comparison signal has a width centered on the maximum value of the periodic waveform input and is ¼ of the period of the periodic waveform input.
And the period is a rectangular wave that is the same as the period of the periodic waveform input, and the second comparison signal has a width centered on the minimum value of the periodic waveform input and is 1/4 of the period of the periodic waveform input. ,
Moreover, the rectangular wave has the same period as the period of the periodic waveform input.
The mixing circuit mixes the first and second comparison signals and outputs a multiplied frequency signal.

As a result, even if the frequency of the periodic waveform input changes, the voltage ratio of the periodic waveform input divided by the thresholds (reference voltage) of the first and second comparators does not change. A single circuit can handle waveform input and is less susceptible to changes in the power supply voltage.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of a frequency multiplier circuit embodying the present invention, and FIG. 2 is a specific circuit diagram thereof.

This frequency multiplying circuit is provided inside the LSI and includes a first comparator 1 having an arbitrary threshold value V1 as shown in FIG. 1 and a second comparator 2 having a threshold value V2 different from the threshold value V1. , And a mixing circuit 3 connected to these outputs.

As shown in FIG. 2, each of the first and second comparators 1 and 2 is composed of an operational amplifier. Then, the normal input side (+) of the first comparator 1
And L on the inverting input side (-) of the second comparator 2.
The periodic waveform input VIN supplied from inside or outside SI is taken in, and further, the inverting input side (-) of the first comparator 1 and the non-inverting input side (+) of the second comparator 2 are taken.
Are applied with threshold voltages V1 and V2, respectively.

Here, the threshold voltages V1 and V2 are determined by the dividing resistors R1, R2 and R3 connected between the operating voltage (power supply voltage) VDD and the ground GND. The threshold voltage V1 is calculated as V1 = {(R2 + R3) / (R1 + R2 + R3)} VDD, and the threshold voltage V2 is calculated as V2 = {R3 / (R1 + R2 + R3)} VDD.

The first comparator 1 has a periodic waveform input V
IN has a function of generating a first comparison signal by comparing the threshold voltage V1, and the second comparator 2 has a function of comparing the periodic waveform input VIN with the threshold voltage V2 to generate a second comparison signal. However, the mixing circuit 3 is composed of a 2-input OR gate, and has a function of mixing the first and second comparison signals and outputting a multiplied frequency signal.

Next, the operation of the frequency multiplier circuit configured as described above will be described with reference to the timing chart of FIG.

From the inside or outside of the LSI, for example, a cycle of 2T
When the periodic waveform input VIN of is supplied, the operational amplifier 1
This periodic waveform input VIN is compared with the threshold voltage V1
And outputs the comparison signal S1. At the same time, the operational amplifier 2 compares the periodic waveform input VIN with the threshold voltage V2 and outputs the second comparison signal S2.

At this time, as shown in FIG. 3, the first comparison signal S1 has a width centered on the maximum value of the periodic waveform input VIN and is T / 2 of the period of the periodic waveform input VIN, and its period is It becomes the same rectangular wave as the period 2T of the periodic waveform input VIN. On the other hand, the second comparison signal S2 has a width centered on the minimum value of the periodic waveform input VIN and has a width of T / 2 of the period of the periodic waveform input VIN,
Moreover, the period becomes a rectangular wave which is the same as the period 2T of the periodic waveform input VIN. The threshold voltages V1 and V2 are V1> V
2, and is adjusted in advance so that the first and second comparison signals S1 and S2 are obtained as the above-mentioned waveforms.

Since the maximum value and the minimum value of the periodic waveform input VIN are shifted by the time T, the first comparison signal S1
And the second comparison signal S2 is shifted by the time T.

The first comparison signal S1 and the second comparison signal S2 are input to the OR gate 3, and as a result, a square wave having a pulse width T / 2 and a period T can be obtained as the multiplied frequency signal VOUT. .

According to the present embodiment, even if the frequency of the periodic waveform input VIN to be taken in is varied, the power supply voltage VDD
Even if fluctuates, the periodic waveform input VIN changes the threshold voltage V1, V2
The voltage ratio divided by is always constant, and the first and second comparison signals S1 and S2 are input to the periodic waveform input V, respectively.
Width T / 2 centered around the maximum and minimum values of IN, period 2T
Of the rectangular wave, which is shifted by the time T. Therefore, it is possible to always obtain a stable multiplied frequency signal VOUT with a single circuit.

4 and 5 are circuit diagrams showing modifications of the frequency multiplication circuit shown in FIG.

The one shown in FIG. 4 is an AND circuit as a mixing circuit.
This is an example using the gate 3a. In this case, the threshold voltages V1 and V2 are applied to the non-inverting input side (+) of the operational amplifier 1 and the inverting input side (-) of the operational amplifier 2, respectively, and the inverting input side (-) and the operational amplifier 2 of the operational amplifier 1 are further applied. The periodic waveform input VIN is taken in on the non-inverted input side (+).

FIG. 5 shows an example in which an exclusive OR circuit (XOR) 3b is used as a mixing circuit. In this case, the configuration is the same as that of the above embodiment except for the mixing circuit.

Even with the above-mentioned structure, it is possible to obtain the same effects as those of the above-mentioned embodiment.

[0028]

As described in detail above, according to the present invention, a first comparator for comparing a periodic waveform input with an arbitrary threshold value to generate a first comparison signal, and the first comparator A second comparator that compares a threshold different from the threshold with the periodic waveform input to generate a second comparison signal, and a mixing circuit that mixes the first and second comparison signals and outputs a multiplied frequency signal. Since it is equipped with and, it is possible to deal with periodic waveform input of any frequency with a single circuit, and it is less affected by changes in the power supply voltage, and a stable multiplied frequency signal is always provided. Obtainable.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a frequency multiplication circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of the frequency multiplication circuit shown in FIG.

FIG. 3 is a timing chart of the frequency multiplication circuit shown in FIG.

FIG. 4 is a circuit diagram showing a modification of the frequency multiplication circuit shown in FIG.

5 is a circuit diagram showing another modification of the frequency multiplier circuit shown in FIG.

FIG. 6 is a block diagram showing a configuration of a conventional frequency multiplication circuit.

[Explanation of symbols]

 1, 2 operational amplifier 3 OR gate 3a AND gate 3b XOR gate R1, R2, R3 Dividing resistors V1, V2 Threshold voltage

Claims (3)

[Claims] 1. A first comparator that compares a periodic waveform input supplied from inside or outside of a semiconductor integrated circuit with an arbitrary threshold value to generate a first comparison signal, and the threshold value in the first comparator. A second comparator for generating a second comparison signal by comparing the threshold value different from the threshold waveform input with the periodic waveform input; and a mixing circuit for mixing the first and second comparison signals and outputting a multiplied frequency signal. A frequency multiplication circuit characterized by being provided. 2. The first comparison signal is obtained by adjusting a threshold value of the first comparator,
7. A rectangular wave whose width is ¼ of the period of the periodic waveform input and which is centered on the maximum value of the periodic waveform input and whose period is the same as the period of the periodic waveform input. 1. The frequency multiplication circuit according to 1. 3. The second comparison signal has a width that is ¼ of the cycle of the periodic waveform input and has a cycle centered on the minimum value of the periodic waveform input by adjusting the threshold of the second comparator. 3. The frequency multiplying circuit according to claim 1, wherein is generated so as to be a rectangular wave having the same period as the period of the periodic waveform input.