JPH07320631A - Electron source and forming method therefor and image forming apparatus - Google Patents

Abstract

PURPOSE:To efficiently produce a plurality of surface conductive electron emitting elements arranged in a matrix in the way the elements have uniform properties. CONSTITUTION:Surface conductive electron emitting elements arranged in a 6X6 matrix are divided into 2X2 small matrices 1-9. Forming for each element is carried out by applying pulses for every 10ms and then raising 0.1V and repeating these processes until the pulse voltage reaches 10V. While pulses being applied to one matrix 1, 1ms pulses can be applied to other eight small matrices successively at a moment of 10ms which is an interval between pulses. That is, forming for elements 1-9 can be carried out in parallel. In the case a unit to which pulses are applied simultaneously is as compact as 2X2, uniform forming can be carried out for each element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron source and its application, such as an image forming apparatus such as a display device, and more particularly to an electron source having a large number of surface conduction electron-emitting devices and a forming method thereof.

[0002]

2. Description of the Related Art Conventionally, two types of electron emitters, a thermoelectron source and a cold cathode electron source, are known.

Cold cathode electron sources include a field emission type (hereinafter abbreviated as FE), a metal / insulating layer / metal type (hereinafter abbreviated as MIM), a surface conduction type emission element (hereinafter abbreviated as SCE), and the like.

As an example of the FE type, WPDyke & WWDol
an, "Field emission", Advancein Electron Physics
, 8,89 (1956), CASpindt, "PHYSICAL propertie
s of thin-film field emission cathodes with molybd
Enum cones ", J.Appl.Phys., 47, 5248 (1976) are known.

As an example of the MIM type, CAMead, "T
he tunnel-emission amplifier, J.appl.Phys., 32, (196
1) etc. are known.

Further, as an example of the SCE type, MIElin
Son, Radio Eng. Electron Pys., 10. (1965).

The SCE type utilizes a phenomenon in which electron emission occurs in a thin film having a small area formed on a substrate by flowing an electric current in equilibrium on the film surface.

As the surface conduction electron-emitting device, one using a SnO2 thin film by Erinson, etc., and one using an Au thin film (G. Dittmer: "Thin Solid") are used.
Films ", 9,319 (1972) In2O3 / SnO2 thin film (M.Hartwell and CGFonstad:" IEEE Trans.ED
Conf. ", 519 (1975), by a carbon thin film (Hiraki Araki et al .: Vacuum, Vol. 26, No. 1, p. 22 (1983)).

FIG. 23 shows the above-mentioned M. Hartwell device structure as a typical device structure of these surface conduction electron-emitting devices. In the figure, 501 is an insulating substrate. Reference numeral 502 denotes a thin film for forming an electron emitting portion, which is formed of a shaped metal oxide thin film formed by sputtering and the like, and the electron emitting portion 503 is formed by an energization process called forming described later. An electron emitting portion 503 is formed on the electron emitting portion forming thin film 504 and is called a thin film including the electron emitting portion.

Conventionally, in these surface conduction electron-emitting devices, the electron-emitting portion forming thin film 502 is formed before electron emission.
In general, the electron emission portion 503 is generally formed in advance by an energization process called forming. Here, the forming means that a voltage is applied to both ends of the electron emitting portion forming thin film 502 to locally destroy, deform or alter the electron emitting portion forming thin film 502 to make it into an electrically high resistance state. That is, the electron emitting portion 503 is formed.

In the electron emitting portion 503, a crack is generated in a part of the electron emitting portion forming thin film 502, and electrons are emitted from the vicinity of the crack. Hereinafter, the thin film for forming an electron emitting portion including the electron emitting portion 503 generated by forming is referred to as a thin film 504 including an electron emitting portion. The surface conduction electron-emitting device that has been subjected to the forming treatment is applied with a voltage to the thin film 504 including the above-mentioned electron-emitting portion and applies a current to the device,
The electrons are emitted from the electron emission unit 503 described above.

The above-mentioned surface conduction electron-emitting device has an advantage that a large number of devices can be arrayed over a large area because of its simple structure and easy manufacture. Therefore, various applications are being studied to make full use of this feature. Examples thereof include a charged beam source and a display device. An example of arraying a large number of surface conduction electron-emitting devices is an electron source in which surface conduction electron-emitting devices are arranged in parallel and a large number of rows in which both ends of each element are connected by wiring are arranged ( For example, Japanese Patent Laid-Open No. 1-031332 of the present applicant).

In particular, in image forming apparatuses such as display devices, in recent years, flat panel display devices using liquid crystal have been used in CRTs.
However, since it is not a self-luminous type, there is a problem that the viewing angle that must have a backlight is small. Therefore, development of a self-luminous display device has been desired. An image forming apparatus which is a display device in which a plurality of surface conduction electron-emitting devices are arranged and a phosphor which emits visible light by electrons emitted from the electron source are combined are
It is a self-luminous display device having a wide viewing angle (for example, USP 50668883 of the present applicant).

[0014]

Needless to say, high-definition and high-definition images are desired in various image forming panels to which the surface conduction electron-emitting device is applied, including the above-mentioned display device. To achieve this, the inventors have, for example,
We have tried a lot of surface conduction electron-emitting devices with simple matrix wiring. Therefore, a very large number of device arrays, each having several hundreds to several thousands of rows and columns, are required, and the device characteristics of each surface conduction electron-emitting device are desired to be uniform.

When attempting to form a large number of elements in parallel (for example, for each column) in this way, there arises a problem of damage to wiring and other portions due to an increase in current. In addition, the voltage drop due to the wiring resistance accompanying the increase in the amount of current causes a phenomenon in which the voltage applied to each element varies. It is conceivable that due to the influence of non-linearity at the time of forming the elements, a large difference occurs in the voltage pattern experienced by each element, and the element characteristics vary. Further, there is a problem that it takes a huge amount of time to increase the applied voltage one element at a time and perform forming.

The present invention has been made in view of the above problems, and in order to suppress variations in element characteristics during forming, a large number of currents are simultaneously and temporally lost while reducing the current flowing through each wiring. It is an object of the present invention to provide a forming method for forming without an electron, an electron source and an image forming apparatus by the method.

[0017]

In order to achieve the above object, the forming method of the present invention has the following constitution. That is, a method of forming an electron source in which a plurality of surface conduction electron-emitting devices are electrically connected to row-direction and column-direction wiring, wherein the devices are connected to a surface-conduction emission device to be subjected to a forming process. A forming voltage is applied to the element from the formed row direction and column wiring.

According to another aspect, the forming method of the present invention has the following configuration. That is, a method of forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, the surface conduction being selected by the plurality of row-direction wirings and column-direction wirings. The wiring is selected so that the number of the die-emitting devices is a predetermined number, pulses of a predetermined waveform are applied to the device at predetermined time intervals through the selected wiring, and the wiring is selected within the predetermined time interval. The application of the pulse is repeated until a predetermined time elapses while switching and selecting different wiring.

According to another aspect, the forming method of the present invention has the following configuration. That is, a method of forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, the surface conduction being selected by the plurality of row-direction wirings and column-direction wirings. Wirings are selected so that a predetermined number of die-emitting devices are provided, pulses of different voltages are applied to each of the predetermined number of devices at predetermined time intervals through the selected wirings, and the applied pulses are This is repeated until a predetermined number of times is applied to the surface conduction electron-emitting device.

The electron source of the present invention has the following structure. That is, a plurality of surface conduction electron-emitting devices are electron sources electrically connected to row-direction and column-direction wiring,
It is characterized in that a surface conduction electron-emitting device to be subjected to a forming treatment is manufactured by applying a forming voltage to the device through row-direction and column-direction wirings to which the device is connected.

According to another aspect, the electron source of the present invention has the following structure. That is, an electron source formed by forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, which is selected by the plurality of row-direction wirings and column-direction wirings. Wirings are selected so that a predetermined number of surface conduction electron-emitting devices are provided, pulses of a predetermined waveform are applied to the device at predetermined time intervals via the selected wirings, and the wirings are applied within the predetermined time interval. It is characterized by being manufactured by repeating the application of the pulse until a predetermined time elapses while switching the selection of and selecting different wiring.

According to another aspect, the electron source of the present invention has the following structure. That is, an electron source formed by forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, wherein the plurality of row-direction wirings and column-direction wirings are used. The wiring is selected so that the selected number of surface conduction electron-emitting devices are selected, and pulses of different voltages are applied to each of the specified number of devices at predetermined time intervals through the selected wiring, and the application is performed. It is characterized in that the pulse is repeatedly produced until each surface conduction electron-emitting device is applied a predetermined number of times.

The image forming apparatus of the present invention has the following structure. That is, an image forming apparatus having an electron source and a phosphor, comprising row-direction and column-direction wirings and surface-conduction-type emission elements, wherein the row-direction wirings and column-direction wirings, and the surface-conduction-type An electron source which is electrically connected to the emitting element and which is formed by applying a forming voltage to the surface conduction type emitting element to be subjected to the forming treatment by applying a forming voltage to the element from the row direction and the column wiring to which the element is connected; Control means for controlling the electrons emitted from the electron source in accordance with the image signal, and a phosphor that emits fluorescence by the electrons emitted from the electron source.

Further, in the forming method of the present invention which achieves the above object, a plurality of surface conduction electron-emitting devices are arranged in a matrix and the devices are electrically connected to the wirings in the row and column directions. Forming method of the electron source, wherein M × N or less elements to be formed within one boosting cycle among the elements arranged in M rows × N columns are divided into appropriate blocks, and Rows and columns corresponding to all surface conduction electron-emitting devices included in one block are selected and the same or different voltage is applied, and the selected wirings are sequentially changed corresponding to each block. (Scanning), if all the blocks are switched and returned to the first block is one scan, the voltage is boosted within one scan, every one scan, every plural scans, or at regular time intervals. Characterized by forming a plurality of elements within one boost cycle by.

Of the elements arranged in M rows × N columns, 1
For an element in one or more rows or one or more columns that you want to form in the boost cycle, specify the initial value of the voltage applied to the wiring corresponding to each element, the boost rate, or the time to start applying the voltage. By changing the voltage, a plurality of elements are formed in one boosting cycle by boosting while generating a potential difference between the elements connected to the same wiring in the row direction or the column direction.

An electron source according to the present invention for achieving the above object is an electron source in which a plurality of surface conduction electron-emitting devices are arranged in rows and columns, and a plurality of row-direction and column-direction wirings and It is characterized by comprising wiring in the row direction, wiring in the column direction, and connection means for electrically connecting the element.

[0027]

With the above structure, the elements are arranged on the matrix by the wiring in the row direction and the wiring in the column direction.

In one boosting cycle, the element to be formed is divided into blocks, and voltage is applied while scanning the block, so that only the wiring corresponding to the element in the block that is selected instantaneously is formed. A current flows, and the current in each wiring can be significantly reduced as compared with the case where a forming voltage is applied in parallel to the element. In addition, by appropriately selecting the pulse interval of the forming voltage and the number of divisions of the block, there is no time loss as compared with the case where the forming voltage is applied in parallel to the element, or compared with the case of boosting and forming each element individually. It can save a lot of time.

The elements connected to the selected wiring in the row direction or the column direction reach the final forming voltage with a time lag due to the potential difference generated between the elements, so that the elements are formed in parallel at the same potential. Compared with the case, the maximum current flowing through the selected wiring in the row direction or the column direction can be reduced. Further, since the forming voltage is reached with a time lag, the variation in the voltage pattern experienced by each element is smaller than that when forming the elements in parallel at the same potential, and uniform forming is possible.

The present invention relates to an electron source provided with a large number of surface conduction electron-emitting devices and an image forming apparatus using the same, and exerts the above-mentioned action regardless of the material, structure, etc. of the surface conduction device provided therein. be able to.

The inventors of the present invention have found that among the surface conduction electron-emitting devices, it is preferable to form the electron-emitting portion or its peripheral portion from a fine particle film in terms of electron-emitting characteristics. Also, from the viewpoint of manufacturing, it is noted that the fine particle film is easy to form and is suitable for forming a large number of particles over a large area.

Therefore, regarding a preferred embodiment or embodiment of the present invention to be described, an apparatus provided with a large number of surface conduction electron-emitting devices formed of a fine particle film will be described.

[0033]

【Example】

[First Embodiment] A preferred embodiment of the present invention will be described below with reference to the accompanying drawings.

First, the outline and manufacturing method of the surface conduction electron-emitting device according to this embodiment will be described.

In particular, the basic construction and manufacturing method of the element according to the present embodiment by the applicant of the present invention, its characteristics (for example, with reference to Japanese Patent Application Laid-Open No. 2-56822), and the inventors of the present invention diligently studied. The characteristics that are found as a result and serve as the principle of the present invention will be outlined.

<Basic Structure of Surface Conduction Type Emitting Device> The structure of the surface conduction type emitting device according to this embodiment and the features of the manufacturing method thereof are as follows. Note that the reference numbers shown below are the numbers given in FIG. 14 described later.

1) The thin film 202 for forming an electron-emitting portion before energization processing called forming is formed by dispersing a dispersion of fine particles, and a thin film formed of fine particles, or fine particles formed by heating and burning an organic metal or the like. It is basically composed of fine particles such as a thin film.

2) The thin film 204 including the electron emitting portion after energization processing called forming, including the electron emitting portion 203, is basically composed of fine particles.

As the insulating substrate 201, quartz glass,
Glass with reduced content of impurities such as Na, soda lime glass,
Examples thereof include a glass substrate obtained by laminating SiO2 formed on a soda-lime glass by a sputtering method and ceramics such as alumina.

There are two basic configurations of the surface conduction electron-emitting device according to this embodiment, a planar type and a vertical type. First, the planar surface conduction electron-emitting device will be described.

14 (a) and 14 (b) are a plan view and a sectional view, respectively, showing the structure of a basic planar surface conduction electron-emitting device according to this embodiment. Using FIG. 14,
The basic configuration of the device according to this example will be described. Figure 1
In FIG. 4, 201 is an insulating substrate, 205 and 206 are device electrodes, 204 is a thin film including an electron emitting portion, and 203 is an electron emitting portion. Reference numeral 202 denotes an electron emission portion forming thin film, which is a thin film before the electron emission portion 203 is formed.

Any material may be used as the material of the opposing element electrodes 205 and 206 as long as it has conductivity. For example, Ni, Cr, Au, Mo,
Metal or alloy such as W, Pt, Ti, Al, Cu, Pd, etc. and printed conductor composed of metal or metal oxide such as Pd, Ag, Au, RuO2, Pd-Ag or glass and glass, transparent such as In2 O3 Examples thereof include conductors and semiconductor materials such as polysilicon.

The element electrode interval L1 is several hundreds of angstroms to several hundreds of micrometers, and the photolithography technology that is the basis of the method of manufacturing the element electrodes, that is, the performance of the exposure machine and the etching method, and the application between the element electrodes. It is set according to the voltage and the electric field strength capable of emitting electrons, but it is preferably from 1 micrometer to 10 micrometers. Device electrode length W1, device electrodes 205, 206
The film thickness d is appropriately designed in consideration of the resistance value of the electrode, the connection with the X and Y wirings described above, and the arrangement of a large number of arranged electron sources. Normally, the element electrode length W1 is several micrometers. More than a few hundred micrometers, the device electrode 205,
The film thickness d of 206 is preferably several micrometers to several hundred angstroms.

Between the opposing device electrodes 205 and 206 provided on the insulating substrate 201 and between the device electrodes 20.
5, a thin film 204 including an electron emitting portion installed on 206
Includes an electron emission unit 203. FIG. 14B shows the case where the thin film 204 including the electron emitting portion is provided on the device electrodes 205 and 206, but the thin film 204 including the electron emitting portion may not be provided on the device electrodes 205 and 206. . That is, after stacking the electron emission portion forming thin film 202 on the insulating substrate 201, the opposing device electrodes 205, 2
This is the case where the electrodes are laminated in the order of 06 electrodes.

Further, depending on the manufacturing method, the entire space between the opposing device electrodes 205 and 206 may function as an electron emitting portion. The film thickness of the thin film 204 including the electron emitting portion is from several angstroms to several thousand angstroms,
The thickness is preferably 10 angstroms to 200 angstroms, and is appropriately set depending on the resistance value between the device electrodes 205 and 206, the particle size of the conductive fine particles of the electron emitting portion 203, the energization processing condition described later, and the like. Its resistance is 1
A sheet resistance value of 0 ³ to 10 ⁷ Ω / □ is shown.

Specific examples of the material forming the thin film 204 including the electron emitting portion include Pd, Ru, Ag, Au,
Ti, In, Cu, Cr, Fe, Zn, Sn, Ta,
Metals such as W and Pb, PdO, SnO2, In2O3, Pb
Oxides such as Sb2O3, HfB2, ZrB2, LaB
Borides such as 6, CeB6, YB4, GdB4, Tic, Zr
Carbides such as c, HfC, TaC, SiC, WC, Ti
Examples thereof include nitrides such as N, ZrN and HfN, semiconductors such as Si and Ge, carbon, AgMg, NiCu, Pb and Sn and the like, which are composed of fine particle films.

The fine particle film described here is a film in which a plurality of fine particles are aggregated, and its fine structure is not only a state in which the fine particles are individually dispersed but also a state in which the fine particles are adjacent to each other or overlap each other (islands). (Including the shape).

The electron emitting portion 203 is composed of a large number of conductive fine particles having a particle size of several angstroms to several thousand angstroms, preferably 10 angstroms to 200 angstroms, and the film thickness of the thin film 204 including the electron emitting parts and the energization process described later. Depends on the manufacturing method such as conditions,
It is set appropriately. This is the same as some or all of the elements of the material forming the thin film 204 including the electron emitting portion.

<Basic Manufacturing Method> Various methods are conceivable as a method for manufacturing the surface conduction electron-emitting device having the electron emitting portion 203, and one example thereof is shown in FIG. 20
Reference numeral 2 is a thin film for forming an electron emitting portion, and examples thereof include a fine particle film.

The manufacturing method will be described below step by step with reference to FIGS. 14 and 15.

1) After thoroughly cleaning the insulating substrate 201 with a detergent, pure water and an organic solvent, after depositing a device electrode material by a vacuum vapor deposition technique, a sputtering method or the like, on the surface of the insulating substrate 201 by a photolithography technique. Element electrode 2
05 and 206 are formed (FIG. 15A).

2) Between the device electrodes 205 and 206 provided on the insulating substrate 201, and the device electrode 20.
An organic metal solution is applied on the insulating substrate on which 5 and 206 are formed and left to stand to form an organic metal thin film.
The organometallic solution means Pd, Ru, Ag, A
u, Ti, In, Cu, Cr, Fe, Zn, Sn, T
It is a solution of an organic compound whose main element is a metal such as a, W, or Pb. After that, the organic metal thin film is heated and baked, and is patterned by lift-off, etching, etc. to form a thin film 202 for forming an electron emission portion (FIG. 15B).

Although the coating method of the organic metal solution is used here, the present invention is not limited to this, and the vacuum deposition method,
It may be formed by a sputtering method, a chemical vapor deposition method, a dispersion coating method, a dipping method, a spinner method, or the like.

3) Subsequently, energization processing called forming is performed. Here, when the energization process of the voltage between the device electrodes 205 and 206 is performed by a pulsed voltage by a power source (not shown), the electron emitting portion 203 having a changed structure is formed at the site of the electron emitting portion forming thin film 202. (Fig. 15
(C)).

By this energization treatment, the thin film 202 for electron emission formation is locally destroyed, deformed or altered. The portion of which the structure is changed by forming is called an electron emitting portion 203. As described above, the present inventors have observed that the electron emitting portion 203 is composed of conductive fine particles.

In FIG. 16, T1 and T2 are the pulse width and pulse interval of the voltage waveform, and T1 is 1 microsecond to 10 μs.
Millisecond, T2 is 10 microsecond to 100 millisecond, and the peak value of the triangular wave (peak voltage during forming) is 4V to 10
About V, the forming process was appropriately selected within a range of several tens of seconds in a vacuum atmosphere.

When forming the electron-emitting portion described above,
The forming process is performed by applying the triangular wave pulse between the electrodes of the element, but the waveform applied between the electrodes of the element is not limited to the triangular wave, and a desired waveform such as a rectangular wave may be used. Further, the crest value, the pulse width, the pulse interval, etc. are not limited to the above values, and a desired value can be selected as long as the electron emitting portion is well formed.

<Regarding Basic Characteristics> A method for evaluating the characteristics of the surface conduction electron-emitting device according to this embodiment produced by the above-described device structure and manufacturing method will be described with reference to FIG.

FIG. 17 is a schematic configuration diagram of a measurement / evaluation apparatus for measuring the electron emission characteristics of the surface conduction electron-emitting device having the configuration shown in FIG. In FIG. 17, 201
Is an insulating substrate, 205 and 206 are device electrodes, 204
Is a thin film including an electron emitting portion, and 203 is an electron emitting portion.
Reference numeral 231 denotes a power supply, which applies a device voltage Vf to the device.
An ammeter 230 measures the device current If flowing through the thin film 204 including the electron emitting portion between the device electrodes 205 and 206. Reference numeral 234 denotes an anode electrode, which is an electron emitting portion 203.
The emission current Ie emitted further is captured. A high voltage power supply 233 applies a voltage to the anode electrode 234. Two
Reference numeral 32 denotes an ammeter, which emits an emission current I from the electron emission unit 203.
e is measured.

The device current If of the surface conduction electron-emitting device,
In measuring the emission current Ie, the device electrodes 205, 2
A power source 231 and an ammeter 230 are connected to 06, and an anode electrode 234 connecting the power source 233 and the ammeter 232 is arranged above the surface conduction electron-emitting device. Further, the surface conduction electron-emitting device and the anode electrode 234 are installed in a vacuum device 235, and the vacuum device 235 is equipped with an exhaust pump (not shown) and equipment necessary for the vacuum device, so that the device can be operated under a desired vacuum. The device can be measured and evaluated.

The voltage of the anode electrode 234 is 1 kV.
-10 kV, and the distance H between the anode electrode 234 and the surface conduction electron-emitting device was measured in the range of 3 mm to 8 mm.

In the surface conduction electron-emitting device in which the conductive fine particles are dispersed in advance, a part of the basic manufacturing method of the basic device structure of the present embodiment may be changed.

FIG. 18 shows a typical example of the relationship between the emission current Ie and the device current If and the device voltage Vf measured by the measurement / evaluation apparatus shown in FIG. Note that FIG. 18 is shown in arbitrary units and has three characteristics with respect to the emission current If.

First, in the present device, when a device voltage higher than a certain voltage (called threshold voltage, Vth in FIG. 18) is applied, the emission current Ie rapidly increases, while the threshold voltage Vth is increased. In the following, the emission current Ie is hardly detected. That is, it is a non-linear element having a clear threshold voltage Vth with respect to the emission current Ie.

Secondly, the emission current Ie depends on the device voltage Vf. Further, there is a region where the electron emission current Ie is almost proportional to the device current If.

Thirdly, the emitted charges captured by the anode electrode 234 depend on the time for which the device voltage Vf is applied.
That is, the amount of charge captured by the anode electrode 234 is
It can be controlled by the time for which the element voltage Vf is applied.

Since the SCE according to this embodiment has the above characteristics, it can be expected to be applied to various fields. For example, in the case of forming an image forming panel, the brightness of a pixel is determined by the total amount of energy of electrons with which a phosphor is irradiated within a unit time. Since the accelerating voltage Va applied between the electron source and the anode 234 is applied almost constant to any pixel, the brightness of the pixel is determined by the amount of electrons emitted from the electron source and the electron emission time.

Next, a vertical type surface conduction electron-emitting device, which is a surface conduction electron emission device having another structure according to this embodiment, will be described.

FIG. 19 is a drawing showing the basic structure of a vertical surface conduction electron-emitting device according to this embodiment. In FIG. 19, 251 is an insulating substrate, 255 and 256 are element electrodes, 254 is a thin film including an electron emitting portion, 253 is an electron emitting portion, and 257 is a step forming portion. The electron emission unit 25
The position of No. 3 changes depending on the thickness of the step forming portion 257, the manufacturing method, the thickness of the thin film 254 including the electron emitting portion, the manufacturing method, etc., and is not limited to the position shown in FIG.

Insulating substrate 251, device electrodes 255 and 25
6, a thin film 254 including an electron emitting portion, an electron emitting portion 253
Is composed of the same material as that of the above-mentioned planar surface conduction electron-emitting device. Therefore, the thin film 254 including the step forming portion 257 and the electron emitting portion, which characterizes the vertical surface conduction electron-emitting device, will be described in detail here.

The step forming portion 257 is made of an insulating material such as SiO 2 formed by a vacuum deposition method, a printing method, a sputtering method or the like. The thickness of the step forming portion 257 corresponds to the device electrode distance L1 of the flat surface conduction electron-emitting device described above,
It is several tens of micrometers rather than hundreds of angstroms. The thickness of the step forming portion 257 is set by the manufacturing method of the step forming portion 257, the voltage applied between the device electrodes, and the electric field strength capable of emitting electrons, but is preferably 10 μm to 1,000 angstroms.

Since the thin film 254 including the electron emitting portion is formed after the device electrodes 255 and 256 and the step forming portion 257 are formed, it is laminated on the device electrodes 255 and 256, and in some cases, the device electrodes 255 and 256 are formed. It is formed into a desired shape except for a part of the overlap which is responsible for the electrical connection. In addition, the film thickness of the thin film 254 including the electron emitting portion is often different between the film thickness at the step portion and the film thickness of the portion stacked on the element electrodes 255 and 256 depending on the manufacturing method, Generally, the film thickness of the step portion is thin. As a result, as compared with the above-mentioned planar surface conduction electron-emitting device, the electron-emitting portion 3 is often subjected to the energization treatment more easily.

<Matrix> Next, an electron source in which the above-mentioned surface conduction electron-emitting devices are arranged in a matrix will be described.

The structure of the electron source substrate will be described with reference to FIG. In the figure, 271 is an insulating substrate, 272.
Is an X-direction wiring, 273 is a Y-direction wiring, 274 is a surface conduction electron-emitting device, and 275 is a connection. The surface conduction electron-emitting device 274 may be either the above-mentioned plane or vertical type.

In the figure, the insulating substrate 271 is the above-mentioned glass substrate or the like, and its size and its thickness are
To maintain the number of surface conduction electron-emitting devices installed on the insulating substrate 271 and the designed shape of each device, and to hold the containers in a vacuum when forming a part of the container when the electron source is used. It is set as appropriate depending on the conditions, etc.

The m X-direction wirings 272 are DX1 and DX.
2, ... DXm, which is formed on the insulating substrate 271 by a vacuum deposition method, a printing method, a sputtering method, or the like, and is made of a conductive metal having a desired pattern. Material, film thickness,
The wiring width is set. The Y-direction wiring 273 has DY1, D
Y2, ... DYn consisting of n wirings, and X-direction wiring 272
Similarly, a vacuum evaporation method, a printing method, a sputtering method or the like is used to form a desired pattern made of a conductive metal or the like, so that a voltage as uniform as possible is supplied to a large number of surface conduction electron-emitting devices. , Film thickness, wiring, etc. are set. These m X-direction wirings 272 and n Y-direction wirings 273
An inter-layer insulating layer (not shown) is installed between the two, and electrically separated to form a matrix wiring (where m and n are
Both are positive integers).

The interlayer insulating layer (not shown) is SiO 2 or the like formed by a vacuum vapor deposition method, a printing method, a sputtering method or the like, and has a desired shape of the entire surface or a part of the insulating substrate 271 on which the X-direction wiring 272 is formed. And is formed in the X direction wiring 27.
2 and the Y-direction wiring 273 are drawn out as external terminals.

In the above example, m X-direction wirings 27 are used.
2 has been described with an example in which n Y-direction wirings 273 are installed via an interlayer insulating layer, but m X-direction wirings 272 are provided on the n Y-direction wirings 273 via an interlayer insulating layer. It may be installed.

Further, similarly to the above, as the opposing electrodes (not shown) of the surface conduction electron-emitting device 274, there is a connection 275 made of a conductive metal or the like formed by a vacuum deposition method, a printing method, a sputtering method or the like. . That is, the surface conduction electron-emitting device 274 is electrically connected to the m X-direction wirings 272 and the n Y-direction wirings 273 by the connection 275.

It should be noted that m directional wirings 272, n Y-directional wirings 273, and connecting wires 275 which are element electrodes facing each other.
The conductive metal may have the same or partial constituent elements, or may have different constituents.
i, Cr, Au, Mo, W, Pt, Ti, Al, Cu,
Metals or alloys such as Pd and Pd, Ag, Au, R
It is appropriately selected from a printed conductor composed of a metal or metal oxide such as uO2 or Pd-Ag and glass, a transparent conductor such as In2O3-SnO2 and a semiconductor material such as polysilicon. The surface conduction electron-emitting device may be formed either on the insulating substrate 271 or on an interlayer insulating layer (not shown).

Further, the X-direction wiring 272 is electrically connected to a scanning signal generating means (not shown) for applying a scanning signal for arbitrarily scanning a row of surface conduction electron-emitting devices 274 arranged in the X direction. It is connected to the. On the other hand, the surface conduction electron-emitting devices 27 arranged in the Y direction are connected to the Y-direction wiring 273.
It is electrically connected to a modulation signal generating means (not shown) for applying a modulation signal for arbitrarily modulating each of the four rows. Further, the drive voltage applied to each element of the surface conduction electron-emitting device is supplied as a difference voltage between the scanning signal and the modulation signal applied to the element.

<Basic Structure of Image Forming Apparatus> Next, an image forming apparatus that performs display using the electron source created as described above will be described with reference to FIGS. 21 and 22. FIG. 21 is a basic configuration diagram of the image forming apparatus.
FIG. 4 is a diagram showing a fluorescent film.

271 is an insulating substrate, and the insulating substrate 2
The electron-emitting device is formed on 71 as described above. Hereinafter, this is referred to as an electron source substrate. 281 is a rear plate on which the electron source substrate is fixed, and 286 is the glass substrate 2.
The face plate has a fluorescent film 284 and a metal back 285 formed on the inner surface of 83. 282 is a support frame, and the rear plate 281 and the face plate 28
6 is sealed with frit glass or the like to form a peripheral device 288.

In the above structure, the peripheral device 288 is composed of the face plate 286, the support frame 282, and the rear plate 281, but the rear plate 281 is provided mainly for the purpose of reinforcing the strength of the electron source substrate. If the electron source substrate itself has sufficient strength, a separate rear plate 2
81 is unnecessary, and the supporting frame 282 may be directly sealed to the electron source substrate, and the face plate 286, the supporting frame 282, and the electron source substrate may constitute the peripheral device 288.

FIG. 22 is a diagram showing a fluorescent film. In the case of monochrome, the fluorescent film 284 is composed of only the phosphor, but in the case of a color fluorescent film, it is composed of a black conductive material 291 called a black stripe or a black matrix depending on the arrangement of the phosphor and a phosphor 292. .

The purpose of providing the black stripes and the black matrix is to make the mixed colors and the like inconspicuous by making the portions of the three primary color phosphors, which are required for color display, separate between the phosphors, and the phosphor film 284. This is to suppress the deterioration of the contrast due to the reflection of external light. The material for the black stripes and the black matrix is not limited to the commonly used material containing graphite as a main component, but is not limited to this as long as it is a material that is electrically conductive and has little light transmission and reflection.

As a method for applying the phosphor to the glass substrate 283, a precipitation method or a printing method is used regardless of monochrome or color.

A metal back 285 is usually provided on the inner surface of the fluorescent film 284. The purpose of the metal back is to allow the light emitted from the phosphor to the inner surface side to be emitted from the face plate 28.
It is to improve the brightness by mirror-reflecting to the 6 side, to act as an electrode for applying an electron beam acceleration voltage, to protect the phosphor from damage due to the collision of negative ions generated in the peripheral device, and the like. .

The metal back 285 is further provided with a fluorescent film 28.
4 is produced, a smoothing process (usually called filming) is performed on the inner surface of the fluorescent film 284, and then Al is vacuum-deposited.

The face plate 286 may be provided with a transparent electrode (not shown) on the outer surface side of the fluorescent film 284 in order to further enhance the conductivity of the fluorescent film 284. When performing the above-mentioned sealing, in the case of a color, the phosphors of the respective colors and the electron-emitting devices have to correspond to each other, so that sufficient alignment is performed.

The peripheral device 288 is provided with an exhaust pipe (not shown),
A vacuum degree of about 10 ^-6 [torr] is applied, and a peripheral device 288 is used.
Is sealed.

The terminals outside the container DOX1 to DOXm and DOY
A voltage was applied between the device electrodes 205 and 206 through 1 to DOYn, and the above-mentioned forming was performed to form the electron emitting portion 203, thereby manufacturing an electron emitting device. Also, the peripheral device 288
In some cases, a getter process is performed in order to maintain the degree of vacuum after sealing. Immediately before or after sealing the peripheral device 288, a getter arranged at a predetermined position (not shown) in the peripheral device 288 is heated by a heating method such as resistance heating or high frequency heating to perform vapor deposition. This is a process for forming a film. The getter usually has Ba or the like as a main component, and is, for example, 1 × 10 ⁻⁵ or 1 × 10 ⁵ due to the absorption effect of the vapor deposition film.
^It maintains a vacuum of ^-7 [torr].

In the image forming apparatus according to the present embodiment completed as described above, each of the electron-emitting devices has an external terminal DOX1 to DOXm, DOY1 to DOYn.
Through the high voltage terminal Hv, a high voltage of several kV or more is applied to the metal back 285 or the transparent electrode (not shown) to accelerate the electron beam and collide with the fluorescent film 284. An image is displayed by exciting and emitting light.

The configuration described above is a schematic configuration necessary for producing a suitable image forming apparatus used for display and the like, and the detailed parts such as the material of each member are not limited to those described above. , Appropriately selected to suit the purpose of image formation.

Further, according to the idea of the present invention, the light emitting source is not limited to the image forming apparatus suitable for use in display, but is a light emitting source which is an alternative to the light emitting diode of the optical printer including the photosensitive drum and the light emitting diode. As the above, the above-mentioned image forming apparatus can be used. At this time, the above-mentioned m X
By appropriately selecting the directional wiring 272 and the n Y-directional wirings 273, it can be applied not only as a line emission source but also as a two-dimensional emission source.

Although the basic structure and manufacturing method of the surface conduction electron-emitting device have been described above, according to the idea of the present invention,
The invention is not limited to the above-described configuration and the like, and can be applied to an image forming apparatus such as an electron source and a display device described later.

<Forming> FIG. 1 is a block diagram showing a schematic configuration of an electric circuit for performing forming in this embodiment. In FIG. 1, reference numeral 9 denotes a surface conduction electron-emitting device, which is formed by performing a forming process on a thin film 9a for forming an electron emitting portion to form a thin film including an electron emitting portion. The surface conduction electron-emitting devices 9 are arranged in a matrix of m × n, and constitute an electron source 10 (hereinafter referred to as an electron source 10) including a large number of surface conduction electron-emitting devices 9.

Reference numerals 7 and 8 are a pulse generating power supply and a control switching circuit, respectively. The pulse generation power source and control switching circuit 7 includes a switch element for switching whether to apply a forming pulse to the row-direction terminals DY1 to DYn, to set it to the ground or to set it in a floating state, and to connect the row-direction terminals DY1 to DYn. It comprises a switch element for selecting DYn and a circuit for controlling the switching operation thereof and the pulse height, width, period, generation timing and the like. The pulse generating power supply and control switching circuit 8 has the same function as the pulse generating power supply and control switching circuit 7 in the column direction. Further, the pulse generating power source and the control switching circuits 7 and 8 can simultaneously select a plurality of terminals.

These two control switching circuits can perform pulse generation / switching in synchronization with each other.

First, a method of selecting the wiring connected to the surface conduction electron-emitting device to which a voltage is applied will be described with reference to FIGS. 1 and 2. FIG. 2 is a diagram in which a 6 × 6 matrix is extracted from the entire matrix of the electron source 10. For the sake of explanation, in order to distinguish each surface-conduction type electron-emitting device, the position is indicated by (X, Y) coordinates such as D (1,1), D (1,2) or D (6,6).

For example, when a voltage is applied to the surface conduction electron-emitting device of D (3, 2) in FIG. 2, the terminal DY2 and the terminal DX3 are selected by the pulse generating power supply and the control switching circuits 7 and 8 and both of them are selected. A forming pulse is applied between them, and the other terminals are in a floating or ground state. In this case, since it is only necessary that a desired voltage is applied to the two selected terminals, one may be grounded or both may be applied with a potential.

In the forming process, T1 (pulse width) in FIG. 16 is 1 millisecond and T2 (pulse interval) is applied to each element.
Applies a triangular wave of 10 milliseconds, the step-up rate of the peak value is 0.1 V per second, and about 1 × 10 ⁻⁶ [tor]
r] in a vacuum atmosphere for 100 seconds, that is, up to 10V.

Next, using the forming method of the present embodiment, this 6
A method of forming 36 elements in the × 6 matrix within one boosting cycle will be described in detail with reference to FIGS. 2 and 3. First, four wirings DX1, DX2, DY1, DY2 are selected, and D (1,1), D (1,2), D (2,
A triangular wave voltage having a wave height of 0.1 V and a pulse width of 1 millisecond is applied to the four elements 1) and D (2,2) (four elements in the block of FIG. 2). When one pulse has been applied (1 in the case of this embodiment)
(Milliseconds later), then DX1 and DX2 remain DY1,
Select DY3 and DY4 instead of DY2, and select D (1,
4) 3), D (1,4), D (2,3), D (2,4)
Similar pulse voltages are applied to the elements (4 elements in the block of FIG. 2). This process is repeated one after another, and the entire device is divided into 9 blocks each having 4 elements (blocks in FIG.
), And the selection wiring is switched 9 times during the pulse interval (10 milliseconds in this embodiment). While continuing such scanning, the wave height of the applied pulse is increased by 0.1 V to 10 V every one second. FIG. 3 shows the pulse voltage applied to the elements of each block when time is plotted on the horizontal axis.

If one block consists of 6 × 6 elements, 1
FIG. 25 shows a control procedure for forming blocks.
Vp is the wave height of the pulse applied to the element, i is the subscript of the column direction wiring DX, and j is the subscript of the row direction wiring DY.

First, the initial value of the pulse height is set to 0.1.
It is set to [V], and the wirings in the row and column directions to be selected first are set to 1 and 2. After that, a voltage is applied to the selected wiring, and a triangular pulse having a wave height Vp is applied to the element to be formed for 1 ms. At this time, the elements to which the pulse Vp is applied are D (i, j), D (i, j + 1), D (i + 1,
j) and D (i + 1, j + 1). afterwards,
In order to determine whether or not the pulse application to the 6 elements in the row direction is completed, it is determined whether or not j = 3. If j = 3 is not satisfied, 1 is added to j to select the next block adjacent in the row direction. If the last element in the row direction, that is, DY5 and DY6, is selected, it is determined whether i = 3 or not to determine whether the pulse application to the six elements in the column direction has been completed. Unless i = 3, there are still unprocessed blocks, so i
Add 1 to. If it is also the last block in the column direction,
Since the pulse application with the same pulse height is completed for all the elements in the 6 × 6 matrix, it is tested whether 1 second has elapsed after the application of the same pulse, and if not, the same pulse height as before Give a pulse of. If 1 second has passed, 0.1 if not completed up to Vp = 10 [V]
[V] The applied voltage is increased and the pulse application is repeated from the first block. It should be noted that the determination of whether 1 second has elapsed may be determined that 1 second has elapsed in the next loop, not after the elapsed time. This procedure is 6 for DX1 to DX6 and DY1 to DY6.
The procedure is for a × 6 matrix, but if the rows and columns are shifted by 6 in each direction, the entire electron sources on the matrix can be formed by the same procedure.

According to this method, each element and each wiring are formed under exactly the same conditions as when only four elements forming one group in the block are simultaneously formed.
Moreover, it is possible to form an area nine times as large as one boosting cycle. In other words, 6 elements of 1 line are paralleled 6 times (6
Each wiring current is reduced to one-third and the time is reduced to one-sixth as compared with the case of forming in the boosting cycle).

That is, by performing the forming by this method, the variation due to the forming of the four elements in the block and the variation due to the difference in the voltage drop due to the wiring resistance between the blocks can be suppressed to a sufficiently small width that can be ignored. Therefore, it is possible to uniformly form a plurality of elements while significantly reducing the time required for forming.

In this embodiment, 6 × in the m × n matrix is used.
Forming is performed in one boost cycle with 6 matrix 36 elements as one unit. The upper limit of the number of elements in the block is determined by the allowable current amount, and the upper limit of the number of blocks is determined by the pulse interval applied during forming. Is not limited to the above. Further, the blocks do not have to be square, the elements forming the blocks do not have to be adjacent to each other, and a potential difference may be applied to the elements in the block.

<Structure and Manufacturing Process of Electron Source Substrate> Next, the electron source 10 manufactured by the forming method of this embodiment will be further described.

A plan view of a part of the electron source 10 is shown in FIG.
10 is a sectional view taken along the line AA 'in FIG. 10, and FIGS. 11 and 12 are diagrams showing the manufacturing method thereof. However, FIG. 10 and FIG.
1, the same symbols in FIG. 12 indicate the same parts.
Here, 1 is a substrate, 72 is an X-direction wiring (also referred to as a lower wiring) corresponding to DXm in FIG. 7, 73 is a Y-direction wiring (also referred to as an upper wiring) corresponding to DYn in FIG. 7, and 4 is an electron emitting portion. Including thin films, 5 and 6 are device electrodes, 111 is an interlayer insulating layer, 11
Reference numeral 2 is a contact hole for electrically connecting the device electrode 5 and the lower wiring 72.

Next, the manufacturing method will be specifically described in the order of steps with reference to FIGS.

Step-a On a substrate 1 in which a 0.5-micron-thick silicon oxide film was formed on a cleaned soda-lime glass by a sputtering method, vacuum deposition was performed to deposit Cr having a thickness of 50 Å and a thickness of 6000.
After sequentially stacking Au of Angstrom, a photoresist (AZ1370 Hoechst) is spin-coated by a spinner and baked, and then a photomask image is exposed and developed to form a resist pattern of the lower wiring 72. Au / C
The lower deposited film 72 having a desired shape is formed by wet etching the r deposited film ((a) of FIG. 11).

Step-b Next, an interlayer insulating layer 111 made of a silicon oxide film having a thickness of 1.0 micron is deposited by the RF sputtering method (FIG. 11).
(B)).

Step-c Contact hole 1 is formed in the silicon oxide film deposited in Step b.
A photoresist pattern for forming 12 is formed, and the interlayer insulating layer 111 is etched using this as a mask to form a contact hole 112 (FIG. 11C).
The etching is performed by RIE (React using CF4 and H2 gas).
ive Ion Etching) method.

Step-d After that, a pattern (RD-2000N-41 manufactured by Hitachi Chemical Co., Ltd.) is formed on the device electrodes 5 and the gap G between the device electrodes is formed, and Ti having a thickness of 50 Å and a thickness of 50 Å are formed by a vacuum deposition method. 1000 Å of Ni was sequentially deposited. The photoresist pattern is dissolved in an organic solvent, the Ni / Ti deposition film is lifted off, the device electrode spacing G is set to 3 microns, and the device electrode width (corresponding to W1 in FIG. 14 (a)) is set to 300 μm. Element electrodes 5 and 6 were formed on the substrate (FIG. 11 (d)).

Step-e After forming the photoresist pattern of the upper wiring 73 on the device electrodes 5 and 6, Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially deposited by vacuum vapor deposition, and unnecessary by lift-off. By removing the portion, the upper wiring 73 having a desired shape was formed ((e) of FIG. 12).

Step-f FIG. 13 shows a part of a mask plan view of the thin film 4 for forming the electron-emitting portion of the electron-emitting device relating to this step. A mask having an inter-element electrode gap L1 and an opening in the vicinity thereof,
With this mask, Cr with a film thickness of 1000 angstrom
The film 121 is deposited and patterned by vacuum evaporation, and organic Pd (ccp4230 manufactured by Okuno Chemical Industries Co., Ltd.) is formed thereon.
Was spin-coated with a spinner and heated and baked at 300 ° C. for 10 minutes ((f) in FIG. 12). Further, the film thickness of the electron emission portion forming thin film 4 formed of fine particles of Pd as a main element thus formed was 100 angstrom, and the sheet resistance value was 5 × 10 ⁴ Ω / □. Incidentally, the fine particle film described here is a film in which a plurality of fine particles are gathered as described above, and as a fine structure, not only the fine particles are individually dispersed and arranged, but also the fine particles are adjacent to each other or overlap each other. It refers to a film in a state (including an island shape), and the particle size thereof means a diameter of fine particles whose particle shape can be recognized in the above state.

Step-g The Cr film 121 and the electron emission part forming thin film 4 after firing were etched with an acid etchant to form a desired pattern ((g) of FIG. 12).

Step-h A pattern was formed such that a resist was applied to portions other than the contact hole 112, and Ti having a thickness of 50 Å and Au having a thickness of 5000 Å were sequentially deposited by vacuum evaporation. Contact holes 112 were buried by removing unnecessary portions by lift-off ((h) of FIG. 12).

Through the above steps, the lower wiring 72, the interlayer insulating layer 111, the upper wiring 73, the element electrode 5, and the insulating substrate 1 are formed on the insulating substrate 1.
6. The electron emission part forming thin film 4 was formed.

<Description of Display Device> Next, an example in which a display device is configured by using the electron source substrate created as described above will be described with reference to FIGS. 21 and 22.

After fixing the substrate 271 on which a large number of plane type surface conduction electron-emitting devices have been formed as described above on the rear plate 281, the face plate 286 (fluorescent on the inner surface of the glass substrate 283) is placed 5 mm above the substrate 1. The frame 284 and the metal back 285 are formed)
2, the face plate 286, the support frame 28
2. Frit glass is applied to the joint portion of the rear plate 281 and 400 ° C to 500 ° C in the air or nitrogen atmosphere.
It was sealed by baking at 10 ° C. for 10 minutes or more (FIG. 21). Also. The frit glass was also used to fix the substrate 1 to the rear plate 281. In FIG. 21, 274 is an electron-emitting device, and 272 and 273 are device wirings in the X direction and the Y direction, respectively.

In the case of monochrome, the fluorescent film 284 is made of only fluorescent material, but in this embodiment, the fluorescent material adopts a stripe shape, a black stripe is formed first, and the fluorescent material of each color is applied to the gap. Then, the fluorescent film 284 was created. As a material for the black stripe, a material which is commonly used and whose main component is graphite was used. The method of applying the phosphor to the glass substrate 283 was a slurry method.

A metal back 285 is usually provided on the inner surface side of the fluorescent film 284. This metal back was prepared by performing a smoothing treatment (usually called filming) on the inner surface of the phosphor film after forming the phosphor film, and then vacuum-depositing Al.

The face plate 286 may be provided with a transparent electrode (not shown) on the outer surface side of the fluorescent film 284 in order to further enhance the conductivity of the fluorescent film 284. However, in this embodiment, only a metal back is used. It was omitted because sufficient conductivity was obtained.

Further, when the above-mentioned sealing is performed, in the case of color, it is necessary to associate each color phosphor with the electron-emitting device, so that sufficient alignment is performed.

The atmosphere in the glass container completed as described above is exhausted by a vacuum pump through an exhaust pipe (not shown), and after reaching a sufficient degree of vacuum, the external terminals D0X1 to D0X1 to D0
A voltage was applied between the device electrodes of the electron-emitting device 274 through 0Xm and D0Y1 to D0Yn, and the electron-emitting region was formed by energizing (forming) the thin film for forming the electron-emitting region.

The forming was performed by using 36 elements of a 6 × 6 matrix as a unit among all the elements, and further dividing it into 9 blocks by the above-mentioned method.

In the electron-emitting portion thus prepared, fine particles containing palladium as a main component were dispersed and arranged, and the average particle diameter of the fine particles was 30 Å.

Next, at a vacuum degree of about 10 ⁻⁶ [torr],
An exhaust pipe (not shown) was heated by a gas burner so that the exhaust pipe was adsorbed to seal the peripheral device.

Finally, in order to maintain the degree of vacuum after sealing,
Getter processing was performed. This is a process of heating a getter placed at a predetermined position (not shown) in the image forming apparatus by a heating method such as resistance heating or high frequency heating immediately before or immediately after sealing to form a vapor deposition film. Is.

The getter usually has Ba as a main component,
Due to the adsorption action of the deposited film, for example, 1 × 10 ⁻⁵ to 1 × 1
The degree of vacuum of 0 ⁻⁷ [torr] is maintained.

In the image display device of the present embodiment completed as described above, each electron-emitting device has a terminal D0X outside the container.
Through 1 to D0Xm and D0Y1 to D0Yn, electrons are emitted by applying a scanning signal and a modulation signal from a signal generating means (not shown) respectively, and several kV is applied to the metal back 285 or the transparent electrode (not shown) through the high voltage terminal Hv. The above high voltage is applied, the electron beam is accelerated, and the fluorescent film 284
The image was displayed by colliding with and exciting and emitting light.

At the same time, in order to understand the characteristics of the planar surface conduction electron-emitting device produced in the above-mentioned process, FIG.
Of the planar surface conduction electron-emitting device shown in FIG.
A standard comparative sample made similar to the above was prepared, and its electron emission characteristics were measured using the above-described measurement / evaluation apparatus of FIG. The measurement conditions of the comparative sample were as follows: the distance between the anode electrode and the electron-emitting device was 4 mm, the potential of the anode electrode was 1 kV, and the degree of vacuum in the vacuum device at the time of measuring the electron emission characteristics was 1 × 10 ⁻⁶ [torr]. did.

A device voltage was applied between the electrodes 205 and 206 of the comparative sample, and the device current If and the emission current Ie flowing at that time were measured. As a result, in this device, the emission current Ie suddenly increased from the device voltage of about 8V. When the device voltage is 14 V, the device current If is 2.2 mA, and the emission current I is
e becomes 1.1 μA, and the electron emission efficiency η = Ie / If
(%) Was 0.05%.

The electron source of this embodiment is completed by performing the forming process after the above steps a to h.

As described above, if the forming process is performed in accordance with the procedure of the present embodiment, when an extremely large number of elements are to be formed in parallel (for example, in each column), wiring due to an increase in current, etc. It is possible to avoid damage such as fusing of the electrode and breakage of the substrate, which is applied to the area. It is also possible to avoid a phenomenon in which the voltage applied to each element varies due to a voltage drop due to wiring resistance accompanying an increase in the amount of current. In addition, due to the influence of the non-linearity at the time of forming the elements, a large difference occurs in the voltage pattern that each element experiences, and the element characteristics do not vary, and a block of a number of elements corresponding to the pulse interval in one boost cycle is not generated. Can be formed, so that an increase in forming time can be suppressed.

Next, an application example of a display panel using the electron source created as described above will be described.

<Application Example of SCE> FIG. 24 is configured so that the display panel using the SCE described above can display image information provided from various image information sources such as television broadcasting. It is a figure for showing an example of a display. In the figure, 2400 is a display panel having a configuration as shown in FIG. 21, 2401 is a display panel drive circuit, 2402 is a display controller, 2403 is a multiplexer, 2404 is a decoder, 2405 is an input / output interface circuit, and 240.
6 is a CPU, 2407 is an image generation circuit, 2408, 2409 and 2410 are image memory interface circuits, 2411 is an image input interface circuit, 24
12 and 2413 are TV signal receiving circuits, and 2414 is an input unit.

(It should be noted that, in this figure, a processing circuit and a speaker related to the audio component of each input signal such as a television are omitted.) Hereinafter, the function of each part will be described along the flow of the image signal. Do it.

First, the TV signal receiving circuit 2413 is a circuit for receiving a TV image signal transmitted using a wireless transmission system such as radio waves or spatial optical communication. The system of the TV signal to be received is not particularly limited, and for example, various systems such as NTSC system, PAL system and SECAM system may be used. Further, a TV signal (for example, a so-called high-definition TV such as the MUSE system) including a larger number of scanning lines than this is suitable for taking advantage of the display panel suitable for a large area and a large number of pixels. It is a signal source. The TV signal received by the TV signal receiving circuit 2413 is output to the decoder 2414.

The TV signal receiving circuit 2412 is a circuit for receiving a TV image signal transmitted using a wire transmission system such as a coaxial cable or an optical fiber. Similar to the TV signal receiving circuit 2413, the system of the TV signal to be received is not particularly limited, and the TV signal received by this circuit is also output to the decoder 2404.

Further, the image input interface circuit 24
Reference numeral 11 denotes a circuit for capturing an image signal supplied from an image input device such as a TV camera or an image reading scanner. The captured image signal is a decoder 2404.
Is output to.

Further, the image memory interface circuit 2
410 is a video tape recorder (hereinafter abbreviated as VTR)
The circuit for fetching the image signal stored in is output to the decoder 2404.

The image memory interface circuit 2
Reference numeral 409 is a circuit for capturing the image signal stored in the video disc, and the captured image signal is output to the decoder 2404.

The image memory interface circuit 2
Reference numeral 408 denotes a circuit for capturing an image signal from a device that stores still image data, such as a so-called still image disc. The captured still image data is decoded by the decoder 24.
It is output to 04.

The input / output interface circuit 240
Reference numeral 5 is a circuit for connecting the present display device to an external computer, a computer network, or an output device such as a printer. It is of course possible to input / output image data and character / graphic information, and in some cases, input / output control signals and numerical data between the CPU 2406 of the display device and the outside.

Further, the image generation circuit 2407 is provided with image data, character / graphic information, or CPU which is externally input through the input / output interface circuit 2405.
2406 is a circuit for generating display image data based on image data and character / graphic information output from 2406. Inside this circuit, for example, a rewritable memory for accumulating image data and character / graphic information, a read-only memory in which an image pattern corresponding to a character code is stored, a processor for performing image processing, etc. And the circuits necessary for image generation are incorporated.

The display image data generated by this circuit is output to the decoder 2404, but in some cases, it can be output to an external computer network or printer via the input / output interface circuit 2405.

Further, the CPU 2406 mainly performs operations related to operation control of the display device and generation, selection and editing of a display image.

For example, a control signal is output to the multiplexer 2403 to appropriately select or combine image signals to be displayed on the display panel. At that time, a control signal is generated for the display panel controller 2402 in accordance with the image signal to be displayed, and a screen display frequency, a scanning method (for example, interlaced or non-interlaced), the number of scanning lines in one screen, etc. are displayed. The operation of the device is controlled appropriately.

Image data or character / graphic information is directly output to the image generation circuit 2407, or an external computer or memory is accessed via the input / output interface circuit 2405 to generate image data or character / figure information. Enter graphic information.

It should be noted that the CPU 2406 may of course be involved in work for other purposes. For example,
It may be directly related to the function of generating and processing information, such as a personal computer or a word processor.

Alternatively, as described above, the computer may be connected to an external computer network through the input / output interface circuit 2405 and work such as numerical calculation may be performed in cooperation with an external device.

The input unit 2414 is the CPU 24
A user inputs commands, programs, data, etc. at 06. For example, various input devices such as a keyboard, a mouse, a joystick, a bar code reader, and a voice recognition device can be used.

Further, the decoder 2404 has the above-mentioned 2407.
Is a circuit for inversely converting various image signals input from the signals 24 to 2413 into three primary color signals or luminance signals and I signals and Q signals. It is desirable that the decoder 2404 has an image memory therein, as indicated by a dotted line in the figure. This is for handling a television signal that requires an image memory for reverse conversion, including the MUSE system. Further, the provision of the image memory facilitates the display of still images, or facilitates image processing and editing such as image thinning, interpolation, enlargement, and synthesis in cooperation with the image generation circuit 2407 and the CPU 2406. This is because the advantage of being able to do it is born.

Further, the multiplexer 2403 has the C
The display image is appropriately selected based on the control signal input from the PU 2406. That is, the multiplexer 2403 selects a desired image signal from the inversely converted image signals input from the decoder 2404 and outputs it to the drive circuit 2401. In that case, by switching and selecting image signals within one screen display time, it is possible to divide one screen into a plurality of areas and display different images depending on the areas, as in a so-called multi-screen television. .

Also, the display panel controller 2
Reference numeral 402 is a circuit for controlling the operation of the drive circuit 2401 based on a control signal input from the CPU 2406.

First, regarding the basic operation of the display panel, for example, a signal for controlling the operation sequence of the power source (not shown) for driving the display panel is output to the drive circuit 2401.

Further, regarding the driving method of the display panel, for example, a signal for controlling the screen display frequency and the scanning method (for example, interlace or non-interlace) is output to the drive circuit 2401.

In some cases, control signals relating to image quality adjustment such as brightness, contrast, color tone and sharpness of a display image may be output to the drive circuit 2401.

The drive circuit 2401 is a circuit for generating a drive signal to be applied to the display panel 2400, and the image signal input from the multiplexer 2403 and the display panel controller 24.
It operates on the basis of a control signal inputted from 02.

The function of each unit has been described above. With the configuration illustrated in FIG. 24, the display panel 2 displays image information input from various image information sources in this display device.
It is possible to display 400. That is, various image signals such as television broadcast are transmitted to the decoder 24.
After inverse conversion at 04, multiplexer 2403
Are selected as appropriate in (1) and input to the drive circuit 2401. On the other hand, the display controller 2402 generates a control signal for controlling the operation of the drive circuit 2401 according to the image signal to be displayed. The drive circuit 2401 applies a drive signal to the display panel 2400 based on the image signal and the control signal. As a result, the image is displayed on the display panel 2400. The series of operations described above is centrally controlled by the CPU 2406.

Further, in this display device, the image memory built in the decoder 2404 and the image generation circuit 24.
Due to the involvement of the CPU 07 and the CPU 2406, not only the one selected from a plurality of image information is displayed, but also the image information to be displayed is enlarged, reduced, rotated, moved, edge emphasized, thinned, or interpolated. , Color conversion,
It is also possible to perform image processing such as image aspect ratio conversion, and image editing such as composition, deletion, connection, replacement, and fitting. Further, although not particularly mentioned in the description of the present embodiment, a dedicated circuit for processing and editing voice information may be provided as in the above-mentioned image processing and image editing.

Therefore, the present display device has functions such as a display device for television broadcasting, a terminal device for a video conference, an image editing device, a computer terminal device, an office terminal device including a word processor, and a game machine. It can be combined with a stand, and has a very wide range of applications for industrial or consumer use. Moreover, since the display panel can be easily thinned, the depth of the device can be reduced. In addition, it is possible to display a highly realistic image with good visibility because it is easy to enlarge the screen, has high brightness, and has excellent viewing angle characteristics.

[Second Embodiment] A second embodiment of the forming method of the present invention will be described only in the forming part. The other parts are the same as in the first embodiment.

First, the case of forming the element in the 1st row and the nth column as shown in FIG. 4 will be described. First, DY1
A triangular wave having a pulse width of 1 msec, a cycle of 10 msec, and a wave height of 0.1 V is applied to. DX1 and other terminals are GN
It is D. Next, 1 second later, DX1 remains unchanged and DY1 becomes 0.
2V, DY2 triangular wave with a wave height of 0.1V, DY3 to DYn
Switches to the state of applying GND. 1 second later, 0.3V on DY1, 0.2V on DY2, 0.1V on DY3
Then, the voltage is switched every time the voltage is boosted, and after the voltage applied to the wiring corresponding to each element reaches 10 V, the voltage is switched to GND. FIG. 5 shows the transition of the voltage applied to each element for each time. From this, it can be seen that the maximum number of elements to which voltage is applied is 100, and the wave height of the element closer to the DY1 side is larger. That is, the current flowing through DX1 can be greatly reduced as compared with the case where n elements are formed in parallel.
Moreover, since the n elements are formed in (100 + n) seconds, the time can be significantly reduced as compared with the time (100 × n) seconds when forming the n elements one by one. In addition, the forming voltage reaches the elements sequentially from the DY1 side, that is, each element has a higher resistance with a time lag, so that the variation in the voltage pattern experienced by each element is smaller than that when the elements are formed in parallel at the same potential. Very small As described above, it becomes possible to form a plurality of elements simultaneously and uniformly while significantly shortening the time.

Next, a method of forming each element of D (1,1) to D (1, n) in a matrix of m rows × n columns as shown in FIG. 6 in the same manner as in the case of 1 row and n columns will be described. To do. The voltage applied to the DX1 (selection wiring) and each of the wirings DY1 to DYn is the same as that in the case of the 1st row and the nth column. DX
Half of the maximum applied voltage on the DY side is applied to 2 to DXm (non-selected wiring). This eliminates the current flowing into DX1 through elements other than D (1,1) to D (1, n), and D
This is to prevent voltage from being applied to elements other than (1,1) to D (1, n). FIG. 7 shows the voltage applied to each wiring and the transition of the voltage applied to each element at each time. The voltage shown below each element in the figure was positive when the DY side had a high potential. A voltage is applied to each of the elements D (1,1) to D (1, n) in the same manner as in the case of the 1st row and the nth column in FIG. 5, and a voltage between −5V and + 5V is applied to the other elements. You can see that it is done. Here, assuming that the characteristics of the respective elements are the same, the resistances of the row wirings and the column wirings are the same, and that the resistances of the respective elements are increased by an applied voltage of 10 V or less and greater than 5 V, the same as in the case of the 1st row and nth column. A plurality of uniform formings are possible while significantly shortening the time.

A plurality of selection wirings on the DX side may be provided as long as the amount of current allows, and a non-selection wiring may be provided with a constant voltage which is not half the maximum applied voltage on the DY side or with a potential difference.

The maximum number of elements of 100 is the first wave height, that is, the negative voltage applied to DX1 (DX1 is GN
The potential may be applied instead of D), the last wave height, that is, the voltage (10 V in this embodiment) required for sufficiently increasing the resistance of the element and the boosting rate, and the above is not the limitation. Also, the rows and columns may be reversed in all of the present embodiments. The same applies when n <100.

FIG. 26 shows a flowchart of the forming procedure of this embodiment. k and i are control variables for explanation,
These are variables for controlling the row number to which the pulse is applied and the number of pulses. In addition, j and l are the column number and the row number to which the pulse is applied, and are used to generally represent the numerical values that meet the conditions, not the control variables. Vmax represents the maximum voltage applied to the device at a certain time.

First, the pulse application is started from the first row, but the maximum voltage Vmax is set to 0.1 [V]. Then, a triangular pulse having a wave height of Vmax−0.1 × (j−1) [V] and a width of 1 ms and a period of 10 ms is applied to the wiring DYj, and at the same time, the same pulse of 0.5 × Vmax is applied to the wiring DXl. However, if DYj is (i ≦ 100), j =
1 to i are targeted, and if (i> 100), 100 are targeted to j = i-99 to i. If j> n, the DYj does not exist and is not targeted. The value of subscript l of DXl is 1 to m, which is different from k. As described above, the wiring not particularly described is kept at the ground level.

A pulse having a width of 1 ms and a period of 10 ms is applied to the wiring thus selected, and after 1 second has elapsed, Vmax
Is incremented by 0.1, and the columns to which the pulse is applied are shifted and repeated until the entire matrix is completed.

[Third Embodiment] A combination of the first and second embodiments. Similar to the second embodiment, only the forming part will be described. In FIG. 6, first, DX1 (selection wiring), DY2 to DYn are grounded, 0.5V is applied to DX2 to DXm (non-selection wiring), and a triangular wave having a pulse width of 1 msec of 0.1 V is applied to DY1. When one pulse has been applied (after 1 millisecond in the case of the present embodiment), DX2 is selected instead of DX1 while keeping the DY side.

After sequentially selecting up to DX10 in this manner (after 1 second in this embodiment), the process returns to DX1 again to boost DY1 to 0.2V and DY2 to 0.1V. After that DX1
While scanning ~ DX10 for 1 second, the DY side is boosted every second according to the second embodiment. FIG. 8 shows the voltage applied to each wiring and the transition of the voltage applied to each element for each time. As described above, in this embodiment, it is possible to further reduce the time by combining the first embodiment and the second embodiment,
Moreover, since the number of wirings selected at one time is the same as that in the second embodiment, it is possible to prevent variations in element characteristics between the row directions.

Incidentally, each parameter is not limited to the above as in the first and second embodiments.

Further, the present invention may be applied to a system composed of a plurality of devices or an apparatus composed of one device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus.

[0178]

As described above, according to the electron source and the forming method thereof of the present invention, the current flowing through each wiring at the time of forming a plurality of surface conduction electron-emitting devices is reduced to prevent damage to the electron source. In addition to the prevention, it is possible to perform uniform forming without variation and to significantly reduce the required time.

[0179]

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of an electric circuit for performing forming in the present embodiment.

FIG. 2 is a diagram in which a 6 × 6 matrix is extracted from the entire matrix of the electron source of this embodiment.

FIG. 3 is a timing diagram of an applied voltage according to the first embodiment.

FIG. 4 is a diagram in which a 6 × 1 matrix is extracted from the entire matrix of the electron source of this embodiment.

5 is a diagram showing the relationship between the voltage applied to the device of FIG. 4 and time.

FIG. 6 is a diagram of the entire matrix of the electron source of the present embodiment.

FIG. 7 is a diagram showing applied voltages to each wiring and each element at each time in the second embodiment.

FIG. 8 is a timing diagram of applied voltages in the third embodiment.

FIG. 9 is a plan view showing a part of the electron source of the present embodiment.

FIG. 10 is a cross-sectional view of an electron source of this example.

FIG. 11 is a diagram showing a manufacturing process of the electron source of the present embodiment.

FIG. 12 is a diagram showing a manufacturing process of the electron source of the present embodiment.

FIG. 13 is a mask diagram used in this example.

14A and 14B are a plan view and a cross-sectional view showing the configuration of a basic planar surface conduction electron-emitting device according to this example.

FIG. 15 is a diagram illustrating an example of a method of manufacturing a surface conduction electron-emitting device having an electron emitting portion.

FIG. 16 is a diagram showing a voltage waveform in a forming process.

FIG. 17 is a schematic configuration diagram of a measurement / evaluation apparatus for measuring electron emission characteristics of a surface conduction electron-emitting device.

FIG. 18 is a diagram showing an example of electron emission characteristics of a surface conduction electron-emitting device.

FIG. 19 is a diagram showing a basic structure of a vertical surface conduction electron-emitting device.

FIG. 20 is a diagram showing a general configuration of an electron source substrate having a matrix structure.

FIG. 21 is a diagram showing a schematic configuration of an image forming apparatus of this embodiment.

FIG. 22 is a diagram showing a fluorescent film in the present example.

FIG. 23 is a diagram showing a typical device configuration of a conventional surface conduction electron-emitting device.

FIG. 24 is a block diagram showing an application example of an electron source.

FIG. 25 is a flowchart illustrating a forming procedure according to the first embodiment.

FIG. 26 is a flowchart illustrating a forming procedure according to the second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Electron emission part forming thin film 3 Electron emission part 4 Thin film including an electron emission part 5 Element electrode 6 Element electrode 7 Pulse generating electrode and control switching circuit 8 Pulse generating electrode and control switching circuit 9 Electron source element 10 Electron Source 72 X-direction wiring 73 Y-direction wiring

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location // H01J 31/15 C

Claims (18)

[Claims] 1. A method of forming an electron source in which a plurality of surface conduction electron-emitting devices are electrically connected to row-direction and column-direction wiring, the method comprising: A forming method characterized in that a forming voltage is applied to the element through row-direction and column-direction wirings to which the element is connected. 2. When the forming voltage is applied,
At least one wiring is selected from each of the row-direction and column-direction wirings connected to the plurality of surface conduction electron-emitting devices to be formed, and the forming voltage is applied while sequentially switching the selected wirings. The forming method according to claim 1. 3. In applying the forming voltage,
2. The forming method according to claim 1, wherein different forming voltages are simultaneously applied to the row-direction and column-direction wirings connected to the plurality of surface conduction electron-emitting devices to be formed. 4. An electron source in which a plurality of surface conduction electron-emitting devices are electrically connected to row-direction and column-direction wirings, and the devices are connected to a surface-conduction emission device to be subjected to forming treatment. An electron source manufactured by applying a forming voltage to the device from the formed row-direction and column-direction wirings. 5. An image forming apparatus having an electron source and a phosphor, comprising wirings in row and column directions and surface conduction electron-emitting devices, wherein wirings in the row direction and wirings in the column direction, The surface conduction electron-emitting device is electrically connected to the surface conduction electron-emitting device to be subjected to the forming treatment, and a forming voltage is applied to the device from the row-direction and column-direction wiring to which the device is connected. And an electron source, a control unit that controls electrons emitted from the electron source according to an image signal, and a phosphor that emits fluorescence due to the electrons emitted from the electron source. . 6. A method for forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, the method being selected by the plurality of row-direction wirings and column-direction wirings. Wirings are selected so that a predetermined number of surface conduction electron-emitting devices are provided, and a pulse having a predetermined waveform is applied to the device at predetermined time intervals through the selected wirings, and the wirings are applied within the predetermined time interval. Forming method, characterized in that the application of the pulse is repeated until a predetermined time elapses by switching the selection of (1) to select a different wiring. 7. The forming method according to claim 6, wherein the predetermined number of the selected surface conduction electron-emitting devices is selected such that the voltage of the applied pulse does not drop below a predetermined value. 8. The voltage of the applied pulse is increased stepwise every predetermined time.
Forming method described. 9. The forming method according to claim 6, wherein the surface conduction electron-emitting device has a thin film made of conductive ultrafine particles. 10. A method of forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, which is selected by the plurality of row-direction wirings and column-direction wirings. Wirings are selected so that the number of surface conduction electron-emitting devices is a predetermined number, pulses of different voltages are applied at predetermined time intervals to each of the predetermined number of devices through the selected wirings, and the applied pulse Is repeated until each surface conduction electron-emitting device is applied a predetermined number of times. 11. The voltage of the applied pulse is increased by a predetermined amount at the predetermined time interval with respect to the target element, and the pulse is added a predetermined number of times to the selected element by one at each predetermined interval. The forming method according to claim 10, wherein the applied element is removed. 12. The surface conduction electron-emitting device has a thin film made of conductive ultrafine particles.
Forming method described in 0. 13. The forming method according to claim 10, wherein the predetermined number of the selected surface conduction electron-emitting devices is selected such that the voltage of the applied pulse does not drop more than a predetermined value. 14. The forming method according to claim 10, wherein a predetermined voltage is applied to the unselected ones of the surface conduction electron-emitting devices in synchronization with the pulse. 15. The forming method according to claim 14, wherein the predetermined voltage is a value of a half of a maximum voltage of a pulse applied to the element. 16. The forming method according to claim 14, wherein the selected element is selected in one column, and a pulse of a predetermined voltage is applied to the column wiring which is not selected. 17. An electron source formed by forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, wherein the plurality of row-direction wirings and column-direction wirings are provided. The wiring is selected so that the surface conduction electron-emitting device selected by is a predetermined number, and a pulse having a predetermined waveform is applied to the device at a predetermined time interval via the selected wiring, and within the predetermined time interval. An electron source manufactured by repeating the application of the pulse until a predetermined time elapses while switching the selection of the wiring and selecting a different wiring. 18. An electron source formed by forming a plurality of surface conduction electron-emitting devices connected in a matrix by a plurality of row-direction and column-direction wirings, wherein the plurality of row-direction wirings and column-direction wirings are provided. The wiring is selected so that the surface conduction electron-emitting device selected by is a predetermined number, and a pulse of a different voltage is applied to each of the predetermined number of devices at a predetermined time interval via the selected wiring, An electron source manufactured by repeating a pulse to be applied until a predetermined number of times is applied to each surface conduction electron-emitting device.