JPH0730914A - Digital color signal processor - Google Patents

Abstract

PURPOSE:To obtain a color difference signal whose sampling frequency is 4fsc from a color difference multiplex signal whose sampling frequency fsc with a simple configuration and to make processing modulating the obtained color difference signal into a color signal with a simple configuration. CONSTITUTION:Input data are delayed by delay circuits 12, 13 and the processor is provided with an arithmetic operation circuit 14 making interpolation arithmetic operation between the input data and the output of the delay circuit 13, an arithmetic operation circuit 15 making interpolation artihmetic operation between the output of the arithmetic operation circuit 14 and the output of the delay circuit 13, an arithmetic operation circuit 16 making interpolation arithmetic operation between the output of the arithmetic operation circuit 14 and input data. Thus, data whose frequency is four times the sampling frequency of input data are obtained simultaneously. As a result, the configuration modulating the color difference multiplex signal into a color signal is simplified.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color signal processing circuit which digitally processes two orthogonal color signal components.

[0002]

2. Description of the Related Art In order to convert a color difference signal into an NTSC color signal, quadrature two-phase modulation is performed on the two components of the color difference signal, R-Y and B-Y, by a color subcarrier. Here, the color signal is represented by the following formula.

C = R _(n) sin θ + B _(n) cos θ where θ = 2πf _sc t, f _sc is the color subcarrier frequency, R
_(n) is the value of the RY signal, and B _(n) is the value of the BY signal.

From the above equation, when the 90 ° phase of the color subcarrier,
The sample value series of the color signal at the 0 ° phase, at the 270 ° phase, and at the 360 ° phase are R ₍₀₎ , -B ₍₁₎ , -R ₍₂₎ , and B ₍₃₎ , respectively. Where ₍₀₎ , ₍₁₎ , ₍₂₎ , and ₍₃₎ are sampling frequencies 4
represents a sampled value series of f _sc .

Two components R- of the color difference signal of the sampling frequency f _sc
Y, B-Y sample value series R ₍₀₎ , R ₍₄₎ , R ₍₈₎ , ... B ₍₀₎ , B ₍₄₎ , B ₍₈₎ ,. to modulate the signal, sample value sequence R of 2 components obtained by converting the sampling frequency 4f _sc using an interpolation filter _{(0), R (1)} , R (2), R (3), R ( ₄₎ , R ₍₅₎ , R ₍₆₎ ,
R ₍₇₎ , ... B ₍₀₎ , B ₍₁₎ , B ₍₂₎ , B ₍₃₎ , B ₍₄₎ , B ₍₅₎ , B ₍₆₎ ,
B ₍₇₎ ... Is generated, and sign inversion, R, B selection, and the like are performed on this to generate a sample value series of color signals.

A conventional digital color signal processing device will be described below. FIG. 3 is a block diagram showing a conventional digital color signal processing device.

FIG. 4 is a timing chart showing the operation of the conventional digital color signal processing apparatus. First, the color difference multiplexed signal of the sampling frequency f _sc input to the input terminal 31 is array-converted and time-delayed by the selector 32 and the delay circuits 33 and 34. Here, the delay circuits 33 and 34 perform a time delay process for one clock of 4f _sc for each input. In the arithmetic circuit 35, the selector 32 and the delay circuit 3
The output of 4 is input and the result of the interpolation calculation of the 2 inputs is output. Here, as shown in FIG. 4, a chrominance multiplexed signal having a sampling frequency of 2f _sc is obtained at the output of the arithmetic circuit 35.

Sampling frequency output from the arithmetic circuit 35
2f_scThe color-difference multiplexed signal of is sent to the selector 36 and the delay circuit 37.
Therefore, only the RY signal is taken out. Where the delay circuit
37 is 4f for input_scOf one clock time delay
Perform processing. In the arithmetic circuit 38, the selector 36, the delay circuit
The output of 37 is input and the result of the interpolation calculation of the 2 inputs is output.
To do. Here, as shown in FIG. 4, the output of the arithmetic circuit 38
Then sampling frequency 4f _scR-Y signal is obtained.

The color difference multiplexed signal of sampling frequency 2f _sc output from the arithmetic circuit 35 is extracted as BY signal by the selector 39 and the delay circuit 40, and the arithmetic circuit 4 is further extracted.
1 converts it into a BY signal having a sampling frequency of 4f _sc .

The output of the arithmetic circuit 38 is further delayed by one clock of 4f _sc by the delay circuit 42 so that the timings of the sampling series of the RY signal and the BY signal of the sampling frequency of 4f _sc are matched. The RY signal and the BY signal of the sampling frequency of 4f _sc thus obtained are selected by the selector 43,
The sign inversion circuit 44 and the selector 45 modulate to the sample value series of the color signal described above. The state of the above operation is shown in FIG.

[0011]

In the [0005] However the above arrangement, after converting to the color difference multiplex signal sampling frequency 2f _sc by a digital filter from the color difference multiplex signal sampling frequency f _sc, further R-Y, B-Y There is a problem in that the circuit configuration is large because the signals are separated and converted into color difference signals having a sampling frequency of 4f _sc by digital filters.

An object of the present invention is to solve the above-mentioned problems, and an object thereof is to provide a digital color signal processing apparatus which has a simple structure and can realize a miniaturization of a circuit scale.

[0013]

In order to achieve this object, a digital color signal processing apparatus of the present invention comprises two orthogonal components R-Y of a color signal sampled at the cycle of a color subcarrier of a video signal. A first arithmetic unit for inputting a color-difference multiplexed signal for time-division-multiplexing and transmitting BY signals and for performing interpolation calculation of first and second sample values that are forward and backward in time series with respect to two orthogonal components. And a second computing unit that performs an interpolation computation between the first sample value and the output of the first computing unit, and an interpolation computation between the second sample value and the output of the first computing unit. It has a configuration with a third computing unit for performing.

[0014]

According to the present invention, the values of the color difference signals R-Y and B-Y signals having the sampling frequency of four times that of the color difference multiplex signal having the sampling frequency of f _sc are set to the first, second, and second signals. It can be obtained simultaneously by the third arithmetic unit.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a digital color signal processing apparatus according to an embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of the digital color signal processing apparatus according to the embodiment of the present invention.

In FIG. 1, the color difference multiplexed signal of the sampling frequency f _sc input to the terminal 11 is input to the delay circuit 12, and the output thereof is input to the delay circuit 13. The delay circuits 12 and 13 delay the input data for one clock of 2f _sc . As a result, as shown in FIG. 2, the data of the sampling points before and after the color difference multiplexed signal input to the terminal 11 and the color difference multiplexed signal output from the delay circuit 13 are output at the same time. The arithmetic circuit 14 inputs the data of the terminal 11 and the output of the delay circuit 13 and interpolates the two inputs to output them. In the arithmetic circuit 15, the output of the delay circuit 13 and the arithmetic circuit 1
The output of 4 is input, and the interpolation calculation of 2 inputs is performed and output. The arithmetic circuit 16 inputs the data input to the terminal 11 and the output of the arithmetic circuit 14 and interpolates two inputs and outputs the result. Here, the outputs of the arithmetic circuits 15, 14 and 16 are (3A + B) / 4 and (A +) of the data of the sample points before and after.
Values of B) / 2, (A + 3B) / 4 can be obtained.
As a result, the delay circuit 13, the arithmetic circuit 14, the arithmetic circuit 1
5, 4 of the data of the sampling points before and after the output of the arithmetic circuit 16
Data of double sampling frequency can be obtained at the same time.
Further, the selectors 17, 18, 20, 22 and the delay circuit 1
9. The configuration of the sign inverting circuit 21 makes it possible to obtain the data series of the color signal having the sampling period of 4f _sc at the output terminal 23. Here, the operation of the control input a of the selectors 17 and 18, the control input b of the selector 20, and the control input c of the selector 22 is shown in FIG. Also, the selectors 17 and 18, the delay circuit 1
The output operation states of the selector 9, the selector 20, the sign inversion circuit 21, and the selector 22 are shown in FIG.

As described above, according to this embodiment, the timings of the data A and B at the sample points before and after the color difference multiplexed signal input by the delay circuits 12 and 13 are simultaneously made, and the two data are operated. With vessels 15, 14, 16 (3A + B)
By performing the operations of / 4, (A + B) / 2, and (A + 3B) / 4, it is possible to simultaneously take out the data of the sampling frequency of 4 times. In addition, the data is sent to the selectors 17, 1
By performing array conversion and sign inversion operations by 8, 20, 22, the delay circuit 19, and the sign inverter 21, it is possible to realize the modulation from the color difference signal to the color signal with a simple configuration.

In the embodiment of the present invention, the arithmetic circuit 1
Although the configuration of 5, 14 and 16 is shown, the data of the terminal 11 and the output of the delay circuit 13 are input to the two inputs,
(3A + B) / 4, (A + B) / 2, (A + 3B) / 4
Other configurations may be used as long as they are calculated and output respectively (A is the data of the terminal 11 and B is the output of the delay circuit 13).

[0021]

As described above, according to the present invention, the first arithmetic unit for performing the interpolating operation of the first and second sample values that are before and after in time series, the first arithmetic unit, and the first arithmetic unit With a simple configuration, by providing a second computing unit that performs an interpolation computation with the output of and a third computing unit that performs an interpolation computation between the second sample value and the output of the first computing unit, from the color difference multiplex signal sampling frequency f _sc, it is possible to obtain data of the color difference signal of the sampling frequency 4f _sc. Further, it is possible to obtain the data of the color signal that is modulated by the color subcarrier from the color difference signal with a simple configuration.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a digital color signal processing device according to an embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of the digital color signal processing device in the embodiment.

FIG. 3 is a block diagram showing a configuration of a digital color signal processing device in a conventional example.

FIG. 4 is a timing chart showing an operation of a digital color signal processing device in a conventional example.

[Explanation of symbols]

 11 Color Difference Multiplexed Signal Input Terminals 12, 13, 19 Delay Circuits 14, 15, 16 Arithmetic Circuits 17, 18, 20, 22 Selectors 21 Sign Inversion Circuits 23 Color Signal Output Terminals 24 Control Circuits

Claims (1)

[Claims] 1. A color-difference multiplexed signal for time-division-multiplexing and transmitting two orthogonal component R-Y and B-Y signals of a color signal sampled at the cycle of a color subcarrier of a video signal is input and orthogonalized. Two
A first arithmetic unit for performing an interpolating operation on first and second sample values that are before and after each component in time series; and an interpolating operation for the first sample value and the output of the first arithmetic unit. A second computing unit for performing, a third computing unit for performing an interpolation computation between the second sample value and the output of the first computing unit, a color difference multiplexed signal, first, second and third computations Input the output of the device and the control signal, the color difference multiplex signal by the value of the control signal,
A digital color signal processing device comprising: a selector that selects and outputs the outputs of the first, second, and third arithmetic units; and a control circuit that outputs a control signal to the selector.