JP2687444B2 - Rate converter - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a rate conversion device for converting a signal between, for example, a component digital VTR of the SMPTE standard and a composite digital VTR.

[Summary of the Invention]

The present invention relates to a rate conversion device, which corrects a change in sampling phase between standards to be converted by shifting a phase of signal extraction of a filter.

[Conventional technology]

For example, in the SMPTE component digital VTR standard, a video signal is a luminance signal (Y) and a two-color difference signal (RY / Y /
B-Y), the luminance signal is 13.5 MHz, and the color difference signal is sampled by a signal locked to the horizontal synchronization signal of 6.75 MHz for recording.

On the other hand, in the composite standard, the video signal is composed of a luminance signal (Y), an I / Q axis signal when the color signal is NTSC system, and a burst axis signal when the color signal is PAL system. Are respectively sampled and recorded by signals locked to the quadruple color subcarrier.

[Problems to be solved by the invention]

By the way, when such different digital VTR standards exist, it becomes necessary to convert signals between them. In that case, if the digital signal is once converted into an analog signal and then converted, the characteristics of the digital signal will be lost.

On the other hand, when converting the digital signal as it is, for the conversion of the sampling rate, a method of oversampling the digital signal and filtering unnecessary signals is proposed (see Japanese Patent Laid-Open No. 63-26119). Has been done.

However, as described above, when the sampling standard is locked to the horizontal sync signal in the component standard and the color subcarrier is locked in the composite standard, these signals are simply converted only by conversion of the sampling rate. It was impossible.

The present application has been made in view of such points.

[Means for solving the problem]

The present invention converts a digital video signal of one standard into a digital video signal of another standard by supplying the digital video signal of the one standard to a digital filter by predetermined oversampling, The signal extraction phase is sequentially changed according to the sampling rate difference between the one and other standards, and the signal extraction phase of the digital filter is changed according to the sampling phase difference between the one and other standards. And a digital video signal of the other standard is extracted from the digital filter.

[Action]

According to this, the conversion of the sampling rate and the shift of the sampling phase at the time of conversion of the digital video signal can be performed at the same time, so that excellent conversion can be performed with a simple configuration.

〔Example〕

In the following description, the case where a component standard digital video signal is converted into an NTSC composite standard digital video signal will be described first.

In FIG. 1, for example, component digital VT
Luminance signal (Y) from R and two-color difference signal (RY / BY)
Are respectively supplied to the input terminals (1), (2) and (3).
The signal from the input terminal (1) is supplied to the data latches (4a) (4b) ... Connected in cascade and sequentially transferred at every 13.5 MHz sampling clock. The signals from these data latches (4a) (4b) ... are respectively multiplied by the multiplier (5a).
(5b) ... is supplied. These multipliers (5a) (5b) ...
Are supplied with predetermined coefficients from the ROMs (6a) (6b), respectively, and these ROMs (6a) (6b) ... are supplied with predetermined addresses ( It is controlled by the terminal (7)). The signals from these multipliers (5a) (5b) ... Are supplied to the adder (8).

Further, the data latches (9a) (9b) ..., the multipliers (10a) (10b) ..., in which the signals from the input terminal (2) are similarly configured,
It is supplied to the circuits of ROM (11a) (11b) ... and the multiplier (10a)
The signals from (10b) ... Are supplied to the adder (12). Further, data latches (13a) (13b) ..., multipliers (14a) (14b) ..., ROM in which signals from the terminal (3) are similarly configured
(15a) (15b) ... is supplied to the multipliers (14a) (1
The signals from 4b) ... Are supplied to the adder (16).

The signals ([Y], [RY], [BY]) from the adders (8), (12) and (16) are supplied to the matrix circuit (17) and the luminance signal (Y ) And I / Q axis signals are formed, these signals are supplied to a synthesizing circuit (18), and a digital video signal of, for example, an NTSC composite standard is taken out to a terminal (19).

Here, in the above device, the data latch, the multiplier,
ROM and adder perform oversampling, rate conversion by digital filtering, and sampling phase shift.

That is, FIG. 2 shows a case where, for example, a rate conversion of 4: 5 is performed, and when the digital signal sampled at f _s1 is oversampled 5 times, its frequency spectrum becomes as shown in FIG. A digital filter removes the components of f _{s1 to} 4f _s1 from this signal as shown in FIG. 4B, and when this signal is sampled at the timing of f _s2 , the frequency spectrum shown in FIG. , F _s2 rate-converted digital signal is taken out. In this way, the rate conversion is performed, and in this case, it is possible to perform exactly the same conversion as once converted to an analog signal and converted as shown in FIG. 4D while keeping the characteristics of the digital signal.

Therefore, in the case of the above device, the sampling rate of the component standard is 13.5 MHz, while the sampling rate of the NTSC system positive standard (4 times the color subcarrier)
Is 14.3MHz and this rate conversion is 33:35. Therefore, basically, as shown in FIG. 3A, a number of delay elements T corresponding to 35 times oversampling are connected in cascade,
The signals from the input terminals are sequentially delayed, and the outputs of these delay elements T constitute coefficients a ₁ , a ₂ ... A ₃₅ , b ₁ , which constitute a digital filter for removing the components of f _{13.5 to} 34 · f _13.5 . b ₂
It is supplied to the addition circuit through the weighting circuit of. Then, rate conversion can be performed by extracting a signal at a sampling rate of 14.3 MHz from this adding circuit.

In this case, the oversampled signal of, for example, 35 times as described above is
Although there are signals D ₀ , D ₁ , ... For each sample, “0” is interpolated between them. The signals D ₀ , D ₁ , ... Are sequentially transferred at each oversampling cycle. Therefore, as shown in FIG. 9B, the signals D ₀ , D ₁ , ... Are held in the data latches, and the coefficients a _{1 to} a ₃₅ , b _{1 to} b _35, ... RO
By sequentially selecting the addresses of M and multiplying the coefficient of the selected address by the signal from the data latch and adding the same, oversampling and digital filtering similar to those described above can be performed.

And further, in the above-mentioned device, there is a 33 degree offset in the color subcarrier between the R-Y / B-Y axis and the I / Q axis.

So this offset is That is, one wavelength of the color sub-carrier is divided into 120 equal parts, and 11 points are separated, and in the case of 4 times the color sub-carrier, one wavelength is divided into 30 equal parts and 11 points are separated. On the other hand, in the circuit described above, a signal obtained by dividing the quadruple color subcarrier into 33 equal parts is formed. Therefore If we find an integer that satisfies Therefore, it is possible to obtain a point with an error of about 1/100.

This error is Is a practically sufficient value.

Therefore, in the above-mentioned device, at the sampling timing of the first four times the color subcarrier after the horizontal synchronization signal, RO
12th address of M (6a) (11a) (15a) ... (coefficient
a ₁₂ , b ₁₂ , c ₁₂ ...), and thereafter, at every sampling timing, select an address 33 addresses away (since the address is 1 to 35, it is equal to an address -2 away) and perform the operation. , The sampling phase shifted signal is extracted with rate conversion.

In this way, according to the above-mentioned device, the conversion of the sampling rate and the shift of the sampling phase at the time of conversion of the digital video signal can be performed at the same time, so that excellent conversion can be performed with a simple configuration.

When converting a digital video signal of NTSC composite standard to a component standard, the above-mentioned device can be installed in reverse. That is, the supplied composite signal is supplied to the luminance signal (Y) and
I / Q axis signals are supplied to a matrix circuit, and these signals are supplied to a luminance signal [Y] and a two-color difference signal [RY],
[BY]. Then, these signals can be supplied to the circuits of the data latch, the multiplier, the ROM and the adder to perform rate conversion and shift of the sampling axis to form a component standard digital video signal.

Furthermore, for digital video signals of the PAL system composite standard, the frequency of the color subcarrier that is four times that of the PAL system is approximately 17.73MHz, and since the color subcarrier has an offset of 25Hz, simple rate conversion is performed. Although the ratio cannot be obtained, rate conversion can be performed, for example, by dividing the sampling interval of 13.5 MHz into 256 equal parts and extracting every 195 points thereof and, if necessary, every 194 points.

And in the case of PAL system, there is an offset of 135 degrees between the burst axis and the RY / BY axis. Therefore, it is only necessary to divide one wavelength of the quadruple color subcarrier into two equal parts and shift them to a point separated by three parts. When the wavelength is divided into 256 parts as described above, a sufficiently close value can be easily obtained. be able to.

Even if it is divided into 256 equal parts as described above, it is not necessary to perform the calculation at all the points, and if the ROM has a coefficient corresponding thereto, the calculation may be performed at each output timing.

Further, the so-called PAL-M system composite standard can be converted in the same manner as the PAL system.

Also, the inverse conversion can be similarly performed in the PAL and PAL-M systems.

Further, the above-mentioned device is R / G / B, Y / R-Y / B-Y, Y / I / Q,
It can also be applied to shifting between axes such as Y / U / V.

〔The invention's effect〕

According to the present invention, the conversion of the sampling rate and the shift of the sampling phase at the time of conversion of the digital video signal can be performed at the same time, so that excellent conversion can be performed with a simple configuration.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an example of the present invention, and FIGS. 2 and 3 are diagrams for explaining rate conversion. (1), (2) and (3) are input terminals, (4), (9) and (13) are data latches, (5), (10) and (15) are multipliers, and (6)
(11) (15) is ROM, (7) is address terminal, (8) (1
2) (16) is an adder, (17) is a matrix circuit, (1
8) is a synthesis circuit, and (19) is an output terminal.

Continuation of the front page (56) Reference JP-A 63-26119 (JP, A) JP-A 64-2484 (JP, A) JP-A 64-48512 (JP, A) JP-A 64-77326 (JP , A)

Claims (1)

(57) [Claims] 1. When converting a digital video signal of one standard into a digital video signal of another standard, the digital video signal of the one standard is supplied to a digital filter by predetermined oversampling, and the digital filter The signal extraction phase of the digital filter is sequentially changed according to the sampling rate difference between the one and the other standards, and the signal extraction phase of the digital filter is changed to the sampling phase difference between the one and the other standards. A rate conversion device which shifts in accordance with the above and extracts a digital video signal of the other standard from the digital filter.