JPH03149991A - Y/c separating circuit - Google Patents

Abstract

PURPOSE:To improve picture quality by switching to an output signal of a 1H delaying circuit instead of a signal passing through a comb line filter, heightening once a sampling frequency before switching the signal by using an interpolation circuit and switching it, and thinning out data again by the sampling frequency. CONSTITUTION:When only outputs of subtracters 7, 8 are switched, sometimes there is the case when an oblique line of a luminance signal becomes discontinuous in the vertical direction and unnatural, therefore, instead of the outputs of the subtracters 7, 8, that is, a signal passing through a comb line filter, it is switched to an output of a 1H delaying circuit 5, that is, a signal passing through only a band pass filter 3. Subsequently, before the signal is switched by using interpolation circuits 9-11, it is switched by a switch circuit 12 by heightening a sampling frequency once, and thereafter, data is thinned out to the original sampling frequency again by a thinning-out circuit 13. In such a way, unnaturalness of an oblique line of the luminance signal, and a moire at the time when the comb line filter is switched is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a video tape recorder (hereinafter referred to as VTR).
The present invention relates to a YC separation circuit that separates a luminance signal and a carrier color signal from a composite signal (a video signal including a carrier color signal) used in TV receivers and the like.

2. Description of the Related Art In recent years, the performance of equipment has been improved by digitizing video signal processing. In YC separation circuits as well, a method called adaptive YC separation using line memory and line correlation is now performed by digital processing, in place of the conventional method using a bandpass filter. Adaptive YC separation using conventional digital processing will be described below with reference to FIG.

The composite signal input from the input terminal 25 is A/D
A converter 1 converts it into a digital signal.

This A/D converted signal is input to a filter circuit 30 composed of a bandpass filter 32 and 1H delay circuits 31, 33, and 34. A color signal is extracted from the input signal of the filter circuit 30 by a bandpass filter 32. For example, if the input signal is an NTSC signal, a bandpass filter with a bandwidth of approximately IMHz centered around 3.58MHz is used. Also, the output signal of the A/D converter 1 is 1
The signal is delayed by 1H in the H delay circuit 31 and output. The output signal of the bandpass filter 32 is delayed by 1H delay circuits 33 and 34.

The subtracter 7 subtracts the output of the bandpass filter 32 from the output of the 1H delay circuit 33. Subtractor 8 is 1H delay circuit 3
The output of the 1H delay circuit 34 is subtracted from the output of the 1H delay circuit 34. Subtraction circuit 7 and 1H delay circuit 33, subtracter 8 and 1H delay circuit 3
4 constitutes a so-called comb filter, and therefore,
At the outputs of the subtracters 7 and 8, a carrier color signal from which the luminance signal has been removed is obtained.

If a comb filter is used, dot interference in the luminance signal and discoloration of the color signal will occur if the signals have no vertical correlation, so the comb filter is selected depending on the correlation. In this example, it is performed as follows.

In the arithmetic circuit 24, the adder 2B adds the output of the bandpass filter 32 and the output of the 1H delay circuit 33. Adder 25 adds the outputs of LH delay circuits 33 and 34.

Since the polarity of the carrier color signal is inverted every 1H, the outputs of the adders 26 and 25 represent the correlation between the carrier color signals, and when the correlation is large, the output becomes small. Therefore, if the comparator circuit 27 compares the outputs of the adders 26 and 25, and the switch circuit 12 switches the output of the subtracter 7 or 8 to the one with a larger correlation depending on the relationship, it is possible to convey the color without fading. Color signals can be obtained. Further, by subtracting this carrier color signal from the output of the 1H delay circuit 31 by the subtracter 18, a luminance signal free from dot interference can be obtained. Such an example is published in Japanese Unexamined Patent Publication No. 1982
This is shown in "YC Separation Circuit" of Publication No. 43290.

Problems to be Solved by the Invention However, with the above configuration, an unnatural image may be produced when the comb filter is switched on diagonal lines of the luminance signal. Further, when the switch circuit 12 switches the signal, the signal becomes discontinuous and distortion occurs, so that the signal after switching has a higher frequency component than the signal before switching. When digital processing is performed, such high frequency components cause aliasing distortion, which has the drawback of causing moire in the details of the image on the screen. in particular,
For example, if the video signal band is 5 MHz 1 and the sampling frequency is 13.5 MHz, aliasing distortion will not occur unless signals of half the sampling frequency, that is, 8.75 MHz or more are included. Therefore, the signal band is usually limited to 6°75 MHz or less before A/D conversion.

However, even if the signal has a band of 6°75MHz or less,
If the signal is switched to another signal midway, the waveform becomes discontinuous, so components of 6.75 MHz or higher appear, and moiré occurs due to aliasing.

If such a circuit is configured with an analog circuit, it will only be able to pass signals below the analog operating band of the switch circuit, and in the case of an analog circuit, it will not be possible to pass signals at high frequencies because sampling is not performed. Even if this occurs, folding essentially does not occur, so moiré does not appear.

However, in the case of a circuit using such a 1H delay circuit, it is easier to implement a digital circuit. However, on the other hand, digital circuits have the disadvantage of causing moiré.

Means for Solving the Problems In order to solve the above problems, the YC separation circuit of the present invention includes an A/D converter that A/D converts a video signal including a carrier color signal, and the A/D converter as a first output. A signal obtained by delaying the output of the converter by 1H, a signal in the carrier color signal band of the output of the A/D converter as a second output, and a signal in the carrier color signal band delayed by 1H as a third output. a filter circuit that outputs a signal obtained by delaying the carrier color signal band signal by 2H as a fourth output; a first subtracter that takes the difference between the second output and the third output; a second subtractor that takes the difference between the third output and the fourth output;
an arithmetic circuit that determines the magnitude relationship between the outputs of the third output, the output of the first subtracter, and the output of the second subtracter; a switch circuit that switches the outputs of the first, second, and third interpolation circuits according to the output of the arithmetic circuit, and thins out the output data of the switch circuit. a decimation circuit that returns the sampling frequency to the sampling frequency before interpolation by the first, second, and third interpolation circuits; and a first filter circuit of the filter circuit.
and a third subtracter that subtracts the output of the thinning circuit from the output of the decimation circuit.

Effect: With the above-described configuration, the present invention can reduce unnaturalness of diagonal luminance signal lines and moire when switching comb filters when an adaptive YC separation circuit is implemented using a digital circuit.

EXAMPLE Hereinafter, a YC separation circuit of the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a first embodiment of the present invention. Elements that are the same as those of the conventional example are given the same reference numerals.

In FIG. 1, a combo shift signal input to an input terminal 25 is converted into a digital signal by an A/D converter 1. This converted composite signal is sent to filter circuit 2.
is input. Filter circuit 2 is bandpass filter 3
and a 1H delay circuit 4°5.6. The input of the filter circuit is delayed by 1H in the 1H delay circuit 4 and sent to the subtracter 18, while it is input to the bandpass filter 3, where the carrier color signal band is extracted, and then sent to the 1H delay circuit 5.
and delayed by 6. A subtracter 7 subtracts the output of the bandpass filter 3 from the output of the 1H delay circuit 5, and a subtracter 8 subtracts the output of the 1H delay circuit 6 from the output of the 1H delay circuit 5. N
In the case of the TSC signal, the phase of the carrier color signal is inverted every 1H, so the outputs of the subtracters 7 and 8 provide the carrier color signal from which the luminance signal has been removed. As described in the conventional example, when one signal has no vertical correlation, a carrier color signal without color droop can be obtained by selecting the output of subtractors 7 and 8 from which the line with the larger vertical correlation is subtracted. It will be done.

Furthermore, when only the outputs of subtractors 7 and 8 are switched, the diagonal line of the luminance signal may become discontinuous in the vertical direction, resulting in an unnatural result. The output, i.e. (1H instead of the signal passed through the square filter)
The signal is switched to the output of the delay circuit 5, that is, the signal that has passed only through the bandpass filter 3. These switching methods will be described later.

Next, the interpolation circuits 9, 10.11 will be explained.

These interpolation circuits are intended to eliminate moiré when switching between comb filters, which is one of the drawbacks of the conventional example. As mentioned above, the cause of this moiré is aliasing distortion of harmonic components that occurs when a continuous signal is switched to another signal midway through. Therefore, increasing the sampling frequency will reduce it.

However, in a digital circuit, the 1H delay circuit is realized by a memory circuit or a shift register, so increasing the sampling frequency increases the memory capacity and the number of stages of the shift register. Therefore, in this embodiment, before switching the signal using the interpolation circuits 9, 10, and 11, the sampling frequency is first raised to a high value, the switch circuit 12 switches the frequency, and then the data is thinned out again to the original sampling frequency using the thinning circuit 13. I have to. Therefore, the scale of the 1H delay circuit does not increase.

Interpolation circuit 9. 10. 11. Regarding the thinning circuit 13,
This will be explained in more detail with reference to FIG.

FIG. 3(a) shows the interpolation circuit 9. 10. 11, (b) is a specific example of the thinning circuit 13, and (C) is a clock waveform diagram when operating these circuits. Interpolation circuit 9, 10
．． 11 are all the same circuits. Clock A is a clock for data after interpolation, for example, 27 MHz, and Clock B is a clock for data before interpolation, for example, 13.5 MHz.
It is Hz. Clock A and 13.5 MHz data are input to the interpolation circuit shown in FIG. 3(a).

This data is resampled by Clofuku A in D-fleet flop 40. Therefore, the same data is transmitted to the output Q of the D flip-flop 40 twice in the period of the clock A.
Appears once in a while. This data is D flip flop 41
is delayed by one clock of the clock A, and the adder 42 delays the clock D by one clock of the clock A.
It is added to the output of flip-flop 40. Therefore, D
The flip-flop 41 and the adder 42 have a transfer function expressed by Z-transformation of 1+Z-1, and have low-pass filter characteristics. In this case, since the clock A has a unit delay, components around 13-5 MHz are particularly removed. Since the data processed by clock B has large energy at 13.5 MHz, by removing this component, it is possible to interpolate the data sampled by clock B to the data sampled by clock A, which has twice the frequency. It will be done. This data is then transferred to the switch circuit 12
Since the frequency is switched by , aliasing does not occur unless a component of 13.5 MHz or higher appears. In practical terms, harmonic components caused by distortion have small energy at frequencies of 10 MHz or higher, so moire can be suppressed to a level that poses no problem in practice. Next, the data switched by the switch circuit 12 is again converted into clock B data by being thinned out by the thinning circuit 13 (in this case, by half) That's good, but if you simply thin it out, it will be 8.75M.
Since components of Hz or higher cause aliasing, interpolation becomes meaningless. Therefore, as shown in FIG. 3(b), a low-pass filter is constructed using a D flip-flop 43 and an adder 44, similar to the interpolation circuits 9, 10, and 11, and the high frequency is removed before thinning the data. After that, D Flip Flop Flop 45
By thinning out the data using clock B, a signal free from aliasing distortion is obtained and output as a carrier color signal.

Further, by subtracting this signal from the signal obtained by delaying the output of the A/D converter 1 by 1H in the subtracter 18, a luminance signal free from moire can be obtained.

Next, a method of controlling the switch circuit 12 will be described. The outputs of the subtractors 7 and 8 are basically switched by selecting the subtraction output having a correlation, as in the conventional example. Therefore, in the arithmetic circuit 14, two adders 15 and 16 calculate the degree of decorrelation, and a comparator circuit 17 determines which one has a smaller absolute value, that is, which one has a larger correlation. When is smaller than the output of adder 15, the output of interpolation circuit 10 is selected. When the value is large, the output of the interpolation circuit 9 is selected. Furthermore, in this embodiment, when the polarities of the outputs of the adders 15 and 16 are opposite, the comparison circuit 17 controls the switch circuit 12 to select the output of the interpolation circuit 11. This has the effect of preventing the diagonal lines of the luminance signal from becoming unnatural due to a decrease in vertical resolution due to the comb filter. Adders 15 and 18
When the polarity of the output is reversed, for example, the polarity of three lines changes from positive to positive to negative, but in the case of the carrier color signal of an NTSC signal, the polarity is reversed for each line. This is a case where the hue is reversed between the upper and lower lines, and the saturation level of the middle line is low. Or this is the case of a high-frequency diagonal line of a luminance signal. In particular, in the case of a diagonal line of a luminance signal, when switching from the output of interpolation circuit 9 to the output of interpolation circuit 10, the center of energy of the output of interpolation circuit 9 lags the output of interpolation circuit 10 toward the bottom of the screen, so the line connection becomes poor, and the screen becomes unnatural. Therefore, by not applying a comb filter to the center line, it is possible to prevent the screen from looking unnatural.

Next, a second embodiment of the present invention will be described with reference to FIG. The same components as in the first embodiment are given the same reference numerals. This embodiment differs from the first embodiment in the configuration of the filter circuit, and the other configurations and operations are the same as in the first embodiment, so their explanation will be omitted.

That is, the filter circuit 20 includes a 1H delay circuit 21 that delays the input signal by 1H, a bandpass filter 23 that extracts the color signal band of its output, a 1H delay circuit 24 that delays the output by 1H, and a bandpass filter 23 that extracts the color signal band from the input signal. Therefore, each output of the filter circuit 20 obtains the same signal as each output of the filter circuit 2 in the first embodiment.

In this embodiment, by using two bandpass filters, the 1H delay circuit can be configured with two.

Effects of the Invention As is clear from the above description, by using the present invention, it is possible to obtain a YC separation circuit in which the naturalness of the diagonal lines of the luminance signal is not lost. .

Further, according to the present invention, it is possible to reduce moire due to aliasing distortion peculiar to digital processing.

Further, according to the present invention, by using two bandpass filters, one large-scale 1H delay circuit can be eliminated, and the circuit scale can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the YC separation circuit in the first embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of the YC separation circuit in the second embodiment of the invention, and FIG. Figures (a), (b) and (c) are block diagrams and waveform diagrams showing the configurations of the interpolation circuit and thinning circuit and the waveforms of the clocks used therein in the first and second embodiments, and Figure 4 is the conventional FIG. 2 is a block diagram showing the configuration of a YC separation circuit of FIG. 1-A/D converter, 2...filter circuit, 9
．． 10.11--Interpolation circuit, 13--Thinning circuit, 14--Arithmetic circuit, 20--Filter circuit,
40.41, 43.45-D flip-flop.

Claims (6)

[Claims] (1) An A/D converter for A/D converting a video signal including a carrier color signal
a D converter, and a signal obtained by delaying the output of the A/D converter by 1H (H is a horizontal synchronization period) as a first output, and a carrier color signal band of the output of the A/D converter as a second output. a filter circuit that outputs a signal obtained by delaying the signal in the carrier color signal band by 1H as a third output, and a signal obtained by delaying the signal in the carrier color signal band by 2H as a fourth output; a first subtractor that takes the difference between the second output and the third output; a second subtractor that takes the difference between the third output and the fourth output; and the second, third, and fourth subtracters. a switch circuit that switches between the outputs of the first and second subtracters and the third output of the filter circuit according to the output of the arithmetic circuit; a third subtracter that subtracts the output of the switch circuit. (2) The arithmetic circuit includes: a fourth addition circuit that adds the second output and the third output of the filter circuit; a fifth addition circuit that adds the third output and the fourth output; The outputs of the fourth and fifth adder circuits are compared, and if the outputs of the fourth and fifth adder circuits have opposite polarities, the switch circuit transfers the third output to the fourth adder with the same polarity. A comparison in which the output of the second subtracter is selected when the absolute value of the output of the adder circuit is greater than the absolute value of the output of the fifth adder circuit, and the output of the first subtracter is selected when the absolute value of the output of the fifth adder circuit is smaller. 2. The YC separation circuit according to claim 1, further comprising a circuit. (3) An A/D converter for A/D converting the video signal including the carrier color signal.
a D converter, and a signal obtained by delaying the output of the A/D converter by 1H (H is a horizontal synchronization period) as a first output, and a carrier color signal band of the output of the A/D converter as a second output. a filter circuit that outputs a signal obtained by delaying the signal in the carrier color signal band by 1H as a third output, and a signal obtained by delaying the signal in the carrier color signal band by 2H as a fourth output; a first subtractor that takes the difference between the second output and the third output; a second subtractor that takes the difference between the third output and the fourth output; and the second, third, and fourth subtracters. an arithmetic circuit that determines the magnitude relationship between the outputs of the third output, the output of the first subtracter, and the output of the second subtracter; a switch circuit that switches the outputs of the first, second, and third interpolation circuits according to the output of the arithmetic circuit; and thins out the output data of the switch circuit. a decimation circuit that returns the sampling frequency to the sampling frequency before interpolation by the first, second, and third interpolation circuits; and a third subtractor that subtracts the output of the decimation circuit from the first output of the filter circuit. A YC separation circuit comprising: (4) The filter circuit includes a first 1H delay circuit that delays an input signal by 1H and outputs a first output, and a first bandpass filter that extracts a carrier color signal band of the input signal and outputs a second output. a second delay circuit that delays the output of the first bandpass filter by 1H and outputs a third output; and a third delay circuit that delays the output of the second delay circuit by 1H and outputs a fourth output. 4. The YC separation circuit according to claim 1, further comprising a delay circuit. (5) The filter circuit includes a fourth 1H delay circuit that delays an input signal by 1H and outputs a first output;
a second bandpass filter that extracts the carrier color signal band of the output of the delay circuit and outputs a third output; and a fifth 1H that delays the output of the second bandpass filter by 1H and outputs a fourth output. 4. The YC separation circuit according to claim 1, comprising: a delay circuit; and a third bandpass filter that extracts a carrier color signal band of the input signal and outputs a second output. (6) The arithmetic circuit includes: a fourth addition circuit that adds the second output and the third output of the filter circuit; a fifth addition circuit that adds the third output and the fourth output; The outputs of the fourth and fifth adder circuits are compared, and if the outputs of the fourth and fifth adder circuits have opposite polarities, the switch circuit transfers the output of the first interpolation circuit to the first interpolator with the same polarity. When the absolute value of the output of the fourth adder circuit is larger than the absolute value of the output of the fifth adder circuit, the output of the third interpolation circuit is selected, and when it is smaller, the output of the second interpolation circuit is selected. 4. The YC separation circuit according to claim 3, further comprising a comparison circuit that performs the following steps.