JPH07297274A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method for forming a buried element isolation region without causing any cracks on a semiconductor substrate by relaxing the concentration of abrasion pressure. CONSTITUTION:A groove part formed on a semiconductor substrate 11 is buried by a second silicon oxide film 16. A first polycrystalline silicon film 13 which becomes a stopper film on abrasion is formed at the element region of the semiconductor substrate 11 and at the same time a second polycrystalline silicon film 17 is formed selectively at the element isolation region. Then, a third silicon oxide film 18 is deposited on an entire surface and the recessed and projecting shape of the second silicon oxide film 16 is relaxed and then abraded.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a buried element isolation method.

[0002]

2. Description of the Related Art The LOCOS method or the like is generally used as an element isolation method in a semiconductor device. But L
The element isolation by the OCOS method has a limit to miniaturization, and an embedded element isolation method has been proposed as a method for further miniaturization. Hereinafter, a conventional embedded device isolation method will be described with reference to FIGS.

A first silicon oxide film 102 is formed on a semiconductor substrate 101 by 250 Å (hereinafter referred to as A).
Then, the first polycrystalline silicon film 103 is formed by 40
00A is deposited. A resist is applied on the entire surface, and a desired resist pattern 104 is formed by the lithography method (FIG. 7).

Next, using the resist pattern 104 as a mask, the polycrystalline silicon film 103 and the first silicon oxide film 102 are sequentially etched, and the semiconductor substrate 101 is further etched to form a groove portion 105 to be an element isolation region. Formed (FIG. 8).

After that, the resist pattern 104 is removed, and a second silicon oxide film 106 is deposited to a thickness of 1 μm by a vapor phase growth method to fill the groove 105. At that time, irregularities are formed on the surface of the second silicon oxide film 106 depending on the shape of the base. Therefore, the second silicon oxide film 106 in the recess is formed.
A second polycrystalline silicon film 107, for example, 2000A is formed on the upper surface.
Formed (FIG. 9).

After that, the second silicon oxide film 106 is formed on the polycrystalline silicon film 103 and the second polycrystalline silicon film 107.
Polish until and are exposed (FIG. 10). Next, by using an anisotropic etching method, the polycrystalline silicon film 103 and the second
Polycrystalline silicon film 107, followed by silicon oxide film 10
2 is removed to form an element isolation region.

To form a buried element isolation region,
It is necessary to carry out polishing and etching. First, when polishing is performed, the element region portion is covered with a material (first polycrystalline silicon film 103) having a higher selection ratio than the embedding material (second silicon oxide film 106) with respect to the polishing material, and the polishing is stopped. Let
Furthermore, in order to prevent the burying material from dropping in the element isolation region, the same material as the element region (second polycrystalline silicon film 1
07) to stop the polishing.

As described above, overpolishing is prevented by the first polycrystalline silicon film 103 and the second polycrystalline silicon film 104 in both the element region and the element isolation region. However, since the surface of the second silicon oxide film 106 has irregularities, as shown in FIG. 11, the local polishing pressure concentrates on the edge portions of the convex portions. Therefore, the polishing rate of the edge portion is increased, and the phenomenon that the semiconductor substrate is scraped occurs.

[0009]

As described above, when the buried element isolation region is formed, when the planarization is performed by polishing, the pattern of the buried element isolation region and the stopper structure are caused. As a result, the polishing pressure is concentrated. Therefore, the element region of the semiconductor substrate may be scraped, which is a problem.

Therefore, the present invention is directed to a semiconductor device capable of satisfactorily polishing the semiconductor substrate by relaxing the concentration of the polishing pressure when forming the buried element isolation region and without causing the semiconductor substrate to be abraded. It is an object to provide a manufacturing method.

[0011]

A method of manufacturing a semiconductor device according to the present invention comprises a step of forming a first stopper film on a semiconductor substrate, and a step of selectively selecting the first stopper film and the semiconductor substrate. Etching to form a groove in the semiconductor substrate, a step of filling the groove and forming a first insulating film on the entire surface, and a second stopper selectively on the first insulating film. A step of forming a film, a step of forming a second insulating film on the main surface, and a step of forming the second insulating film and the first insulating film in the first stopper film and the second stopper film. Polishing until the film is exposed.

[0012]

According to the above method, the stepped shape of the first insulating film, which is inevitably formed by the pattern of the groove portion, is mitigated by forming the second insulating film on the stepped shape. be able to. Therefore, the polishing pressure can be uniformly applied without being locally concentrated.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. First, 250 A of the first silicon oxide film 12 is formed on the semiconductor substrate 11, and subsequently 4000 A of the first polycrystalline silicon film 13 is deposited. A resist is applied on the first polycrystalline silicon film 13, and a resist pattern 14 having a desired shape is formed by using a lithography method.
(Figure 1).

Thereafter, using the resist pattern 14 as a mask, the first polycrystalline silicon film 13, the first silicon oxide film 12 and the semiconductor substrate 11 are sequentially etched to form a groove portion 15 which will become a buried element isolation region. Form (Fig. 2).

After removing the resist pattern 14, a second silicon oxide film 16 is deposited to a thickness of 1 μm by the vapor phase growth method to fill the groove 15. At that time, the surface of the second silicon oxide film 16 becomes uneven due to the pattern of the groove 15 (FIG. 3).

Next, the second polycrystalline silicon film 17 is formed to 20
00A is deposited and patterned to cover the concave portion of the second silicon oxide film 16. After that, the third silicon oxide film 18 is deposited on the entire surface to relax the uneven shape of the second silicon oxide film 16. The third silicon oxide film 18 is
It is desirable that the second silicon oxide film 16 is formed to have a film thickness similar to that of the second silicon oxide film 16 and that the selection ratio with respect to the polishing material is substantially the same (FIG. 4).

In this state, the third silicon oxide film 18 and the second silicon oxide film 16 are polished until the first polycrystalline silicon film 13 and the second polycrystalline silicon film 17 are exposed (FIG. 5). . Next, the first polycrystalline silicon film 13, the second polycrystalline silicon film 17, and the first silicon oxide film 1
2 is removed by etching to form an element isolation region.

FIG. 6 shows the pressure distribution during polishing. (1) ~
Each solid line in (5) shows the transition of the polishing state.
At the stage of (1), the polishing pressure is concentrated on the edge portion of the convex portion, but the polishing pressure becomes uniform as it goes through the stages of (2) to (3), and becomes almost uniform at the stage of (4). ,
At the stage of (5), the first polycrystalline silicon film 13 and the second polycrystalline silicon film 17 serve as stopper films, and polishing is completed. Therefore, the semiconductor substrate 11 is polished well without being scraped.

The stopper film is not limited to the polycrystalline silicon film, but may be a silicon nitride film, a polycrystalline silicon film,
A carbon film, a refractory metal film or a refractory metal silicide film can be used, and a single layer film or a laminated film can be used.

[0020]

According to the method of the present invention, even if the surface of the insulating film that fills the groove to be the element isolation region has a differential shape, the concentration of the polishing pressure is alleviated by further forming the insulating film. . Therefore, the buried element isolation region can be formed without breaking the semiconductor substrate.

[Brief description of drawings]

FIG. 1 shows a first method for manufacturing a semiconductor device according to the present invention.
FIG.

FIG. 2 is a second diagram showing a method for manufacturing a semiconductor device according to the present invention.
FIG.

FIG. 3 is a third view showing a method for manufacturing a semiconductor device according to the present invention.
FIG.

FIG. 4 is a fourth view showing a method for manufacturing a semiconductor device according to the present invention.
FIG.

FIG. 5 shows a fifth method for manufacturing a semiconductor device according to the present invention.
FIG.

FIG. 6 is a diagram showing a pressure distribution during polishing in the present invention.

FIG. 7 is a first process sectional view showing the method of manufacturing the conventional semiconductor device.

FIG. 8 is a second process sectional view showing the method of manufacturing the conventional semiconductor device.

FIG. 9 is a third process sectional view showing the method of manufacturing the conventional semiconductor device.

FIG. 10 is a fourth process sectional view showing the method of manufacturing the conventional semiconductor device.

FIG. 11 is a diagram showing a conventional pressure distribution during polishing.

[Explanation of symbols]

11 ... Semiconductor substrate, 12 ... First silicon oxide film 13 ... First polycrystalline silicon film, 14 ... Resist pattern
15 ... Groove portion, 16 ... Second silicon oxide film 17 ... Second polycrystalline silicon film, 18 ... Third silicon oxide film

Claims (3)

[Claims] 1. A step of forming a first coating film on a semiconductor substrate, a step of selectively etching the first coating film and the semiconductor substrate to form a groove portion in the semiconductor substrate, and the groove portion. A step of forming a first insulating film on the first coating film so as to bury it, a step of selectively forming a second coating film on the first insulating film, and at least on the second coating film. A step of forming a second insulating film on the substrate, and a step of polishing the second insulating film and the first insulating film until the first coating and the second coating are exposed. A method for manufacturing a characteristic semiconductor device. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the first coating film is an insulating film or a laminated film of an insulating film and a semiconductor film. 3. The semiconductor according to claim 1, wherein the second film is a silicon nitride film, a polycrystalline silicon film, a carbon film, a refractory metal film or a refractory metal silicide film. Device manufacturing method.