JPH07288329A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To lower a level regarding the unpaired bonding hands of a silicon semiconductor film by ion-implanting more than one kind out of hydrogen, fluorine and chlorine into a silicon semiconductor film on a substrate having an insulated surface, and performing heat treatment in an atmosphere of these. CONSTITUTION:Elements of at least one kind chosen from hydrogen, flourine and chlorine are ion-implanted into a silicon film 12 formed on a glass substrate 11, and the unpaired bonding hands of the silicon in the silicon film 12 are neutralized, and the level in the silicon film 12 is lowered. Next a gate electrode 14 is formed, and in its periphery an oxide layer 15 is formed, and source/drain region 16/18 and a channel forming region 17 are formed. Next, an interlayer insulating film 19 is formed, and electrodes 20 and 21 and a silicon nitride film 22 as a final coat film are formed. And finally, heat treatment is performed in an atmosphere of either of hydrogen, fluorine or chlorine, or their mixtures. Consequently, ion-implanted elements are confined in an active layer, and unpaired bond hands and defects in the active layer are decreased.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for obtaining a semiconductor having excellent electric characteristics. Further, the present invention is
The present invention relates to a method for manufacturing a semiconductor device having excellent characteristics. Further, the present invention relates to a method for obtaining a thin film transistor (hereinafter referred to as TFT) having excellent characteristics.

[0002]

2. Description of the Related Art A thin film transistor (generally referred to as a TFT, hereinafter referred to as a TFT) is known as a thin film semiconductor element. This thin film transistor has a thin film semiconductor (generally a silicon semiconductor) of several hundred to several thousand liters formed on a substrate having an insulating surface (for example, a glass substrate), and the thin film semiconductor is used as an active layer to form a semiconductor device.

The field of application of TFTs is, for example, electro-optical devices such as liquid crystal display devices and image sensors. This uses a TFT directly formed on the glass substrate,
It constitutes a pixel driving circuit and a peripheral driver circuit.

When a glass substrate is used as the substrate, the thin film silicon semiconductor formed on the surface of the substrate becomes amorphous or crystalline. The crystalline state means a polycrystalline state, a microcrystalline state, or a state in which an amorphous state and a crystalline structure are mixed.

A TFT using an amorphous material is unsatisfactory in operating speed and electric characteristics, and its application range is limited. on the other hand,
When a silicon film having crystallinity (hereinafter referred to as a crystalline silicon film) is used, high speed operation and high electric characteristics can be obtained.

However, when a TFT is manufactured using a crystalline silicon film, the presence of the OFF current becomes a problem. For example, in a N-channel TFT, when a negative voltage is applied to the gate electrode, no current flows between the source and drain in principle. This is because when a negative voltage is applied to the gate electrode, the channel portion becomes P-type and a PN junction is formed between the source and drain.
However, in reality, crystal grain boundaries, defects, and dangling bonds are present in the crystalline silicon film, and a large number of levels caused by them are present. Therefore, in the opposite direction of the PN junction, transfer of charges through their levels occurs. Therefore, when the electric field is concentrated on the PN junction portion, current leaks in the opposite direction through the defects and traps. As a result, when a negative voltage is applied to the gate electrode, a current flows between the source and drain.

As a solution to this problem, an electric field is prevented from being concentrated between the channel and drain,
There is a method of forming an electric field relaxation region between the channel and the drain. This is a technique called LDD (Light Doped Drain). It is a lightly doped region (light N-type) between the channel (I-type) and drain (N-type).
(Type) to prevent electric field concentration at the junction between the channel and the drain.

A method of providing an offset gate is also known as a method of obtaining the same effect as that of the LDD.
This is to avoid concentration of an electric field between the channel and the drain by providing a region that does not function as the drain region between the region functioning as the channel and the drain region.

As described above, there is a problem that the off current of the TFT increases due to the defects and traps in the film.
Further, the defects and traps in the film hinder the movement of carriers in the film and hinder the operation of the TFT.

On the other hand, in the TFT, the interface characteristics between the channel and the gate insulating film are extremely important. If this interface characteristic is poor, the characteristics of the TFT will be greatly impaired. This interface characteristic is evaluated by an index called an interface level. This interface state is caused by defects and dangling bonds. In order to obtain a TFT having high characteristics, it is important to reduce the interface level at the interface between the channel and the gate insulating film.

[Problems to be Solved by the Invention] In order to solve the problem of the OFF current of the TFT and the problem of the interface state at the interface between the channel and the gate insulating film boundary, the present invention provides a thin film silicon semiconductor. It is an object to provide a technique for reducing levels (these are associated with dangling bonds).

Further, the present invention has another object to obtain a TFT having excellent characteristics. Another object of the present invention is to obtain a silicon semiconductor film having few levels.

[Means for Solving the Problems] One of the main constitutions of the present invention is a step of forming a silicon semiconductor film on a substrate having an insulating surface, and a step of forming hydrogen, fluorine or chlorine on the silicon semiconductor film. One of them, or two of them, or all of them are ionized and accelerated to be injected into the silicon semiconductor film, and after the step, the silicon semiconductor film is added with hydrogen, fluorine, or chlorine, or And a step of performing heat treatment in the mixed atmosphere.

In the above structure, the substrate having an insulating surface is, for example, a glass substrate, a glass substrate having an insulating film formed thereon, a semiconductor substrate having an insulating film formed thereon, a metal substrate having an insulating film formed thereon, or another insulating material. A substrate composed of

Examples of the silicon semiconductor film include an amorphous silicon semiconductor and a crystalline silicon semiconductor. These silicon semiconductor films are formed by a plasma CVD method or a low pressure thermal CVD method. As the crystalline silicon film, an amorphous silicon film formed by a plasma CVD method or a low pressure thermal CVD method and crystallized by heating or irradiation with laser light or strong light equivalent thereto can be used.

As a method of ionizing and implanting hydrogen, fluorine and chlorine in the above steps, a known ion implanting apparatus or plasma doping apparatus may be used. As a method for producing ions, an appropriate method such as a method of generating plasma by high-frequency discharge to generate ions, a method of generating ions by mass separation, or the like can be used. In the present invention, the necessary ion implanting device has a configuration capable of implanting hydrogen ions, fluorine ions, chlorine ions, etc. into the silicon semiconductor film by applying an accelerating voltage. For example, when using a plasma doping apparatus, hydrogen gas, chlorine gas, or fluorine gas may be used as the doping gas. Also, hydrogen chloride, hydrogen fluoride, etc. can be used as the doping gas,
For example, when hydrogen chloride is used as the doping gas, both chlorine and hydrogen will be injected into the silicon semiconductor. Of course, the implantation depth of each element may be the same or different depending on the ion species and the acceleration voltage.

Further, in the above structure, the silicon semiconductor film is heat-treated in an atmosphere of hydrogen, fluorine, chlorine, or a mixture thereof, because the hydrogen atoms, fluorine atoms, chlorine ion-implanted in the previous step are used. This is because the atoms are confined in the silicon semiconductor and further the neutralization of dangling bonds by hydrogen, fluorine, or chlorine is promoted.
In this case, the heat treatment can be performed in an arbitrary atmosphere regardless of the previously implanted elements. For example, after injecting chlorine, heat treatment in a hydrogen atmosphere or heat treatment in a chlorine atmosphere can be performed, and an appropriate combination may be selected depending on a device and a required effect. In addition, the atmosphere in this case is not limited to the atmosphere of each element alone, but may be diluted with other appropriate gas or may be a compound gas. For example, a mixed atmosphere of hydrogen and nitrogen in an appropriate ratio or an atmosphere of hydrogen chloride is possible. Whether the element to be implanted is hydrogen, chlorine, or fluorine is selected depending on problems in the device and the characteristics required for the silicon semiconductor film. Generally, it is easy to implant hydrogen, and since hydrogen is light, hydrogen can be implanted even into a deep portion of a silicon semiconductor even at a low acceleration voltage. Therefore, the damage given to the silicon semiconductor is also slight. On the other hand, in the case of implanting fluorine or chlorine having a larger ionic radius, a higher accelerating voltage is required to implant even deeper positions.
In addition, the damage to the silicon semiconductor is also large.
However, since the ionic radius is large and the binding energy with silicon is larger, the possibility that these elements will be detached by an external electric field is reduced. The bond strength with silicon becomes smaller in the order of chlorine, fluorine, and hydrogen. In particular, the difference in bond energy between chlorine-silicon bond and fluorine-silicon bond is not so different, but the bond energy of hydrogen-silicon bond is Extremely small. As an example, the chlorine-silicon bond and the fluorine-silicon bond start to dissociate at a temperature of 500 ° C. or higher for the first time, but the hydrogen-silicon bond is 150 to 20.
It begins to dissociate at 0 ° C and completely decomposes at 350-500 ° C.

Another main structure of the present invention is: a step of forming a silicon semiconductor film on a substrate having an insulating surface; a step of forming an insulating film on the silicon semiconductor film; and hydrogen from the insulating film. And ionizing at least one element selected from fluorine and chlorine. After this step, heat treatment may be performed in an atmosphere of hydrogen, fluorine, chlorine, or a mixture thereof.

Generally, when a TFT is formed by using a silicon semiconductor film, a structure of an insulating gate type field effect transistor is adopted. Then, a silicon oxide film or a silicon nitride film is adopted as the gate insulating film. In this case, the interface characteristics between the silicon semiconductor film and the gate insulating film are extremely important.

Therefore, in the above invention, hydrogen, chlorine, and fluorine are ionized and implanted in a state where the insulating film is formed on the silicon semiconductor film, thereby neutralizing dangling bonds of silicon in the silicon semiconductor. At the same time, the interface state at the interface between the silicon semiconductor and the insulating film is reduced. Since the interface state is caused by the dangling bond, the dangling bond can be neutralized by injecting hydrogen, fluorine, or chlorine. Then, the interface state can be reduced. Whether to inject hydrogen, chlorine, or fluorine alone or in combination may be selected in consideration of a usable device and required characteristics.

In the above structure, the effect can be further enhanced by setting the projected range of ions such as hydrogen, fluorine and chlorine near the interface between the silicon semiconductor film and the insulating film. The projected range is an index that gives the highest established depth of the rest position of ions implanted in a solid. Therefore, setting the projected range of hydrogen, fluorine, and chlorine ions near the interface between the silicon semiconductor film and the insulating film means that most hydrogen, chlorine, and fluorine are near the interface between the silicon semiconductor film and the insulating film. Means to exist. As a result, the dangling bonds of silicon are neutralized mainly in the vicinity of the interface between the silicon semiconductor film and the insulating film, and the interface level at the interface between the silicon semiconductor film and the insulating film can be greatly reduced. it can. However, since hydrogen, chlorine, and fluorine have different masses, when a plurality of elements are combined and injected, some elements may exist in the vicinity of the interface, but other elements may not. Also in this case, which element is often present in the vicinity of the interface may be selected according to the required characteristics. In general, the chlorine-silicon bond and the fluorine-silicon bond have large bond energy also in the hydrogen-silicon bond force, and therefore, if a large amount of chlorine or fluorine is present in the vicinity of the interface, the interface characteristics are stabilized.

Further, in the above structure, it is more effective to set the projected range of the ions of hydrogen, fluorine and chlorine to the silicon semiconductor side rather than the interface between the silicon semiconductor film and the insulating film. This is because there are more dangling bonds of silicon that cause the interface state on the silicon semiconductor side.

After the step of implanting the above elements, heat treatment is carried out at an appropriate temperature in an atmosphere of hydrogen, fluorine, chlorine alone or a mixture thereof, so that the silicon semiconductor and the insulating film formed thereon are ionized. The dangling bonds generated as a result of the injection of can be terminated with these elements, and a more stable state can be obtained. Also in this case, the heat treatment can be performed in an arbitrary atmosphere regardless of the previously implanted elements. Further, not only the atmosphere of each element simple substance, but also diluted with other appropriate gas or compound gas may be used.

Another main structure of the present invention is a step of forming source and drain regions by implanting an impurity imparting one conductivity type into the active layer using the gate electrode as a mask, and after the step, And ionizing at least one element selected from hydrogen, fluorine, and chlorine into the source and drain regions.

A concrete example of the above configuration is shown in FIG. Here, an example is shown in which hydrogen is selected as the element to be implanted.
In FIG. 3B, phosphorus ions (P ⁺ ) are implanted using the gate electrode 14 and the oxide layer 15 around it as a mask. By implanting the phosphorus ions, the source / drain regions 16 and 18 are formed. Then, after that step, hydrogen ion implantation is performed. This step may be performed before phosphorus ion implantation. In particular, a region where the conductivity type of impurities changes is referred to as a junction and a high electric field is often applied. Examples of such a joint include a PN junction, a PI junction,
Although there is an NI junction or the like, when an unpaired bond is present in such a silicon semiconductor or an insulating film near the junction or at the interface between the two, electrons and holes emitted by a high electric field are It is captured by an unpaired bond. These act as charge centers to induce N-type or P-type conductivity in semiconductor properties, particularly in a substantially intrinsic (I-type) semiconductor region. Such dangling bonds can be terminated by hydrogen, chlorine, or fluorine, but in order to effectively introduce these elements, these elements may be ionized and injected. Whether to inject hydrogen, chlorine, or fluorine alone or in combination may be selected in consideration of a usable device and required characteristics. Furthermore, after the step of implanting the above elements, if heat treatment is performed at an appropriate temperature in an atmosphere of hydrogen, fluorine, chlorine alone, or a mixture thereof,
The dangling bonds generated as a result of implanting ions into the silicon semiconductor and the insulating film formed thereon can be terminated by these elements, and a more stable state can be obtained.
Also in this case, the heat treatment can be performed in an arbitrary atmosphere regardless of the previously implanted elements. Further, not only the atmosphere of each element simple substance, but also diluted with other appropriate gas or compound gas may be used.

Another main structure of the present invention is to form a source and drain region by implanting an impurity imparting one conductivity type into the active layer using the gate electrode as a mask, and the source and drain region. To the source and drain regions by ionizing at least one element selected from hydrogen, fluorine, and chlorine, and irradiating with laser light or strong light equivalent thereto to perform optical annealing. And a step of performing.

FIG. 4 shows a specific example of the above configuration. Here, an example is shown in which hydrogen is selected as the element to be implanted.
In FIG. 4B, phosphorus ions are implanted using the gate electrode 14 and the oxide layer 15 around it as a mask. Then, in the step shown in (C), laser light is irradiated,
The damage caused by the previous ion implantation is annealed and the implanted phosphorus is activated. However, at that time, hydrogen that terminates the dangling bonds of the silicon semiconductor is released from the silicon semiconductor. There is no problem if the dangling bonds disappear by the laser irradiation, but in the case of a pulsed laser in particular, since the irradiation time is short, a large strain is likely to remain in the crystal.
Therefore, in the step (D), hydrogen ions are implanted, and in the ion implantation in the step (B) and the laser beam irradiation in the step (C), hydrogen desorbed from the silicon film can be replenished. it can. Further, when the whole is heat-treated in a hydrogen atmosphere as in the step (E),
More effective.

[0028]

By ionizing and injecting hydrogen, fluorine, or chlorine into the silicon semiconductor film, the insulating film, or the interface between them, the dangling bonds in the silicon film can be neutralized, and their electrical characteristics Can be improved. On this occasion,
Different from the usual heat treatment in an atmosphere of hydrogen, chlorine, fluorine, etc., more effectively in the silicon semiconductor film or insulating film,
Alternatively, these elements can be introduced at the interface between the two. In particular, with regard to chlorine and fluorine, it is extremely difficult to permeate the inside (particularly inside the crystalline silicon) by ordinary heat treatment, and ionization is performed as in the present invention to electrically accelerate,
It is more effective to inject.

When hydrogen, fluorine or chlorine is ionized and implanted into the silicon film having the insulating film formed thereon, the interface state between the silicon film and the insulating film can be reduced. In particular,
When implanting hydrogen, fluorine, or chlorine ions, the effect can be enhanced by setting the projected range near the interface between the silicon film and the insulating film.

When ions of hydrogen, fluorine, or chlorine are implanted into the silicon film after ion implantation of impurities into the silicon film or irradiation with laser light, the silicon film and / or the insulating film produced by ion implantation or laser light irradiation, or both. It is possible to supplement the dangling bonds and interface states generated at the interface.

In any of the above cases, a larger effect can be obtained by ionizing and injecting hydrogen, chlorine, or fluorine and then performing heat treatment in hydrogen, fluorine, or chlorine alone or in a mixed atmosphere. You can

[0032]

EXAMPLES Hereinafter, examples in which the present invention is used in a TFT manufacturing process will be described. In each of the following embodiments, an example in which the present invention is carried out in each TFT manufacturing process is shown, but it is naturally possible to combine a plurality of embodiments. For example, it is naturally possible to implant hydrogen ions, fluorine ions, or chlorine ions in a plurality of required steps.

Example 1 In this example, hydrogen ions are implanted into a crystalline thin film silicon semiconductor (referred to as a crystalline silicon film) formed on a substrate having an insulating surface, and the above-mentioned crystal is formed. It eliminates dangling bonds and defects existing in the crystalline silicon film and reduces traps in the film.
Then, this is an example of manufacturing a TFT using this crystalline silicon film.

FIG. 1 shows the manufacturing process of this embodiment. In this embodiment, a glass substrate is used as a substrate having an insulating surface,
An example of forming a TFT on the surface is shown. First, Corning 7059 glass is prepared as the glass substrate 11. Then, a silicon oxide film (not shown) to be a base film is formed on the surface thereof to a thickness of 2000 Å by a sputtering method. Next, an amorphous silicon film is formed to a thickness of 1000Å by plasma CVD method or low pressure thermal CVD method. Then, the amorphous silicon film is crystallized by heating, irradiation with laser light or intense light, and a method combining them. Thus, a crystalline silicon film is obtained.

Next, the crystalline silicon film is patterned into a shape required as an active layer of the TFT, and the crystalline silicon film 1 shown in FIG.
An active layer designated by 2 is obtained. Here, hydrogen ions are implanted into the active layer 12 formed of the crystalline silicon film. The device shown in FIG. 5 is used for the implantation of hydrogen ions. The apparatus shown in FIG. 5 includes a chamber 51, a sample holder (substrate holder) 58 disposed inside the chamber 51, an anode electrode 54, a power source 53 for supplying a high voltage to the anode electrode 54, and a grid electrode 55. . A voltage of 100 kV at maximum is applied to the anode electrode 54. Due to this high voltage, the cations 56 ionized by the RF discharge or the like in the vicinity of the grid electrode 55 are not generated.
8 is accelerated in the direction of the substrate (sample) placed on the substrate 8. As a result, accelerated cations are implanted into the substrate.

In this example, hydrogen ions were implanted under the following conditions. Accelerating voltage: 20 KeV Dose amount: 1 × 10 ¹⁶ cm ^-2 Thus, as shown in FIG. 1 (A), hydrogen ions are implanted into the active layer 12 formed of the crystalline silicon film, and internal defects and traps are removed. Can be reduced. Next, a silicon oxide film 13 to be a gate insulating film is formed by sputtering to 1000
Form to a thickness of Å. (Fig. 1 (B))

Next, a film containing aluminum as a main component is formed into 50 parts.
It is formed by vapor deposition to a thickness of 00Å. The film containing aluminum as the main component is patterned to form the gate electrode 14. Further, an oxide layer 15 is formed around the gate electrode 14 made of a material containing aluminum as a main component by using an anodic oxidation method. The oxide layer 15 is formed to have a thickness of 2000 Å, for example. The presence of the oxide layer 15 makes it possible to form an offset gate region by forming a mask on the side surface of the gate electrode 14 in the subsequent ion implantation process of impurities imparting one conductivity type.

The gate electrode may be made of another metal material or semiconductor material, or a laminated body or mixture thereof. Then, P (phosphorus) ions are implanted, and 16 and 1
P ions are implanted in the region indicated by 8. At this time, the oxide layer 15 serves as a mask, and the portion indicated by 10 can be provided as an offset gate region. (Fig. 1
(C)) In this example, since P ions were implanted in this step, the completed TFT becomes an N channel type. If B ions are implanted here, a P-channel TFT can be obtained.

Next, the P ions implanted in the step (C) are activated, and annealing is performed by laser light irradiation in order to recover the damage received during the ion implantation. Here, using a KrF excimer laser, 100 to 300
Irradiation for one to several shots is performed with a power density of mJ / cm ² . In this process, at the same time as the laser light irradiation, 30
It is effective to use heating at about 0 degrees in combination. Thus, the source / drain regions, 16/18 can be formed. At the same time, the channel forming region 17 is self-aligned.
Is formed. (Fig. 1 (D))

Instead of irradiating with laser light, strong light equivalent thereto, for example infrared light, may be irradiated to perform annealing. Infrared light is hard to be absorbed by the glass substrate,
Since it is easily absorbed by silicon, only silicon can be selectively heated. Heating using such infrared light is
It is called TA (Rapid Thermal Annealing). Also, annealing may be performed using a heating means such as a heater.

Next, a silicon oxide film is formed as an interlayer insulating film 19 to a thickness of about 8000 Å by a plasma CVD method using TEOS as a raw material. In forming the silicon oxide film by the plasma CVD method, it is necessary to set the heating temperature to 350 degrees or less. This is to prevent the desorption of the hydrogen ions implanted in the step (A).

Next, holes are patterned for wiring, and electrodes 20 and 21 are formed using aluminum or a multilayer film of aluminum and another metal. Further, a silicon nitride film 22 of 1000 to 1000 is formed as a final coat film.
It is formed to a thickness of 5000Å, for example 3000Å. The silicon nitride film 22 may be formed by a plasma CVD method using silane and ammonia as source gases. (Fig. 1
(E))

Finally, hydrogenation annealing is performed at a temperature of 350 to 500 ° C. for 1 hour in a hydrogen atmosphere at normal pressure to complete the TFT. Here, fluorination annealing may be performed instead of hydrogenation annealing, or chlorination annealing may be performed. By this hydrogenation annealing, the hydrogen ion-implanted in the step (A) can be confined in the active layer, and the dangling bonds and defects in the active layer can be more thoroughly reduced. Note that hydrogen desorption is performed before the formation of the silicon nitride film which is the final coat film, and then the final coat film is formed, so that desorption of hydrogen can be prevented.

[Embodiment 2] In this embodiment, after a crystalline silicon film is formed, a silicon oxide film is formed thereon, and then hydrogen ions are implanted to form a crystalline silicon film and a silicon oxide film. Good interface characteristics are obtained by lowering the interface state at the interface. Then, this crystalline silicon film is used as an active layer of a TFT, and a silicon oxide film is used as a gate insulating film, which is an example of manufacturing a TFT.

FIG. 2 illustrates the manufacturing process of this embodiment. The reference numerals shown in FIG. 2 indicate the same parts as those shown in FIG. 1 unless otherwise specified. In this embodiment, a Corning 7059 glass substrate is used as the substrate having an insulating surface. First, a silicon oxide film is formed as a base film (not shown) on the glass substrate 11 to a thickness of 2000 Å by a sputtering method.

Next, an amorphous silicon film is formed to a thickness of 1000 Å by plasma CVD method or low pressure thermal CVD method. And heating or irradiation of laser light or strong light,
Further, the amorphous silicon film is crystallized by a method combining them. Thus, a crystalline silicon film is obtained.

Next, the crystalline silicon film is patterned into a shape required as an active layer of a TFT, and the crystalline silicon film 1 shown in FIG.
An active layer designated by 2 is obtained. Next, a silicon oxide film 13 to be a gate insulating film is formed to a thickness of 1000Å by a sputtering method. Then, hydrogen ions are implanted into the active layer 12 formed of a crystalline silicon film through the silicon oxide film 13.
The hydrogen ion implantation is performed using the device shown in FIG.
(FIG. 2 (B)) In this example, the acceleration voltage was set so that the projected range was near the interface between the active layer and the silicon oxide film. The specific conditions are as follows. Accelerating voltage: 35 KeV Dose amount: 1 × 10 ¹⁶ cm ^-2

By implanting hydrogen ions as shown in FIG. 2B, the active layer 1 made of a crystalline silicon film is formed.
The number of traps and defects at the interface between 2 and the silicon oxide film 13 and in the vicinity thereof is reduced, and a structure having a good interface state can be obtained. Next, a film containing aluminum as a main component is formed to a thickness of 5000 Å by vapor deposition. The gate electrode 1 is formed by patterning this aluminum-based film.
4 is formed. Further, an oxide layer 15 is formed around the gate electrode 14 made of a material containing aluminum as a main component by using an anodic oxidation method. This oxide layer 15 is
For example, it is formed to a thickness of 2000Å.

The gate electrode may be made of another metal material or semiconductor material, or a laminated body or mixture thereof. Then, P (phosphorus) ions are implanted, and 16 and 1
P ions are implanted in the region indicated by 8. At this time, the oxide layer 15 serves as a mask, and the portion indicated by 10 can be provided as an offset gate region. (Fig. 2
(C))

In this example, since P ions were implanted in this step, the completed TFT becomes an N channel type. If B ions are implanted here, a P-channel TFT can be obtained. Next, the activation of the P ions implanted in the step (C) and the annealing by the irradiation of laser light are carried out to recover the damage received during the ion implantation. Here, a KrF excimer laser is used, and a power density of 100 to 300 mJ / cm ² is used.
~ Irradiate several shots. In this step, it is effective to use laser beam irradiation together with heating at about 300 degrees. Thus, the source / drain regions, 1
You can get 6/18. Further, the channel forming region 17 is formed in a self-aligned manner. (Fig. 2 (D))

The annealing process may be performed by RTA by irradiation with infrared light or by heating. Next, a silicon oxide film is formed as the interlayer insulating film 19 to a thickness of about 8000 Å by a plasma CVD method using TEOS as a raw material.
It is necessary to set the heating temperature to 350 degrees or less. This is to prevent the release of hydrogen ions implanted in the step (B). Next, holes are patterned for wiring, and electrodes 20 and 21 are formed using aluminum or a multilayer film of aluminum and another metal. Further, a silicon nitride film 22 is formed as a final coat film.
(Fig. 2 (E))

Finally, hydrogenation annealing is performed for 1 hour at a temperature of 350 to 500 ° C. in a hydrogen atmosphere at normal pressure to complete the TFT. This hydrogenation anneal
This is for confining the hydrogen ion-implanted in the step (B) in the active layer and further thoroughly reducing the dangling bonds and defects in the active layer. As in the present embodiment, after forming a silicon semiconductor film, a silicon oxide film is formed on the silicon semiconductor film, and then hydrogen ions are implanted, whereby the interface level at the interface between the silicon semiconductor film and the silicon oxide film thereon is reduced. You can lower your rank. Especially, this structure is TF
A TFT having good characteristics can be obtained by applying it to the active layer of T and the gate insulating film.

[Embodiment 3] In this embodiment, in the process of manufacturing a TFT, H ⁺ ions (hydrogen ions) are implanted following the impurity implantation for imparting one conductivity type using the gate electrode as a mask, and the source / source Drain region and source /
It is intended to eliminate traps and defects in the junction between the drain region and the substantially intrinsic region where the channel is formed and in the vicinity thereof. FIG. 3 shows the manufacturing process of this embodiment. First, the silicon oxide film as the base film is 2000
Prepare a glass substrate with a thickness of Å. Here, a Corning 7059 glass substrate is used.

First, the glass substrate 11 on which the base film is formed
Amorphous silicon film is formed on top by plasma CVD method or reduced pressure heat CV
Formed to a thickness of 1000Å by D method. Then, the amorphous silicon film is crystallized by heating, irradiation with laser light or intense light, and a method combining them. Thus, a crystalline silicon film is obtained. Next, the crystalline silicon film is patterned into a shape required as an active layer of TFT to obtain an active layer 12 shown in FIG.

Next, a silicon oxide film 13 to be a gate insulating film is formed to a thickness of 1000Å by a sputtering method. Next, a film containing aluminum as a main component is formed to a thickness of 5000 Å by vapor deposition. The film containing aluminum as the main component is patterned to form the gate electrode 14. Further, an oxide layer 15 is formed around the gate electrode 14 made of a material containing aluminum as a main component by using an anodic oxidation method. The oxide layer 15 is formed to have a thickness of 2000 Å, for example.

Then, P (phosphorus) ions are implanted, and 16
P ions are implanted into the regions indicated by 18 and 18. At this time,
The oxide layer 15 serves as a mask, and the portion indicated by 10 can be provided as an offset gate region. (Fig. 3
(B)) Here, hydrogen ions are implanted. The hydrogen ion implantation is performed using the device shown in FIG. Ion implantation conditions are as follows. Accelerating voltage: 40 KeV Dose amount: 2 × 10 ¹⁶ cm ^-2

Next, in order to activate the P ions implanted in the steps (B) and (C), and to recover the damage received during the ion implantation in the steps (B) and (C), laser light is applied. Perform irradiation by irradiation. here,
Using a KrF excimer laser, 100-300 mJ /
Irradiation for one to several shots with a power density of cm ² . In this step, it is effective to use laser beam irradiation together with heating at about 300 degrees. (Fig. 3
(D)) The above-mentioned annealing process is performed by RTA as in the irradiation of infrared light described above.
Or by heating.

Next, a silicon oxide film is formed as an interlayer insulating film 19 to a thickness of about 8000 Å by the plasma CVD method using TEOS as a raw material. In forming the silicon oxide film by the plasma CVD method, it is necessary to set the heating temperature to 350 degrees or less. This is to prevent the release of hydrogen ions implanted in the step (C).

Next, holes are patterned for wiring to form electrodes 20 and 21 by using aluminum or a multilayer film of aluminum and another metal. (Fig. 2
(E)) And finally, in a hydrogen atmosphere at normal pressure,
Hydrogenation annealing is performed at a temperature of 350 to 500 ° C. for 1 hour to complete the TFT.

[Embodiment 4] In this embodiment, hydrogen ions are implanted after the source / drain regions are formed by ion implantation of impurities imparting one conductivity type by using the gate electrode as a mask and subsequent annealing. is there. First, a glass substrate having a silicon oxide film formed as a base film is prepared. Here, the silicon oxide film is formed into 200 by the sputtering method.
A Corning 7059 glass substrate having a thickness of 0Å is used.

First, the glass substrate 11 on which the base film is formed
Amorphous silicon film is formed on top by plasma CVD method or reduced pressure heat CV
Formed to a thickness of 1000Å by D method. Then, the amorphous silicon film is crystallized by heating, irradiation with laser light or intense light, and a method combining them. Thus, a crystalline silicon film is obtained. Next, the crystalline silicon film is patterned into a shape required as an active layer of the TFT to obtain an active layer 12 shown in FIG.

Next, a silicon oxide film 13 to be a gate insulating film is formed to a thickness of 1000Å by a sputtering method. Next, a film containing aluminum as a main component is formed to a thickness of 5000 Å by vapor deposition. The film containing aluminum as the main component is patterned to form the gate electrode 14. Further, an oxide layer 15 is formed around the gate electrode 14 made of a material containing aluminum as a main component by using an anodic oxidation method. The oxide layer 15 is formed to have a thickness of 2000 Å, for example.

Then, P (phosphorus) ions are implanted, and 16
P ions are implanted into the regions indicated by 18 and 18. At this time,
The oxide layer 15 serves as a mask, and the portion indicated by 10 can be provided as an offset gate region. (Fig. 4
(B)) Next, in order to recover the damage received during the ion implantation step shown in (B), an annealing process by laser light irradiation is performed. Here, a KrF excimer laser is used, and a power density of 100 to 300 mJ / cm ² is used.
~ Irradiate several shots. In this step, it is effective to use laser beam irradiation together with heating at about 300 degrees. (Fig. 3 (D))

Next, as shown in FIG. 4D, hydrogen ion implantation is performed. This step uses the device shown in FIG.
Perform under the following conditions. Accelerating voltage: 40 KeV Dose amount: 2 × 10 ¹⁶ cm ^{-2 By} this step, hydrogen desorbed in the ion implantation step shown in (B) and the laser light irradiation shown in (D) can be replenished. it can.

Next, a silicon oxide film is formed as the interlayer insulating film 19 to a thickness of about 8000 Å by plasma CVD method using TEOS as a raw material. In the film formation of the silicon oxide film by this plasma CVD method, a heating temperature is set. It is necessary to set it to 350 degrees or less. This is to prevent the release of hydrogen ions implanted in the step (D).

Next, holes are patterned for wiring, and electrodes 20 and 21 are formed using aluminum or a multilayer film of aluminum and another metal. Further, a silicon nitride film 22 is formed as a final coat film.
(FIG. 2 (E)) Finally, in a hydrogen atmosphere at normal pressure, 350 to
Perform hydrogenation annealing at a temperature of 500 degrees for 1 hour, and
Complete T.

[Embodiment 5] In this embodiment, hydrogen ions are first implanted in a state where a gate electrode is formed on an active layer, and then ion implantation of an impurity imparting one conductivity type is performed using the gate electrode as a mask. Then, after the source / drain regions are formed by annealing and subsequent annealing, hydrogen ions are implanted for the second time. That is, by combining the manufacturing processes shown in Example 1 and Example 4, TF
This is an example of obtaining T.

First, a glass substrate having a silicon oxide film formed as a base film is prepared. Here, a Corning 7059 glass substrate having a silicon oxide film formed to a thickness of 2000 Å by a sputtering method is used. First, as shown in FIG. 6A, an amorphous silicon film is formed to a thickness of 1000 Å on the glass substrate 11 on which the base film is formed by the plasma CVD method or the low pressure thermal CVD method. Then, nickel element is introduced into the surface of the amorphous silicon film as a catalyst element for promoting crystallization, and thereafter, crystallization is performed by heat treatment at 550 ° C. for 8 hours. Thus, a crystalline silicon film is obtained.

Next, the crystalline silicon film is patterned into a shape required as an active layer of a TFT, and the crystalline silicon film 1 shown in FIG.
An active layer designated by 2 is obtained. Then, a silicon oxide film 13 serving as a gate insulating film is formed to a thickness of 1000 Å by the sputtering method. Here, hydrogen ion implantation is performed. Here, using the apparatus shown in FIG. 5, hydrogen ions are implanted under the following conditions.

Accelerating voltage: 20 KeV Dose amount: 1 × 10 ¹⁶ cm ^-2 Here, the projected range of hydrogen ions was set near the upper part of the active layer. Thus, as shown in FIG. 6A, hydrogen ions are implanted into the active layer 12 formed of the crystalline silicon film, and a state in which internal defects and traps are reduced is obtained. At the same time, it is possible to reduce the level at the interface between the crystalline silicon film forming the active layer 12 and the gate insulating film and in the vicinity thereof.

Next, a film containing aluminum as a main component is formed into 50 parts.
It is formed by vapor deposition to a thickness of 00Å. The film containing aluminum as the main component is patterned to form the gate electrode 14. Further, an oxide layer 15 is formed around the gate electrode 14 made of a material containing aluminum as a main component by using an anodic oxidation method. The oxide layer 15 is formed to have a thickness of 2000 Å, for example.

Then, P (phosphorus) ions are implanted, and 16
P ions are implanted into the regions indicated by 18 and 18. At this time,
The oxide layer 15 serves as a mask, and the portion indicated by 10 can be provided as an offset gate region. (Fig. 6
(C)) Next, in order to recover the damage received in the ion implantation step shown in (C), an irradiation by laser light irradiation is performed. Here, using a KrF excimer laser,
Irradiation for 1 to several shots is performed with a power density of 100 to 300 mJ / cm ² . In this step, it is effective to use laser beam irradiation together with heating at about 300 degrees. Thus source / drain regions, 16/18 are obtained.

Next, as shown in FIG. 6D, hydrogen ions are implanted again. This step is performed using the apparatus shown in FIG. 5 under the following conditions. Accelerating voltage: 40 KeV Dose amount: 2 × 10 ¹⁶ cm ^{-2 In} this step, hydrogen ions are implanted into the source / drain regions, 16/18. It is considered that the hydrogen ions implanted in this step penetrate into the offset region 10 and the channel formation region 17 and help reduce the level in those regions.

Next, a silicon oxide film is formed as the interlayer insulating film 19 to a thickness of about 8000 Å by the plasma CVD method using TEOS as a raw material. In forming the silicon oxide film by the plasma CVD method, it is necessary to set the heating temperature to 350 degrees or less. This is to prevent the desorption of hydrogen ions implanted in the steps (B) and (D).

Next, holes are patterned for wiring, and electrodes 20 and 21 are formed using aluminum or a multilayer film of aluminum and another metal. Further, a silicon nitride film 22 is formed as a final coat film.
(FIG. 2 (E)) Finally, hydrogenation annealing is performed at a temperature of 360 ° C. for 1 hour in a hydrogen atmosphere at normal pressure to complete the TFT.

The characteristics of the TFT obtained in this example are shown by the curve (A) in FIG. A curve (B) is an example of a TFT manufactured by omitting the step of implanting hydrogen ions in the structure shown in this embodiment. Therefore, (A) and (B)
It can be said that the difference in characteristics is caused by the presence or absence of the hydrogen ion implantation step performed in FIGS. 6B and 6D.

As shown in FIG. 7, the TFT of this embodiment
Has a small OFF current and a large ON current. That is,
It can be seen that the TFT has an excellent ON / OFF ratio. On the other hand, the characteristics of the TFT shown in (B) in which the hydrogen ion implantation process is not performed show that the OFF current does not decrease and the ON current does not decrease.
It can be seen that the current is also small.

FIG. 8 shows a TFT corresponding to FIG.
A curve (A ') showing the mobility characteristic of the TFT and a curve (B') showing the mobility characteristic of the TFT corresponding to FIG. 7B are shown. As can be seen from FIG. 8, it can be seen that by implanting hydrogen ions as shown in this embodiment, a TFT with high mobility can be obtained.

[Embodiment 6] In this embodiment, after a crystalline silicon film is formed, a silicon oxide film is formed thereon, and then fluorine ions are implanted to form a crystalline silicon film and a silicon oxide film. Good interface characteristics are obtained by lowering the interface state at the interface. Then, this crystalline silicon film is used as an active layer of a TFT, and a silicon oxide film is used as a gate insulating film, which is an example of manufacturing a TFT.

FIG. 9 illustrates the manufacturing process of this embodiment. In this embodiment, a Corning 7059 glass substrate is used as the substrate having an insulating surface. First, glass substrate 1
1. A silicon oxide film as a base film (not shown) on
A film is formed by sputtering to a thickness of Å.

Next, an amorphous silicon film is formed to a thickness of 1000 Å by plasma CVD method or low pressure thermal CVD method. And heating or irradiation of laser light or strong light,
Further, the amorphous silicon film is crystallized by a method combining them. Thus, a crystalline silicon film is obtained.
Next, the crystalline silicon film is patterned into a shape required as an active layer of the TFT to obtain an active layer 12 shown in FIG.

Next, a silicon oxide film 13 to be a gate insulating film is formed to a thickness of 1000 Å by the plasma CVD method. As the raw material gas, TEOS (tetra-ethoxy-
Silane) and oxygen were used. The silicon oxide film 13 thus obtained contains a large amount of hydrogen. It has been confirmed by secondary ion mass spectrometry (SIMS) that it typically contains about 10 ²¹ atoms / cm ³ . After that, fluorine ions are implanted into the active layer 12 made of a crystalline silicon film through the silicon oxide film 13. The implantation of fluorine ions is performed using the device shown in FIG. Fluorine gas or silicon tetrafluoride (SiF) is used as the doping gas.
₄ ) should be used. (FIG. 9B) In this example, the accelerating voltage was set so that the projected range was near the interface between the active layer and the silicon oxide film. The specific conditions are as follows. Accelerating voltage: 35 KeV Dose amount: 1 × 10 ¹⁶ cm ^-2

By implanting fluorine ions as shown in FIG. 9B, traps and defects at the interface between the active layer 12 made of a crystalline silicon film and the silicon oxide film 13 and in the vicinity thereof are reduced, A structure having a good interface state can be obtained. After this ion implantation process, 3
It is effective to perform heat treatment at a temperature of 50 to 500 ° C. Through this step, hydrogen remaining in the silicon film and the silicon oxide film is released. The elimination of hydrogen causes many dangling bonds of silicon, which are immediately terminated by the fluorine introduced by the previous ion implantation. As a result, since the generated silicon-fluorine bond is strong, it is less dissociated by an external electric field, which is preferable for the reliability of the device.

Next, a film containing aluminum as a main component is formed into 50 parts.
It is formed by vapor deposition to a thickness of 00Å. The film containing aluminum as the main component is patterned to form the gate electrode 14. Further, an oxide layer 15 is formed around the gate electrode 14 made of a material containing aluminum as a main component by using an anodic oxidation method. The oxide layer 15 is formed to have a thickness of 2000 Å, for example. The gate electrode may be made of another metal material, a semiconductor material, or a laminated body or mixture thereof.

Then, P (phosphorus) ions are implanted, and 16
P ions are implanted into the regions indicated by 18 and 18. In this case, for example, phosphine (PH ₃ ) is used as a doping gas by a plasma doping apparatus. At this time, the oxide layer 15 serves as a mask, and the portion indicated by 10 can be provided as an offset gate region.
(FIG. 9C) In this example, since P ions were implanted in this step, the completed TFT becomes an N-channel type. If B ions are implanted here, P channel TF
T can be obtained. Moreover, since phosphine is used as the material gas, hydrogen ions are simultaneously implanted.

Next, the activation of the P ions implanted in the step (C) and the annealing by the irradiation of laser light are carried out in order to recover the damage received during the ion implantation. Here, using a KrF excimer laser, 100 to 300
Irradiation for one to several shots is performed with a power density of mJ / cm ² . In this process, at the same time as the laser light irradiation, 30
It is effective to use heating at about 0 degrees in combination. Thus, the source / drain regions 16 and 18 can be obtained. Further, the channel forming region 17 is formed in a self-aligned manner. (FIG. 9 (D)) The annealing step is performed by the above-mentioned R by irradiation with infrared light.
It may be by TA or heating. In addition, before and after the step of irradiating the above laser or strong light equivalent thereto, 350 in a non-hydrogen atmosphere (for example, dry nitrogen atmosphere).
It is advisable to perform heat treatment at a temperature of up to 500 ° C. By this step, hydrogen contained in the film can be removed. This is because the plasma doping method is used in the present embodiment, so that a large amount of hydrogen ions are simultaneously implanted into the silicon film during the process of implanting P ions. If the hydrogen thus injected remains as it is, it bonds with silicon to form an unstable hydrogen-silicon bond. The heat treatment described above is effective in promoting the release of hydrogen and replacing the unstable hydrogen-silicon bond with a more stable fluorine-silicon bond.

Next, a silicon oxide film is formed as an interlayer insulating film 19 to a thickness of about 8000 Å by a plasma CVD method using TEOS as a raw material, and a heating temperature is set in the plasma CVD method. It can be set to 350 ° C. or higher. This is because the fluorine-silicon bond injected in the step (B) is strong, which is different from Example 2 in this respect. As a result, a dense silicon oxide film can be formed and the element can be prevented from changing over time. It is also possible to use a denser silicon nitride film having a higher film forming temperature for the interlayer insulating film, and a more favorable effect can be obtained.

Next, holes are patterned for wiring, and electrodes 20 and 21 are formed using aluminum or a multilayer film of aluminum and another metal. Further, a silicon nitride film 22 is formed as a final coat film.
(FIG. 9E) In the present embodiment, unlike the second embodiment, the hydrogenation annealing after the completion of the device is unnecessary. As in the present embodiment, after forming a silicon semiconductor film, a silicon oxide film is formed on the silicon semiconductor film, and then fluorine ions are implanted, whereby the interface level at the interface between the silicon semiconductor film and the silicon oxide film thereon is reduced. You can reduce the rank. Especially, this structure is TF
A TFT having good characteristics can be obtained by applying it to the active layer of T and the gate insulating film. In addition, silicon
Since the fluorine bond is stable, it is extremely unlikely to deteriorate even when a high voltage is applied to the device, and a highly reliable TFT
Can be provided.

[Embodiment 7] In this embodiment, in the manufacturing process of a TFT, chlorine ions are implanted following the impurity implantation for imparting one conductivity type with the gate electrode as a mask, and the source / drain regions and the source are formed. / This is to eliminate the traps and defects in the junction between the drain region and the substantially intrinsic region where the channel is formed and in the vicinity thereof.

FIG. 10 shows the manufacturing process of this embodiment. First, a glass substrate having a silicon oxide film as a base film formed to a thickness of 2000 Å is prepared. Here, a Corning 7059 glass substrate is used. First, an amorphous silicon film having a thickness of 1000 Å is formed on the glass substrate 11 on which the base film is formed by a plasma CVD method or a low pressure thermal CVD method. Then, the amorphous silicon film is crystallized by heating, irradiation with laser light or intense light, and a method combining them. Thus, a crystalline silicon film is obtained.

Next, the crystalline silicon film is patterned into a shape required as an active layer of the TFT to obtain an active layer shown by 12 in FIG. 10 (A). Next, a silicon oxide film 13 to be a gate insulating film is formed to a thickness of 1000Å by a sputtering method. Next, a film containing aluminum as a main component
It is formed by vapor deposition to a thickness of 00Å. The film containing aluminum as the main component is patterned to form the gate electrode 14. Further, an oxide layer 15 is formed around the gate electrode 14 made of a material containing aluminum as a main component by using an anodic oxidation method. The oxide layer 15 is formed to have a thickness of 2000 Å, for example.

Then, as in Example 6, P (phosphorus) ions are implanted using phosphine as a doping gas using a plasma doping apparatus, and P ions are implanted in the regions 16 and 18. At this time, the oxide layer 15 serves as a mask, and the portion indicated by 10 can be provided as an offset gate region. (FIG. 10 (B)) Subsequently, chlorine ion is implanted. Chlorine ion implantation is performed using the device shown in FIG. Chlorine gas may be used as the doping gas. Ion implantation conditions are as follows. Accelerating voltage: 40 KeV Dose amount: 1 × 10 ¹⁶ cm ^-2

Next, in order to activate the P ions implanted in the steps (B) and (C), and to recover the damage received during the ion implantation in the steps (B) and (C), laser light is applied. Anneal by irradiation. here,
Using a KrF excimer laser, 100-300 mJ /
Irradiation for one to several shots with a power density of cm ² . In this step, it is effective to use laser beam irradiation and heating at about 300 ° C. at the same time. (Fig. 10
(D)) The above-mentioned annealing process is performed by RTA as in the irradiation of infrared light described above.
Or by heating. Further, it is preferable to perform heat treatment at 350 to 500 ° C. in a non-hydrogen atmosphere (for example, a dry nitrogen atmosphere) before the above chlorine ion implantation, or before or after the step of irradiating a laser or strong light equivalent thereto. By this step, hydrogen contained in the film can be removed. This is because the plasma doping method is used in the present embodiment, so that a large amount of hydrogen ions are simultaneously implanted into the silicon film during the process of implanting P ions. If the hydrogen thus injected remains as it is, it bonds with silicon to form an unstable hydrogen-silicon bond. The above heat treatment is effective in promoting the release of hydrogen and replacing the unstable hydrogen-silicon bond with a more stable chlorine-silicon bond.

Next, a silicon oxide film is formed as an interlayer insulating film 19 to a thickness of about 8000 Å by the plasma CVD method using TEOS as a raw material. Further, patterning for forming holes for wiring is performed, and electrodes 20 and 21 are formed using aluminum or a multilayer film of aluminum and another metal. Then, a passivation film 22 of a silicon nitride film is formed to complete the device. (Fig. 10 (E))

[0095]

EFFECTS OF THE INVENTION One or more elements selected from hydrogen, fluorine, and chlorine are ionized and implanted into a silicon semiconductor film, an insulating film, or an interface thereof to form an impurity in these regions. The dangling bonds can be neutralized, or the interface state can be reduced. Further, using a semiconductor film in which one or more ions of hydrogen, fluorine, and chlorine are implanted, T
By making FT, TF with high reliability and characteristics
T can be obtained.

[Brief description of drawings]

FIG. 1 shows a manufacturing process of an example.

FIG. 2 shows a manufacturing process of an example.

FIG. 3 shows a manufacturing process of an example.

FIG. 4 shows a manufacturing process of an example.

FIG. 5 shows an apparatus for performing ion implantation.

FIG. 6 shows a manufacturing process of an example.

FIG. 7 shows TFT characteristics.

FIG. 8 shows the mobility of carriers in a TFT.

FIG. 9 shows a manufacturing process of an example.

FIG. 10 shows a manufacturing process of an example.

[Explanation of symbols]

 11 ... Glass substrate 12 ... Active layer 51 ... Chamber 58 ... Sample holder 54 ... Anode electrode 53 ... Power source 55 ... Grid electrode 56 ...・ ・ Cation, 13 ・ ・ ・ ・ Silicon oxide film 14 ・ ・ ・ ・ ・ ・ Gate electrode 15 ・ ・ ・ ・ Oxide layer 16 ・ ・ ・ ・ Source / drain region 18 ・ ・ ・ ・ Drain / source region 17 ・ ・ ・・ Channel forming region 19 ・ ・ ・ ・ ・ ・ Interlayer insulating film 20 ・ ・ ・ ・ ・ ・ Electrode 21 ・ ・ ・ ・ Electrode 22 ・ ・ ・ ・ Silicon nitride film

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H01L 21/265 H01L 21/265 P

Claims (11)

[Claims] 1. A step of forming a silicon semiconductor film on a substrate having an insulating surface, wherein the silicon semiconductor film is selected from hydrogen, fluorine and chlorine.
A step of ionizing and implanting more than one kind of element, and an atmosphere containing hydrogen, fluorine, or chlorine in the silicon semiconductor film, or an atmosphere containing hydrogen, fluorine, or chlorine as a main component The method for manufacturing a semiconductor device, comprising: 2. The method for manufacturing a semiconductor device according to claim 1, wherein the silicon semiconductor film has crystallinity. 3. A step of forming a silicon semiconductor film on a substrate having an insulating surface, a step of forming an insulating film on the silicon semiconductor film, and 1 selected from hydrogen, fluorine and chlorine on the insulating film. A method of manufacturing a semiconductor device, comprising the steps of ionizing and implanting more than one kind of element. 4. The method for manufacturing a semiconductor device according to claim 3, wherein the silicon semiconductor film has crystallinity. 5. The method for manufacturing a semiconductor device according to claim 3, wherein the insulating film is a silicon oxide film. 6. The method according to claim 3, wherein the implantation of one or more elements selected from hydrogen, fluorine and chlorine has a projection range in the vicinity of the interface between the silicon semiconductor film and the insulating film. Method for manufacturing semiconductor device. 7. A step of forming source and drain regions by implanting an impurity imparting one conductivity type into the active layer using the gate electrode as a mask, and after the step, hydrogen is added to the source and drain regions. And a step of ionizing and injecting one or more kinds of elements selected from fluorine and chlorine, and a method of manufacturing a semiconductor device. 8. A step of forming source and drain regions by injecting an impurity imparting one conductivity type into the active layer using the gate electrode as a mask, and irradiating the source and drain regions with laser light or strong light. Annealing, and a step of ionizing and implanting at least one element selected from hydrogen, fluorine and chlorine into the source and drain regions after the step of annealing. Manufacturing method. 9. A step of ionizing and implanting at least one element selected from hydrogen, fluorine and chlorine into a silicon semiconductor having an insulating film formed on the surface thereof, and the silicon semiconductor film and the insulating film. The insulating film and the silicon film by heat-treating the film in a hydrogen atmosphere, a fluorine atmosphere, a chlorine atmosphere, or an atmosphere containing a gas of hydrogen, fluorine, or chlorine as a main component. A method for manufacturing a semiconductor device, which comprises reducing an interface state with a semiconductor. 10. The method for manufacturing a semiconductor device according to claim 9, wherein the insulating film is a silicon oxide film. 11. The method according to claim 9, wherein at least one element selected from hydrogen, fluorine and chlorine is implanted so that its projected range is near the interface between the silicon semiconductor film and the insulating film. Method for manufacturing semiconductor device.