JPH0728420B2 - Digital video mixing circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a television image mixing circuit, and more particularly to a digital image mixing circuit that can be commonly used for composite signals and component signals.

[Conventional technology]

Conventionally, this type of digital video mixing circuit has been configured as shown in FIG. 2 for a composite, and has a configuration as shown in FIG. 3 for a component. . That is, in FIG. 2, when the input composite signal is n bits, the format conversion circuits 20 and 21 of FIGS. 1 and 2 add a sign bit with the pedestal level as zero level and add (n + 1) bits as the first and first bits. 2 is input to the multiplication circuits 22 and 23 and the key signal generation circuit 24
After being multiplied by the key signal of
The pedestal level was reproduced by the format conversion circuit 27 of and the output was obtained.

In FIG. 3, the component luminance signal is input to the first and second format conversion circuits 20 and 21 for pedestal removal, and is input to the first and second multiplication circuits 22 and 23 to be multiplied by the key signal. After that, the signals were mixed in the first adder circuit 25 and the pedestal was added in the fifth format conversion circuit 26 to obtain the output. Further, the component chroma signal is input to the third and fourth format conversion circuits 27 and 28 as a signal having positive / negative, and the offset binary code is converted into a 2'S complement code, and the third and fourth multiplications are performed. After being inputted to the circuits 29 and 30 and multiplied by the key signal of the key signal generating circuit 24, they are mixed in the second adding circuit 31 and the 2'S complement code is converted into an offset binary code in the sixth format converting circuit 32. It was converted and output the component chroma signal.

[Problems to be solved by the invention]

The digital video mixing circuit described above has a drawback that the number of bits of the multiplication circuit for the composite is increased by one bit from the number of bits of the input signal, and cannot be shared with the component.

It is an object of the present invention to provide a digital image mixing circuit that solves the above problems.

[Means for solving problems]

To achieve the above object, a digital image mixing circuit according to the present invention includes a first and second switching circuit, a first and third format conversion circuit, a second and fourth format conversion circuit, and 1 multiplication circuit, 2nd multiplication circuit, 3rd multiplication circuit, 4th multiplication circuit, 1st addition circuit, 2nd addition circuit, 5th format conversion circuit, A digital video mixing circuit having a format conversion circuit 6 and a third adder circuit, wherein the first and second switching circuits receive a composite signal, a component luminance signal, and a component chroma signal as input and composite / component signals. The signal is switched by a switching signal, and the first and third format conversion circuits output the output of the first switching circuit and the composite / component switching signal. First, the second and fourth format conversion circuits receive the output of the second switching circuit and the composite / component switching signal, and perform the format conversion. The multiplication circuit multiplies the output of the first format conversion circuit and the output of the key signal generation circuit, and the second multiplication circuit outputs the output of the second format conversion circuit and the key signal generation circuit. A third multiplication circuit for multiplying the output of the third format conversion circuit by the output of the key signal generation circuit; and a fourth multiplication circuit. Is for multiplying the output of the fourth format conversion circuit and the output of the key signal generation circuit, and the first adder circuit is the output of the first and second multiplication circuits. The second addition circuit adds the outputs of the third and fourth multiplication circuits, and the fifth format conversion circuit outputs the output of the first addition circuit. And the composite / component switching signal to perform format conversion and output a component luminance signal. The sixth format conversion circuit receives the output of the second adding circuit and the composite / component switching signal, The third addition circuit performs format conversion and outputs a component chroma signal, and the third addition circuit adds the outputs of the fifth and sixth format conversion circuits and outputs a composite signal. The switching circuit outputs the composite input signal, and the first format conversion circuit outputs the pedestal of the input signal. The bell is converted to 0 level, the third format conversion circuit sets the pedestal level of the input signal to 0 level, inverts the signal below the pedestal and outputs the inverted signal, and the second format conversion circuit is the first format conversion circuit. The fourth format conversion circuit performs the same conversion as the third format conversion circuit, and the fifth format conversion circuit has an input / output relationship of 1: 1. Is for converting 0 level to a pedestal level and inverting and outputting the pedestal level. At the component time, the first switching circuit outputs the component luminance signal to the first format conversion circuit and the chroma signal at the third format conversion circuit. Output to the second
Similarly, the switching circuit outputs the luminance signal to the second format conversion circuit and outputs the chroma signal to the fourth format conversion circuit, and the first and second format conversion circuits set the pedestal level of the input luminance signal to 0. And the third and fourth format conversion circuits convert the offset binary format of the input component chroma signal to the 2'S complement format, and the fifth format conversion circuit adds the pedestal level to the pedestal. The luminance signal is output after reproduction, and the sixth format conversion circuit performs offset binary format conversion from the 2'S complement and outputs a chroma signal.

〔Example〕

 An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, the digital image mixing circuit of the present invention is
And second switching circuits 1 and 2, first to fourth format conversion circuits 3 to 6 and fifth and sixth format conversion circuits 13 and 14, and first to fourth multiplication circuits 7 to 10. , The first and second adder circuits 11 and 12, the third adder circuit 15, and the key signal generation circuit 16.

The first switching circuit 1 has a first composite input signal
The component luminance input signal, the first component chroma input signal, and the second switching circuit the second composite input signal, the second component luminance input signal, and the second component chroma input signal,
In both cases, switching is performed by a composite / component switching signal. The first and third format conversion circuits 3 and 5 are connected to the first switching circuit 1, and the second and fourth format conversion circuits 4 and 6 are connected to the second switching circuit 2. The format conversion is performed by receiving the output of 2 and the composite / component switching signal. The first to fourth multiplication circuits 7 to 10 correspond to the corresponding first to fourth
Are respectively connected to the format conversion circuits and perform the multiplication of the output of the corresponding conversion circuit and the output of the key signal generation circuit 16. The third and fourth multiplication circuits 9 and 10 receive the composite / component switching signal input.

The first and second multiplication circuits 7 and 8 are connected to the first addition circuit 11, and the third and fourth multiplication circuits are connected to the second addition circuit 12.
9 and 10 are connected, and adder circuits 11 and 12 are connected to each 2
Adds the outputs of the two multiplier circuits. The fifth format conversion circuit 13 is connected to the first addition circuit 11, and the sixth format conversion circuit 14 is connected to the second addition circuit 12. In both cases, the format conversion is performed by receiving the composite / component switching signal and the outputs of the first or addition circuits 11 and 12, and the fifth format conversion circuit 13 outputs the component luminance signal and the sixth format conversion circuit 14 Outputs the component chroma signal.

The third adder circuit 15 is connected between the output terminals of the fifth and sixth format conversion circuits 13 and 14, and adds the outputs of both circuits to output a composite signal.

At the time of composite, both outputs of the first switching circuit 1 become a first composite input signal as shown in FIG. 4 and are input to the first and third format conversion circuits 3 and 5. The first format conversion circuit 3 reduces the pedestal level (60 levels) of the input signal to 0 as shown in FIG.
Convert to a level. In addition, the third format conversion circuit 5 sets the pedestal level of the input signal to 0 level, as shown in FIG.

The second format conversion circuit 4 performs the same conversion as the first format conversion circuit, and the fourth format conversion circuit 6 performs the same conversion as the third format conversion circuit 5.
In this way, the pedestal of the input signal is converted to an absolute value with the level 0, and the first to fourth multiplication circuits 7 to 10 multiply the key signal from the key signal generation circuit 16 and the first addition circuit 11 The pedestal or higher and the pedestal or lower are combined by the second adder circuit. The fifth format conversion circuit 13 has a one-to-one relationship of input and output, and the sixth format conversion circuit 14 converts 0 level to a pedestal level (60 level), inverts it, and outputs it. The video signals are combined by adding the two signals by the third adder circuit 15.

In the component mode, the first switching circuit 1 outputs a component luminance signal as shown in FIG. 5 to the first format conversion circuit 3 and a chroma signal to the third format conversion circuit 5.

Similarly, the second switching circuit 2 outputs the luminance signal to the second format conversion circuit 4, and the fourth format conversion circuit 6
Outputs chroma signal to.

The first and second format conversion circuits 3 and 4 convert the pedestal level (16 levels) of the input luminance signal to 0 level as shown in FIG. The third and fourth format conversion circuits 5 and 6 convert the offset binary format of the input component chroma signal into the 2'S complement format as shown in FIG.

The luminance signal is multiplied by the key signal from the key signal generation circuit 16 in the first and second multiplication circuits 7 and 8, and then the first addition circuit
The mixed signals are mixed in 11 and added to the pedestal level (16 levels) in the fifth format conversion circuit 13 for pedestal reproduction, and then output.

The chroma signal is multiplied by the key signal from the key signal generating circuit 16 in the third and fourth multiplying circuits 9 and 10. However, since the chroma signal is a 2'S complement format having positive / negative, it is different from the composite time. The multiplication format of the multiplication circuit is changed.

These two outputs are mixed by the second adder circuit 12, and then the sixth format conversion circuit 14 performs offset binary format conversion from the 2'S complement and outputs the result.

〔The invention's effect〕

As described above, according to the present invention, both the composite signal and the component signal can be handled by performing the format conversion of the signal corresponding to the composite signal and the component signal, and the bit number of the multiplication circuit can be increased by 1 bit even at the time of the composite signal. There is an effect that digital video signals can be mixed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a composite signal handled in the prior art, and FIG. 3 is a block diagram showing a component signal handled in the conventional technology. FIG. 4 is a diagram showing format conversion at the time of composite in the present invention, and FIG. 5 is a diagram showing format conversion at the time of component in the present invention. 1 ... 1st switching circuit, 2 ... 2nd switching circuit 3 ... 1st format conversion circuit, 4 ... 2nd format conversion circuit 5 ... 3rd format conversion circuit, 6 ... 4 format conversion circuit 7 ... first multiplication circuit, 8 ... second multiplication circuit 9 ... third multiplication circuit, 10 ... fourth multiplication circuit 11 ... first addition circuit, 12 ... … Second addition circuit 13 …… Fifth format conversion circuit, 14 …… Sixth format conversion circuit 15 …… Third addition circuit

Claims (1)

[Claims] 1. A first and a second switching circuit, and a first and a third.
Format conversion circuit, second and fourth format conversion circuits, a first multiplication circuit, a second multiplication circuit,
A third multiplication circuit, a fourth multiplication circuit, a first addition circuit, a second addition circuit, a fifth format conversion circuit, a sixth format conversion circuit, and a third addition circuit. A first and a second switching circuit for inputting a composite signal, a component luminance signal, and a component chroma signal, and switching the signal with a composite / component switching signal. The first and third format conversion circuits receive the output of the first switching circuit and the composite / component switching signal, and perform format conversion. The second and fourth format conversion circuits include the first and third format conversion circuits. The second conversion circuit receives the output of the second switching circuit and the composite / component switching signal, and performs format conversion. And a second multiplying circuit for multiplying the output of the first format converting circuit and the output of the key signal generating circuit, and the second multiplying circuit for outputting the output of the second format converting circuit and the key signal generating circuit. The third multiplication circuit multiplies the output of the third format conversion circuit and the output of the key signal generation circuit, and the fourth multiplication circuit A multiplication of the output of the fourth format conversion circuit and the output of the key signal generation circuit, and a first addition circuit that adds the outputs of the first and second multiplication circuits. The second adder circuit is for adding the outputs of the third and fourth multiplier circuits, and the fifth format conversion circuit is for outputting the output of the first adder circuit and the composite / component. Switching signal The sixth format conversion circuit receives the output of the second adder circuit and the composite / component switching signal, and performs the format conversion to generate the component chroma signal. The third adder circuit adds the outputs of the fifth and sixth format conversion circuits and outputs a composite signal. At the time of composite, the first switching circuit outputs the composite input signal. The first format conversion circuit converts the pedestal level of the input signal to 0 level, and the third format conversion circuit sets the pedestal level of the input signal to 0 level and inverts and outputs the signal below the pedestal, and , The second format conversion circuit is the same as the first format conversion circuit The fourth format conversion circuit performs the same conversion as the third format conversion circuit, and the fifth format conversion circuit has a one-to-one relationship with the input / output relationship, and the sixth format conversion circuit has 0 The level is converted to a pedestal level, inverted, and output. At the time of component, the first switching circuit 1 outputs the component luminance signal to the first format conversion circuit,
The chroma signal is output to the third format conversion circuit, the second switching circuit similarly outputs the luminance signal to the second format conversion circuit, and outputs the chroma signal to the fourth format conversion circuit. The second format conversion circuit converts the pedestal level of the input luminance signal to 0 level,
The third and fourth format conversion circuits convert the offset binary format of the input component chroma signal into the 2'S complement format, and the fifth format conversion circuit
The format conversion circuit of No. 2 outputs the luminance signal after adding the pedestal level to reproduce the pedestal, and the sixth format conversion circuit performs the offset binary format conversion from the 2'S complement and outputs the chroma signal. A digital image mixing circuit characterized by the above.