JPH07283439A - Semiconductor light emitting element and manufacturing method thereof - Google Patents

Semiconductor light emitting element and manufacturing method thereof

Info

Publication number
JPH07283439A
JPH07283439A JP7066494A JP7066494A JPH07283439A JP H07283439 A JPH07283439 A JP H07283439A JP 7066494 A JP7066494 A JP 7066494A JP 7066494 A JP7066494 A JP 7066494A JP H07283439 A JPH07283439 A JP H07283439A
Authority
JP
Japan
Prior art keywords
light emitting
semiconductor light
emitting device
junction
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7066494A
Other languages
Japanese (ja)
Other versions
JP3299839B2 (en
Inventor
Yoshinori Katsura
芳紀 桂
Akira Uemoto
章 上本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
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Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP7066494A priority Critical patent/JP3299839B2/en
Publication of JPH07283439A publication Critical patent/JPH07283439A/en
Application granted granted Critical
Publication of JP3299839B2 publication Critical patent/JP3299839B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE:To avoid damage and breakage to or near a PN junction part when an insulating substrate, etc., is mounted by a method wherein the PN junction part and the nearby parts exposed to at least one end of the vertical end to the PN junction surface of a semiconductor layer of a semiconductor light emitting element are formed on the positions lower than the surrounding vertical ends. CONSTITUTION:A PN junction part and a rear part thereof are concavely formed on the positions lower than the surrounding surfaces. At this time, if the maximum diameters of the metallic particles, etc., contained in anisotropical conductive region made bonding agents 9, 10 are assumed to be 5mum, the step difference between the PN junction parts and the surrounding faces 13 shall exceed at least 5mum. Accordingly, the PN junction and the surrounding parts 13 are to be made lower than the PN junction parts and the surrounding part 13 so that the pressure may be lightened thereby enabling the damage and breakage to or near the PN junction parts 13 to be avoided.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、超小型で高機能の半導
体発光素子及びその製造方法に関し、更に詳しくは、ブ
ラウン管や液晶ディスプレイ等と同等の性能を有し、更
に薄型、高精細で、低価格の表示装置等に採択し得る半
導体発光素子及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultra-compact and highly functional semiconductor light emitting device and a method for manufacturing the same, more specifically, it has the same performance as a cathode ray tube, a liquid crystal display, etc. The present invention relates to a semiconductor light emitting element that can be adopted in low-cost display devices and the like, and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来の半導体発光素子101の構造は図
11及び12に示すように、GaP やGaAs等よりなる
N型の半導体層102上に、同じくGaP やGaAs等よ
りなるP型の半導体層103を積層形成した後、PN接
合面104に平行な両端面上にAg やAu 等よりなる金
属薄膜を順次積層してP電極層111とN電極層112
が形成されている。
2. Description of the Related Art As shown in FIGS. 11 and 12, a conventional semiconductor light emitting device 101 has a structure in which a P-type semiconductor layer also made of GaP, GaAs or the like is formed on an N-type semiconductor layer 102 made of GaP, GaAs or the like. After stacking 103, a metal thin film made of Ag, Au, or the like is sequentially stacked on both end surfaces parallel to the PN junction surface 104 to form a P electrode layer 111 and an N electrode layer 112.
Are formed.

【0003】上記半導体発光素子を用いて表示装置等を
形成する場合の実装方法は図13に示すように、まず絶
縁基板又はリードフレーム等に設けられた第一の電極部
分120と半導体発光素子101のN電極層112と
を、例えばインジウム等の金属系からなる導電性のろう
材又はAg ‐エポキシ樹脂等の導電性樹脂接着剤119
で電気的導通状態で接続した後、半導体発光素子101
のP電極層111と絶縁基板又はリードフレーム等に設
けられた第二の電極部分121とを、例えばAu細線等
の金属ワイヤー125で電気的に接続する。
As shown in FIG. 13, the mounting method for forming a display device or the like using the above semiconductor light emitting element is as follows. First, the first electrode portion 120 provided on the insulating substrate or the lead frame and the semiconductor light emitting element 101. And the N electrode layer 112 of a conductive brazing material made of a metal such as indium or a conductive resin adhesive 119 such as Ag-epoxy resin.
And the semiconductor light emitting device 101
The P electrode layer 111 and the second electrode portion 121 provided on the insulating substrate or the lead frame are electrically connected by a metal wire 125 such as Au thin wire.

【0004】或いは、上記半導体発光素子を個々のチッ
プ部品として形成し、このチップ部品を絶縁基板上に搭
載して表示装置等を形成する場合の構造は図14に示す
ように、半導体発光素子101を金属リードフレーム1
26又は回路配線を有する絶縁基板128上に搭載した
後、透光性の樹脂127,129で封止して形成する。
Alternatively, the semiconductor light emitting element 101 is formed as an individual chip component, and the chip component is mounted on an insulating substrate to form a display device or the like, as shown in FIG. The metal lead frame 1
26 or the insulating substrate 128 having the circuit wiring, and then, it is formed by sealing with the light-transmitting resins 127 and 129.

【0005】又、上記従来の技術以外にも形状及び実装
方法の異なる他の従来技術による半導体発光素子及びそ
の製造方法が考案されている。
In addition to the above-mentioned conventional technique, another conventional semiconductor light emitting device having a different shape and mounting method has been devised, and a method for manufacturing the same.

【0006】他の従来技術による半導体発光素子130
の構造は図15及び16に示すように、GaP やGaAs
等よりなるN型の半導体層102上に、同じくGaP や
GaAs 等よりなるP型の半導体層103を積層形成し
た後、PN接合面104に平行な両端面の全面にAg や
Au 等よりなる金属薄膜を順次積層してP電極層11
1′とN電極層112′が形成されている。
Another conventional semiconductor light emitting device 130.
As shown in FIGS. 15 and 16, the structure of GaP and GaAs is
After the P-type semiconductor layer 103 also made of GaP, GaAs or the like is laminated on the N-type semiconductor layer 102 made of, etc., the metal made of Ag, Au, etc. is formed on the entire end faces parallel to the PN junction surface 104. Thin films are sequentially stacked to form the P electrode layer 11
1'and an N electrode layer 112 'are formed.

【0007】上記他の従来技術による半導体発光素子を
用いて表示装置等を形成する場合の実装方法は図17に
示すように、まず、半導体発光素子130の導電接着の
際の位置ずれを防ぐ目的で、予め絶縁基板又はリードフ
レーム等の電極部分120,121の間に絶縁性接着剤
124を塗布する。この絶縁性接着剤は半導体発光素子
搭載面側のPN接合露出部分の保護に使用される場合も
ある。
As shown in FIG. 17, the mounting method for forming a display device or the like using the semiconductor light emitting device according to the above-mentioned other prior art is first to prevent the displacement of the semiconductor light emitting device 130 during conductive bonding. Then, the insulating adhesive 124 is applied in advance between the electrode portions 120 and 121 such as the insulating substrate or the lead frame. This insulating adhesive may be used to protect the exposed PN junction portion on the semiconductor light emitting element mounting surface side.

【0008】次に、絶縁基板又はリードフレーム等の電
極部分120,121上に、例えばインジウム等の金属
系からなる導電性のろう材又はAg ‐エポキシ樹脂の導
電性樹脂接着剤119等を予め塗布し、半導体発光素子
130のP・N両電極層111′,112′を各々絶縁
基板又はリードフレーム等の電極部分120,121上
に設置後、導電性のろう材又は樹脂接着剤119を所定
の硬化条件で硬化形成する。
Next, a conductive brazing material made of a metal such as indium or a conductive resin adhesive 119 made of Ag-epoxy resin is applied in advance on the electrode portions 120 and 121 such as the insulating substrate or the lead frame. Then, after the P and N electrode layers 111 ′ and 112 ′ of the semiconductor light emitting device 130 are respectively placed on the electrode portions 120 and 121 such as an insulating substrate or a lead frame, a conductive brazing material or resin adhesive 119 is applied to a predetermined area. It is cured and formed under curing conditions.

【0009】尚、図17(a)は絶縁基板又はリードフ
レーム等の電極部分の間隔x3 を半導体発光素子のP・
N両電極層の間隔よりも狭く取った場合の実装方法を示
し、(b)は、この間隔x4 を半導体発光素子のP・N
両電極層の間隔よりも広く取った場合の実装方法を示し
ている。
In FIG. 17A, the distance x 3 between the electrodes of the insulating substrate or the lead frame is defined as P.
Shows how to implement when taken smaller than the distance N the electrode layers, (b) is, P · N of the semiconductor light emitting element of this distance x 4
The mounting method is shown when the distance between the two electrode layers is wider than the distance between the two electrode layers.

【0010】[0010]

【発明が解決しようとする課題】上記従来の半導体発光
素子おいては、下記に示すような問題点があった。
The above conventional semiconductor light emitting device has the following problems.

【0011】(1)図11及び12に示すような半導体
発光素子は、P電極方向への放射光を主に利用するよう
に構成されている。従って、放射光の出る面に形成され
ているP電極に遮られて、放射光量が減少するので光の
利用効率が悪いという問題点があった。
(1) The semiconductor light emitting device as shown in FIGS. 11 and 12 is constructed so as to mainly utilize the emitted light toward the P electrode. Therefore, there is a problem in that the light utilization efficiency is poor because the amount of emitted light is reduced by being blocked by the P electrode formed on the surface from which the emitted light is emitted.

【0012】(2)上記図11及び12の半導体発光素
子を実装する際は、図13に示すようなAu ワイヤー等
による基板電極部との接続が不可欠である。しかし、表
示装置等に利用する場合、多数の半導体発光素子を搭載
する必要があり、一方では装置の処理能力(速度,精度
など)に限界があり、莫大な設備投資と歩留まり低下、
Au ワイヤー等の材料費の増加を招く等の問題点があっ
た。
(2) When mounting the semiconductor light emitting device of FIGS. 11 and 12, it is indispensable to connect to the substrate electrode portion by Au wire or the like as shown in FIG. However, when it is used for a display device or the like, it is necessary to mount a large number of semiconductor light emitting elements, and on the other hand, the processing capacity (speed, accuracy, etc.) of the device is limited, resulting in enormous equipment investment and low yield.
There was a problem that the cost of materials such as Au wire was increased.

【0013】(3)図14に示すような半導体発光素子
では、上記(1)及び(2)の問題点の他に個々の半導
体発光素子の寸法が大きくなり、表示装置に最低限必要
なブラウン管等の画素と同等の、少なくとも500μm
角以下の寸法にするのは困難である。又、個々のチップ
部品形状の半導体発光素子は価格的にも非常に高価な物
になるという問題点があった。
(3) In the semiconductor light emitting device as shown in FIG. 14, in addition to the problems (1) and (2) described above, the size of each semiconductor light emitting device becomes large, and the cathode ray tube which is the minimum necessary for the display device. At least 500 μm, which is equivalent to pixels such as
It is difficult to make the dimension below the corner. Further, there is a problem that the semiconductor light emitting element in the form of individual chip parts becomes very expensive in terms of price.

【0014】(4)図15及び16に示すような半導体
発光素子は、PN接合が露出する端面側からの光放射を
利用するために、基板等への実装時には基板等に対して
電極層が垂直方向で接するように搭載する工程が必要と
なる。この工程中では、PN接合が露出する端面が搭載
用の装置や基板等と物理的に接触するため、PN接合が
露出する端面に傷や欠損等が発生し易く、PN接合が露
出する端面の破損や短絡不良の要因となるという問題点
があった。
(4) In the semiconductor light emitting device as shown in FIGS. 15 and 16, since the light emission from the end face side where the PN junction is exposed is utilized, the electrode layer is mounted on the substrate or the like when mounted on the substrate or the like. A step of mounting so as to contact in the vertical direction is required. During this process, the end surface where the PN junction is exposed physically contacts the mounting device, the substrate, etc., so that the end surface where the PN junction is exposed is apt to be scratched or chipped, and the end surface where the PN junction is exposed is easily damaged. There is a problem that it may cause damage or short circuit failure.

【0015】(5)図15及び16の半導体発光素子を
基板等に実装するには、図17に示すようにP電極・N
電極共に導電性のろう材又は樹脂接着剤による接続が必
要であるが、このP電極表面とPN接合面とは僅か数乃
至数十μmしか離れておらず、上記導電性のろう材又は
樹脂接着剤が基板等と半導体発光素子との間に回り込む
ことにより、PN接合が露出する端面での導電性のろう
材又は樹脂接着剤による短絡及び漏洩電流等が発生し、
このため半導体発光素子が正常に駆動しなくなるという
問題点があった。
(5) To mount the semiconductor light emitting device shown in FIGS. 15 and 16 on a substrate or the like, as shown in FIG.
It is necessary to connect both electrodes with a conductive brazing material or resin adhesive, but the P electrode surface and the PN junction surface are separated from each other by only a few to several tens of μm. When the agent wraps between the substrate etc. and the semiconductor light emitting element, a short circuit and a leakage current due to a conductive brazing material or a resin adhesive at the end face where the PN junction is exposed occur,
Therefore, there is a problem that the semiconductor light emitting device does not operate normally.

【0016】又、半導体発光素子は予め実装位置に絶縁
性接着剤等で仮固定しなければならず、工程の複雑化や
コストアップの要因となるという問題点があった。
Further, the semiconductor light emitting element must be temporarily fixed in advance to the mounting position with an insulating adhesive or the like, which causes a problem that the process is complicated and the cost is increased.

【0017】又、上記固定用の絶縁性接着剤をPN接合
露出部分の保護に用いる場合は、塗布量のコントロール
が難しく、基板等の上に形成された電極面に付着して半
導体発光素子の電極層との接続が困難になるという問題
点があった。
When the fixing insulating adhesive is used to protect the exposed PN junction, it is difficult to control the coating amount, and the adhesive adheres to the electrode surface formed on the substrate or the like to form the semiconductor light emitting element. There is a problem that connection with the electrode layer becomes difficult.

【0018】又、半導体発光素子の電極層の金属薄膜と
導電性のろう材又は樹脂接着剤とのなじみが悪いため、
接続不良を起こすという問題点があった。
Further, since the metal thin film of the electrode layer of the semiconductor light emitting element and the conductive brazing material or resin adhesive are not well compatible with each other,
There was a problem of causing poor connection.

【0019】更に、PN接合面と電極層との距離をとる
ため、或いは基板上の電極との接続や位置合せを確実な
ものにするためには、電極層を100μm以上に厚く形
成する必要があるが、この場合、電極層の厚さが厚くな
ればなる程、電極層と半導体層個々の膨張係数の差に基
づく層間応力が増大して結果的に半導体層の応力破壊や
電極層の剥離等を引き起こすという問題点があった。
Furthermore, in order to secure the distance between the PN junction surface and the electrode layer, or to ensure the connection and alignment with the electrode on the substrate, it is necessary to form the electrode layer thicker than 100 μm. However, in this case, the thicker the electrode layer, the greater the interlayer stress due to the difference in expansion coefficient between the electrode layer and the semiconductor layer, resulting in stress breakdown of the semiconductor layer and peeling of the electrode layer. There was a problem that it caused such as.

【0020】又、逆に電極層を20μm以下に薄く形成
すると、電極との接続が充分に行えず、導通が取れなく
なるという問題点もあった。
On the other hand, if the electrode layer is formed to a thickness of 20 μm or less, there is a problem that the electrode cannot be sufficiently connected and conduction cannot be obtained.

【0021】[0021]

【課題を解決するための手段】本発明は、上記問題点に
鑑みなされたもので、半導体発光素子及びその製造方法
において、 (1)半導体発光素子の半導体層のPN接合面に垂直な
端面のうち少なくとも一端面上に露出するPN接合部及
びその近傍が、周囲の垂直な端面よりも低い位置になる
ように形成されていること、又は凹状に形成されている
ことを特徴とする。
The present invention has been made in view of the above problems, and in a semiconductor light emitting device and a method for manufacturing the same, (1) a semiconductor layer of a semiconductor light emitting device is provided with an end surface perpendicular to a PN junction surface. It is characterized in that at least the PN junction portion exposed on at least one end face and the vicinity thereof are formed so as to be at a position lower than a peripheral vertical end face, or are formed in a concave shape.

【0022】(2)半導体発光素子の半導体層のPN接
合面に垂直な端面のうち少なくとも一端面上に露出する
PN接合部及びその近傍が、絶縁性物質にて形成されて
いることを特徴とする。
(2) The PN junction portion exposed on at least one end face of the semiconductor layer of the semiconductor light emitting element, which is perpendicular to the PN junction face, and its vicinity are formed of an insulating material. To do.

【0023】又は絶縁性物質により形成された端面は、
PN接合面に垂直な端面と同一面を有することを特徴と
する。
Alternatively, the end face formed of an insulating material is
It is characterized by having the same surface as the end surface perpendicular to the PN junction surface.

【0024】更に絶縁性物質は、半導体発光素子の出射
光に対して透明で、且つエポキシ系樹脂やフェノール系
樹脂等の有機材料及びSiO2やAl23 等の無機材料の
中から選ばれた物質であることを特徴とする。
Further, the insulating substance is selected from organic materials such as epoxy resin and phenol resin and inorganic materials such as SiO 2 and Al 2 O 3 which are transparent to the light emitted from the semiconductor light emitting element. It is characterized by being a substance.

【0025】(3)半導体発光素子の半導体層は、III
‐V族化合物半導体、II‐VI族化合物半導体、SiC等
の半導体材料の中から選ばれた物質であることを特徴と
する。
(3) The semiconductor layer of the semiconductor light emitting device is III
It is characterized by being a substance selected from semiconductor materials such as -V group compound semiconductors, II-VI group compound semiconductors, and SiC.

【0026】(4)半導体発光素子の半導体層上に形成
される電極層は、金属薄膜と、導電性のろう材又は樹脂
接着剤との組合せにより形成されることを特徴とする。
(4) The electrode layer formed on the semiconductor layer of the semiconductor light emitting device is characterized by being formed by a combination of a metal thin film and a conductive brazing material or a resin adhesive.

【0027】或いは電極層は、金属薄膜と、異方導電性
樹脂接着剤及び金属箔との組合せにより形成されること
を特徴とする。
Alternatively, the electrode layer is formed by a combination of a metal thin film, an anisotropic conductive resin adhesive and a metal foil.

【0028】又は電極層の膜厚は、20乃至150μm
の間にあることを特徴とする。
Alternatively, the film thickness of the electrode layer is 20 to 150 μm.
It is characterized by being between.

【0029】又は半導体発光素子の電極層は、絶縁基板
又はリードフレーム等の基体に対して垂直方向になるよ
うにして配置されることを特徴とする。
Alternatively, the semiconductor light emitting element is characterized in that the electrode layer is arranged so as to be perpendicular to a base such as an insulating substrate or a lead frame.

【0030】更に半導体発光素子の電極層は、導電性の
ろう材又は樹脂接着剤を用いて絶縁基板又はリードフレ
ーム等の基体に接続されることを特徴とする。
Further, the electrode layer of the semiconductor light emitting element is characterized in that it is connected to a base such as an insulating substrate or a lead frame using a conductive brazing material or a resin adhesive.

【0031】或いは半導体発光素子の電極層は、異方導
電性樹脂接着剤を用いて絶縁基板又はリードフレーム等
の基体に接続されることを特徴とする。
Alternatively, the electrode layer of the semiconductor light emitting element is characterized in that it is connected to a base such as an insulating substrate or a lead frame using an anisotropic conductive resin adhesive.

【0032】(5)半導体発光素子の外形寸法は、50
0μm角以下であることを特徴とする。
(5) The external dimensions of the semiconductor light emitting element are 50
It is characterized in that it is 0 μm square or less.

【0033】(6)異方導電性樹脂接着剤中に含まれる
導電性成分の最大径は、半導体層のPN接合面に垂直な
端面のうち少なくとも一端面上に露出するPN接合部及
びその近傍と、周囲の垂直な端面との段差よりも小さい
ことを特徴とする。
(6) The maximum diameter of the conductive component contained in the anisotropic conductive resin adhesive is such that the PN junction portion exposed on at least one end face of the semiconductor layer, which is perpendicular to the PN junction face, and the vicinity thereof. And smaller than the step between the peripheral vertical end face.

【0034】(7)半導体発光素子の製造方法において
は、半導体層に少なくともPN接合面に達する溝部分を
形成する工程と、半導体層の両面に電極層を形成する工
程と、半導体層及び両電極層を溝部分に沿って切断し、
分離する工程とを有することを特徴とする。
(7) In the method of manufacturing a semiconductor light emitting device, a step of forming a groove portion reaching at least a PN junction surface in the semiconductor layer, a step of forming electrode layers on both sides of the semiconductor layer, the semiconductor layer and both electrodes Cut the layer along the groove,
And a step of separating.

【0035】或いは半導体発光素子の製造方法において
は、半導体層に少なくともPN接合面に達する溝部分を
形成する工程と、溝部分を絶縁性物質により被覆する工
程と、半導体層の両面に電極層を形成する工程と、半導
体層及び両電極層を被覆された溝部分に沿って切断し、
分離する工程とを有することを特徴とする
Alternatively, in the method for manufacturing a semiconductor light emitting device, a step of forming a groove portion reaching at least a PN junction surface in the semiconductor layer, a step of covering the groove portion with an insulating material, and electrode layers on both surfaces of the semiconductor layer. Forming step, cutting the semiconductor layer and both electrode layers along the covered groove portion,
And a step of separating.

【0036】[0036]

【作用】本発明は、PN接合を有する半導体層が積層形
成され、該半導体層を挟んで電極層が形成されてなる半
導体発光素子において、 (1)半導体発光素子の半導体層のPN接合面に垂直な
端面のうち少なくとも一端面上に露出するPN接合部及
びその近傍が、周囲の垂直な端面よりも低い位置になる
ように形成されているか、又は凹状に形成されているの
で、絶縁基板又はリードフレーム等への搭載時に半導体
発光素子の端面上に露出するPN接合部及びその近傍に
発生する傷や破損等が防止される。
According to the present invention, in a semiconductor light emitting device in which semiconductor layers having a PN junction are laminated and electrode layers are formed with the semiconductor layers sandwiched therebetween, (1) a PN junction surface of the semiconductor layer of the semiconductor light emitting device is provided. Since the PN junction portion exposed on at least one end face of the vertical end face and the vicinity thereof are formed at a position lower than the surrounding vertical end face or are formed in a concave shape, the insulating substrate or It is possible to prevent the PN junction exposed on the end face of the semiconductor light emitting element and the scratches and damages generated in the vicinity thereof from being mounted on a lead frame or the like.

【0037】(2)半導体発光素子の半導体層のPN接
合面に垂直な端面のうち少なくとも一端面上に露出する
PN接合部及びその近傍は絶縁性物質にて形成されてい
るので、絶縁基板又はリードフレーム等への搭載時に半
導体発光素子の端面上に露出するPN接合部及びその近
傍に発生する導電性のろう材又は樹脂接着剤の回り込み
によるPN接合の短絡や,傷又は破損等の不良が無くな
る。
(2) Since the PN junction portion exposed on at least one end face of the semiconductor layer of the semiconductor light emitting element, which is perpendicular to the PN junction face, and its vicinity are formed of an insulating material, the insulating substrate or When the PN junction is exposed on the end face of the semiconductor light emitting element when mounted on a lead frame or the like, and a defect such as a short circuit of the PN junction due to the wraparound of a conductive brazing material or a resin adhesive, scratches or damages is generated. Lost.

【0038】又は絶縁性物質により形成された端面は、
PN接合面に垂直な端面と同一面を有しているので、絶
縁基板又はリードフレーム等への搭載時には端面に安定
性があり、半導体発光素子の搭載が容易に行える。
Alternatively, the end face formed of an insulating material is
Since it has the same surface as the end surface perpendicular to the PN junction surface, the end surface has stability when mounted on an insulating substrate, a lead frame, or the like, and the semiconductor light emitting element can be mounted easily.

【0039】更に絶縁性物質は、半導体発光素子の出射
光に対して透明で、且つエポキシ系樹脂やフェノール系
樹脂等の有機材料及びSiO2やAl23 等の無機材料の
中から選ばれた物質を使用しているので、光の利用効率
は低下しない。
Further, the insulating material is transparent to the light emitted from the semiconductor light emitting element and is selected from organic materials such as epoxy resin and phenol resin and inorganic materials such as SiO 2 and Al 2 O 3. Since it uses different materials, the light utilization efficiency does not decrease.

【0040】(3)半導体発光素子の半導体層は、III
‐V族化合物半導体、II‐VI族化合物半導体、SiC 等
の半導体材料の中から任意に選び出して作成することが
可能であるので、異なる発光色の半導体発光素子を用い
たカラー表示装置等が容易に製作可能になる。
(3) The semiconductor layer of the semiconductor light emitting device is III
-Since it is possible to create by arbitrarily selecting from semiconductor materials such as group-V compound semiconductors, II-VI group compound semiconductors, and SiC, it is easy to make color display devices using semiconductor light-emitting elements of different emission colors. Can be manufactured.

【0041】(4)半導体発光素子の半導体層上に形成
される電極層は、金属薄膜と、導電性のろう材又は樹脂
接着剤との組合せにより形成されるか、或いは金属薄膜
と、異方導電性樹脂接着剤及び金属箔との組合せにより
形成されているので、電極層形成が簡単に行える。
(4) The electrode layer formed on the semiconductor layer of the semiconductor light emitting device is formed by a combination of a metal thin film and a conductive brazing material or a resin adhesive, or is anisotropic from the metal thin film. Since it is formed by the combination of the conductive resin adhesive and the metal foil, the electrode layer can be easily formed.

【0042】更に電極層の膜厚を150μm以下に抑え
ているので応力破壊や電極剥離等の問題を未然に防止す
るとができる。
Further, since the film thickness of the electrode layer is suppressed to 150 μm or less, problems such as stress destruction and electrode peeling can be prevented.

【0043】又は、膜厚に少なくとも20μm以という
下限を設けることにより、実装時の駆動に支障をきたさ
ず、充分な導通を確保できる。
Alternatively, by setting the lower limit of the film thickness to at least 20 μm or more, sufficient conduction can be ensured without causing a hindrance to driving during mounting.

【0044】又は半導体発光素子の電極層は、絶縁基板
又はリードフレーム等の基体に対して垂直方向になるよ
うにして配置されるので、放射光を遮る電極層が無く光
の利用効率は高い。又、電極層の全面において導電性の
ろう材又は樹脂接着剤或いは異方導電性樹脂接着剤で接
続されるので効果的な放熱が行われ、発光効率が増大す
る。又、Au ワイヤー等による基板電極部との接続は不
要であり、工程及び作業時間や材料費の低減や寸法の小
型化が可能になる。
Alternatively, since the electrode layer of the semiconductor light emitting element is arranged so as to be perpendicular to the substrate such as the insulating substrate or the lead frame, there is no electrode layer for blocking the emitted light, and the light utilization efficiency is high. In addition, since the entire surface of the electrode layer is connected with a conductive brazing material, a resin adhesive, or an anisotropic conductive resin adhesive, effective heat dissipation is performed and luminous efficiency is increased. Further, it is not necessary to connect with the substrate electrode portion by Au wire or the like, and it is possible to reduce the process and working time, the material cost, and the size.

【0045】更に半導体発光素子の電極層が、導電性の
ろう材又は樹脂接着剤を用いて絶縁基板又はリードフレ
ーム等の基体に接続される場合は、電極層を形成する材
料と基体の電極部分とが同じ材料で形成されているので
両者のなじみはよい。
Further, when the electrode layer of the semiconductor light emitting element is connected to a base such as an insulating substrate or a lead frame using a conductive brazing material or resin adhesive, the material forming the electrode layer and the electrode portion of the base Since and are made of the same material, they are well compatible.

【0046】或いは半導体発光素子の電極層が、異方導
電性樹脂接着剤を用いて絶縁基板又はリードフレーム等
の基体に接続される場合は、微小範囲での接続が可能で
あり、実装寸法の更なる小型化が可能になる。
Alternatively, when the electrode layer of the semiconductor light emitting element is connected to a substrate such as an insulating substrate or a lead frame by using an anisotropic conductive resin adhesive, connection in a minute range is possible, and the mounting dimensions are reduced. Further miniaturization becomes possible.

【0047】又、異方導電性樹脂接着剤は、半導体発光
素子と絶縁基板又はリードフレーム等の基体との固定と
PN接合露出部分の端面保護用の絶縁性接着剤を兼ねる
ので、従来必要であった仮固定の工程は不要になる。
Since the anisotropic conductive resin adhesive also serves as an insulating adhesive for fixing the semiconductor light emitting element to the insulating substrate or the base body such as the lead frame and protecting the end surface of the PN junction exposed portion, it has been conventionally required. There is no need for the temporary fixing process.

【0048】(5)半導体発光素子の外形寸法は、50
0μm角以下の微小寸法で形成可能であるので、これを
用いた高解像度表示装置の構築が可能になる。
(5) The external dimensions of the semiconductor light emitting element are 50
Since it can be formed with a minute dimension of 0 μm square or less, a high-resolution display device using this can be constructed.

【0049】(6)異方導電性樹脂接着剤中に含まれる
導電性成分の最大径は、半導体層のPN接合面に垂直な
端面のうち少なくとも一端面上に露出するPN接合部及
びその近傍と、周囲の垂直な端面との段差よりも小さく
なるように設計されているので、半導体発光素子と絶縁
基板又はリードフレーム等の基体との接続部以外に回り
込んだ異方導電性樹脂接着剤が、PN接合部及びその近
傍に付着しても、PN接合が露出する端面での短絡や漏
洩電流の発生等による半導体発光素子の異常駆動は起こ
らない。
(6) The maximum diameter of the conductive component contained in the anisotropic conductive resin adhesive is such that the PN junction portion exposed on at least one end face of the semiconductor layer, which is perpendicular to the PN junction face, and the vicinity thereof. Since it is designed to be smaller than the step between the peripheral vertical end face, the anisotropic conductive resin adhesive that wraps around other than the connection portion between the semiconductor light emitting element and the base such as the insulating substrate or the lead frame. However, even if it adheres to the PN junction and its vicinity, abnormal driving of the semiconductor light emitting element due to a short circuit, a leakage current, or the like at the end face where the PN junction is exposed does not occur.

【0050】(8)半導体発光素子の製造方法において
は、半導体層に少なくともPN接合面に達する溝部分を
形成する工程と、半導体層の両面に電極層を形成する工
程と、半導体層及び両電極層を溝部分に沿って切断し、
分離する工程とを有しているので、半導体発光素子の端
面上に露出するPN接合部及びその近傍の形状を簡単に
加工,形成することができ、更に、厚みの比較的厚い電
極層を上面及び底面同時に形成できるので、反りが発生
しにくい。
(8) In the method of manufacturing a semiconductor light emitting device, a step of forming a groove portion reaching at least a PN junction surface in a semiconductor layer, a step of forming electrode layers on both surfaces of the semiconductor layer, the semiconductor layer and both electrodes Cut the layer along the groove,
Since it has a step of separating, the PN junction portion exposed on the end face of the semiconductor light emitting element and the shape in the vicinity thereof can be easily processed and formed, and further, an electrode layer having a relatively thick thickness is formed on the upper surface. Since it can be formed at the same time as the bottom surface, warpage is unlikely to occur.

【0051】或いは半導体発光素子の製造方法において
は、半導体層に少なくともPN接合面に達する溝部分を
形成する工程と、溝部分を絶縁性物質により被覆する工
程と、半導体層の両面に電極層を形成する工程と、半導
体層及び両電極層を被覆された溝部分に沿って切断し、
分離する工程とを有している場合は、上記作用の他に、
PN接合部及びその近傍の保護が簡単に行える。
Alternatively, in the method for manufacturing a semiconductor light emitting device, a step of forming a groove portion reaching at least a PN junction surface in the semiconductor layer, a step of covering the groove portion with an insulating material, and electrode layers on both sides of the semiconductor layer. Forming step, cutting the semiconductor layer and both electrode layers along the covered groove portion,
In the case of having a step of separating, in addition to the above action,
The PN junction and its vicinity can be easily protected.

【0052】[0052]

【実施例】本発明の実施例を図面を参照して説明する。Embodiments of the present invention will be described with reference to the drawings.

【0053】尚、本発明ではPN接合面がP型電極層側
に近接した構造で説明しているが、逆にN型電極層側に
近接した構造であってもよい。
In the present invention, the structure in which the PN junction surface is close to the P-type electrode layer side has been described, but the structure may be close to the N-type electrode layer side.

【0054】又、本発明の半導体発光素子は、量産性を
考慮して実際は大きな一枚のウエハー状態で形成された
後、分割して個々の半導体発光素子にチップ化される。
Further, the semiconductor light emitting device of the present invention is formed into a large single wafer in consideration of mass productivity, and then divided into individual semiconductor light emitting devices.

【0055】個々の半導体発光素子は、表示装置に用い
る場合にはブラウン管等の画素と同等の外形寸法にする
必要が在り、少なくとも500μm角以下の寸法で形成
可能な様に各種条件設定を行っている。
When each semiconductor light emitting element is used in a display device, it is necessary to have an outer dimension equivalent to that of a pixel such as a cathode ray tube, and various conditions are set so that it can be formed with a dimension of at least 500 μm square. There is.

【0056】図1は本発明の第1の実施例において形成
された半導体発光素子の斜視図であり、図2(a)は図
1におけるA‐A′部分の断面図、(b)は上面図、
(c)は底面図である。
FIG. 1 is a perspective view of a semiconductor light emitting device formed in the first embodiment of the present invention, FIG. 2 (a) is a sectional view taken along the line AA 'in FIG. 1, and FIG. Figure,
(C) is a bottom view.

【0057】本実施例の半導体発光素子1の構造は、II
I‐V族化合物半導体,II‐VI族化合物半導体或いはSi
C 等の半導体材料よりなるN型の半導体層2上に、同
じくIII‐V族化合物半導体,II‐VI族化合物半導体或
いはSiC 等の半導体材料よりなるP型の半導体層3が
積層形成されている。
The structure of the semiconductor light emitting device 1 of this embodiment is II
IV compound semiconductor, II-VI compound semiconductor or Si
A P-type semiconductor layer 3 made of a semiconductor material such as a III-V group compound semiconductor, a II-VI group compound semiconductor, or SiC is laminated on an N-type semiconductor layer 2 made of a semiconductor material such as C 2. .

【0058】次に、PN接合面4に平行な両端面の全面
上に例えばAgやAu等よりなる金属薄膜5,6と、例え
ばAu ,Ag ,Mo 等からなる金属箔7,8が異方導電
性樹脂接着剤9,10を介して順次積層されてP電極層
11とN電極層12が形成されている。金属箔5,6の
膜厚は後工程での実装状態等を考慮して、少なくとも2
0μm以上、望ましくは30乃至150μmの間に設定さ
れている。
Next, the metal thin films 5 and 6 made of, for example, Ag and Au and the metal foils 7 and 8 made of, for example, Au, Ag and Mo are anisotropically formed on the entire surfaces of both end surfaces parallel to the PN junction surface 4. The P electrode layer 11 and the N electrode layer 12 are formed by sequentially laminating the conductive resin adhesives 9 and 10. The film thickness of the metal foils 5 and 6 should be at least 2 in consideration of the mounting condition in the subsequent process.
It is set to 0 μm or more, preferably 30 to 150 μm.

【0059】PN接合部及びその近傍13は、その周囲
の面よりも低い位置になるように凹状に形成されてい
る。この時のPN接合部及びその近傍13とその周囲の
面との段差は後工程での実装状態等を考慮して、異方導
電性樹脂接着剤9,10中に含まれる金属粉等の導電性
物質14の最大径を例えば5μmとすると、少なくとも
5μmより大きくなるように形成する必要がある。
The PN junction and its vicinity 13 are formed in a concave shape so as to be located at a position lower than the peripheral surface. At this time, the level difference between the PN junction portion and its vicinity 13 and the surrounding surface is taken into consideration in consideration of the mounting state in the subsequent process and the like, and the conductivity of the metal powder or the like contained in the anisotropic conductive resin adhesives 9 and 10 is considered. If the maximum diameter of the active substance 14 is, for example, 5 μm, it must be formed so as to be at least larger than 5 μm.

【0060】ここで、本発明にも使用されている異方導
電性樹脂接着剤について以下に補足説明する。
Now, the anisotropic conductive resin adhesive used in the present invention will be additionally described below.

【0061】図3(a)は説明のために半導体発光素子
の電極層上に異方導電性樹脂接着剤を塗布し、更に金属
箔をそのうえに乗せた後、無負荷で硬化させた状態を示
す断面図、(b)は負荷をかけて硬化させた状態を示す
断面図である。
For the sake of explanation, FIG. 3A shows a state in which an anisotropic conductive resin adhesive is applied on the electrode layer of the semiconductor light emitting element, and a metal foil is placed thereon and then cured without load. Sectional drawing, (b) is sectional drawing which shows the state which hardened by applying load.

【0062】異方導電性樹脂接着剤9′は、熱可塑性樹
脂,熱硬化性樹脂或いはこれら両方の混合物のいずれか
の樹脂15の中に、金属粉等の導電性物質14′(粒状
又は鱗片状,最大径:約数乃至10μm)を所定量混練
して接着性と導電性を併せ持たせた点はAg ‐エポキシ
樹脂等に代表される導電性樹脂接着剤と同じである。
The anisotropic conductive resin adhesive 9'includes a conductive substance 14 '(granular or scaled) in a resin 15 which is either a thermoplastic resin, a thermosetting resin or a mixture of both. This is the same as the conductive resin adhesive represented by Ag-epoxy resin and the like in that it has both adhesiveness and electroconductivity by kneading a predetermined amount of the shape and the maximum diameter: about several to 10 μm).

【0063】これら一般の導電性樹脂接着剤の場合は、
導電性物質の混練率が約50乃至90wt%と高く、導電
性物質は樹脂中で互いに接触しあっており見かけ上導電
性樹脂接着剤またはその硬化物そのものが金属並の電導
度(約5乃至500×10-5Ω/cm)を有するように調
整されている。
In the case of these general conductive resin adhesives,
The kneading ratio of the conductive material is as high as about 50 to 90 wt%, and the conductive materials are in contact with each other in the resin, so that the conductive resin adhesive or its cured product has an electric conductivity (about 5 to about 5 to about metal). 500 × 10 −5 Ω / cm).

【0064】これに対して異方導電性樹脂接着剤9′
は、導電性物質14′の混練率を数乃至数十wt%にする
ことにより、無負荷の状態で異方導電性樹脂接着剤9′
をそのまま硬化させた場合には導電性物質14′同士が
接触しあうことはほとんど無く樹脂15中に分散してい
るので絶縁性樹脂接着剤として振舞う。
On the other hand, anisotropic conductive resin adhesive 9 '
Is an anisotropic conductive resin adhesive 9'with no load, by adjusting the kneading ratio of the conductive substance 14 'to several to several tens wt%.
When the resin is cured as it is, the conductive substances 14 ′ hardly contact each other and are dispersed in the resin 15 and thus behave as an insulating resin adhesive.

【0065】ところが、電極面等の被接着面16,17
同士を互いに押し合うように荷重(図中矢印で示す)を
架けながら硬化させると、個々の導電性物質14′が直
接被接着面16,17間に挟まって導通状態を作り出す
という性質を有している。
However, the adhered surfaces 16 and 17 such as electrode surfaces
When a load (indicated by an arrow in the figure) is applied to cure each other while they are pressed against each other, each conductive substance 14 'is directly sandwiched between the adherend surfaces 16 and 17 to create a conductive state. ing.

【0066】但しこの場合でも、何らかの理由で被接着
面16,17間の隙間が導電性物質14′の最大径より
も大きいと(図中○で囲った部分のような場合)、この
ような導電性物質14′による被接着面16,17間の
導通状態は起こらない。
However, even in this case, if the gap between the adhered surfaces 16 and 17 is larger than the maximum diameter of the conductive substance 14 'for some reason (in the case of the portion circled in the figure), the The conductive state between the adhered surfaces 16 and 17 due to the conductive substance 14 'does not occur.

【0067】次に、本発明の第1の実施例における半導
体発光素子の製造方法について詳細に説明する。
Next, a method of manufacturing the semiconductor light emitting device in the first embodiment of the present invention will be described in detail.

【0068】図4(a)乃至(f)は本実施例を用いた
半導体発光素子の製造方法を示す手順図である。
FIGS. 4A to 4F are procedural diagrams showing a method for manufacturing a semiconductor light emitting device using this embodiment.

【0069】図4(a)に示すようにまずウエハー状態
の半導体発光素子1′の構造は、III‐V族化合物半導
体,II‐VI族化合物半導体或いはSiC 等の半導体材料
よりなるN型の半導体層2上に、同じくIII‐V族化合
物半導体,II‐VI族化合物半導体或いはSiC 等の半導
体材料よりなるP型の半導体層3を積層形成(層厚:約
200乃至300μm,PN接合面4はP型半導体層表
面より約数乃至数十μm)した後、PN接合面4に平行
な両端面の全面上に例えばAg やAu 等よりなる金属薄
膜5,6を積層形成(層厚:約3μm)する。
As shown in FIG. 4A, first, the structure of the semiconductor light emitting device 1'in a wafer state is an N-type semiconductor made of a semiconductor material such as a III-V group compound semiconductor, a II-VI group compound semiconductor, or SiC. A P-type semiconductor layer 3 made of a semiconductor material such as a III-V group compound semiconductor, a II-VI group compound semiconductor, or SiC is laminated on the layer 2 (layer thickness: about 200 to 300 μm, PN junction surface 4 is After a few to several tens of μm from the surface of the P-type semiconductor layer), metal thin films 5 and 6 made of, for example, Ag or Au are laminated on the entire surface of both end faces parallel to the PN junction surface 4 (layer thickness: about 3 μm). ) Do.

【0070】次に、ウエハー状態の半導体発光素子1′
のP型半導体層3側の表面より、PN接合面4を越えて
N型半導体層2に至るまでの深さに、例えばダイヤモン
ドブレード等を用いて複数の垂直に交差する2種類の平
行な溝部18を形成する。この時の溝部18の幅は約5
0乃至80μmであり、深さはP型半導体層3側の表面
より約50乃至150μm、又隣り合う溝部間のピッチ
は約200乃至500μmである。尚、これらの寸法は
最終に得られる個々の半導体発光素子の外形寸法や量産
性等を考慮して適宜設定することができる。
Next, the semiconductor light emitting device 1'in a wafer state
From the surface on the P-type semiconductor layer 3 side to the depth up to the N-type semiconductor layer 2 beyond the PN junction surface 4, for example, by using a diamond blade or the like, a plurality of vertically parallel groove portions 18 is formed. The width of the groove 18 at this time is about 5
The depth is 0 to 80 μm, the depth is about 50 to 150 μm from the surface on the P-type semiconductor layer 3 side, and the pitch between adjacent groove portions is about 200 to 500 μm. It should be noted that these dimensions can be set as appropriate in consideration of the outer dimensions of individual semiconductor light emitting elements to be finally obtained, mass productivity, and the like.

【0071】これらの複数の垂直に交差する2種類の平
行な溝部18により、P型半導体層3側の表面は見かけ
上多数の四角柱が林立する形状を呈する。ここで、一方
の溝部のピッチと、これに垂直に交差する溝部とのピッ
チは必ずしも同一出なくてもよい。
Due to these two kinds of parallel groove portions 18 intersecting vertically, the surface on the P-type semiconductor layer 3 side apparently has a shape in which a large number of quadrangular prisms stand. Here, the pitch of one groove portion and the pitch of the groove portion perpendicularly intersecting the groove portion do not necessarily have to be the same.

【0072】上記複数の垂直に交差する2種類の平行な
溝部18中の表面には、微細なクラックが多数発生して
おり、これらのクラックは半導体発光素子の性能に悪影
響を及ぼすことが経験的に知られている。
It has been empirically that a large number of fine cracks are generated on the surfaces of the two kinds of parallel groove portions 18 that intersect each other vertically, and these cracks adversely affect the performance of the semiconductor light emitting device. Known to.

【0073】従って、図4(b)に示すように例えばH
2SO4:H22:H2O =3:1:1の組成のエッチン
グ液等で、溝部18中の表面に化学処理を施して、微細
なクラックの除去を行う。
Therefore, as shown in FIG.
The surface of the groove 18 is chemically treated with an etching solution having a composition of 2 SO 4 : H 2 O 2 : H 2 O = 3: 1: 1 to remove fine cracks.

【0074】溝部18中の表面の化学処理を行った後の
ウエハー状態の半導体発光素子1′は、図4(c)に示
すように金属薄膜5,6各々の表面上に例えばハイソー
ル社製の「モーフィット TG‐9000R」やその類
似品で液状の透光性エポキシ樹脂に数乃至数十wt%の導
電性粗粒子(粒径:約10μm以下)を配合した樹脂材
料等の異方導電性樹脂接着剤9,10を塗布(膜厚:約
数乃至10μm)する。
As shown in FIG. 4C, the semiconductor light emitting device 1'in a wafer state after the surface of the groove 18 is chemically treated is formed on the surface of each of the metal thin films 5 and 6 as shown in FIG. Anisotropic conductivity of resin material such as "Morfit TG-9000R" or its similar product in which liquid translucent epoxy resin is mixed with several to several tens wt% of conductive coarse particles (particle diameter: about 10 μm or less) Resin adhesives 9 and 10 are applied (film thickness: about several to 10 μm).

【0075】更に異方導電性樹脂接着剤9,10を塗布
した両表面上に、図4(d)に示すように例えばAu ,
Ag ,Mo 等からなる金属箔7,8を張り付ける。これ
らの金属箔7,8の膜厚は、後工程での実装状態等を考
慮して、少なくとも20μm以上、望ましくは30乃至
100μmの間に設定される。何故ならば、金属箔7,
8の膜厚が20μm以下の場合は、絶縁基板又はリード
フレーム等の基体の電極部との導通が充分に取れず、逆
に100μm以上の場合は、応力破壊や電極剥離等が発
生しやすくなるからである。上記導通は膜厚が20μm
以上あれば取れるが、30μm以上ある方がより確実で
ある。又、150μm程度までの膜厚であれば本発明に
おける上記不良の発生頻度はそれほど高くない。
Further, as shown in FIG. 4 (d), for example Au, on both surfaces coated with the anisotropic conductive resin adhesives 9 and 10.
Attach the metal foils 7 and 8 made of Ag, Mo, etc. The film thickness of these metal foils 7 and 8 is set to at least 20 μm or more, preferably 30 to 100 μm in consideration of the mounting state in the subsequent steps. Because the metal foil 7,
When the film thickness of 8 is 20 μm or less, sufficient electrical continuity with the electrode portion of the substrate such as the insulating substrate or the lead frame cannot be obtained, while when it is 100 μm or more, stress fracture or electrode peeling easily occurs. Because. The above conduction has a film thickness of 20 μm
If it is more than 30 μm, it is more reliable. If the film thickness is up to about 150 μm, the frequency of occurrence of the above defects in the present invention is not so high.

【0076】上記状態では、異方導電性樹脂接着剤9,
10はまだ未硬化の状態であり、次にこれを硬化して金
属薄膜5,6と金属箔7,8とを導通状態に接着する必
要がある。
In the above state, the anisotropic conductive resin adhesive 9,
10 is still in an uncured state, and then it is necessary to cure this to bond the metal thin films 5 and 6 and the metal foils 7 and 8 in a conductive state.

【0077】従って、次に図4(e)に示すようにウエ
ハー状態の半導体発光素子1′の両面から荷重(約2乃
至20kg/cm2 ,図中矢印で示した方向から加圧する)
を架けながら異方導電性樹脂接着剤9,10の硬化を行
う。硬化条件は、異方導電性樹脂接着剤9,10の種類
により異なるが本実施例で用いたものでは、150℃‐
2分乃至200℃‐30秒である。
Therefore, as shown in FIG. 4E, a load is applied from both sides of the semiconductor light emitting device 1'in a wafer state (about 2 to 20 kg / cm 2 , pressure is applied from the direction shown by the arrow in the figure).
The anisotropic conductive resin adhesives 9 and 10 are cured while being bridged. The curing conditions vary depending on the types of the anisotropic conductive resin adhesives 9 and 10, but the curing conditions used in this example are 150 ° C-
2 minutes to 200 ° C.-30 seconds.

【0078】最後に、図4(f)に示すように例えばダ
イヤモンドブレード等を用いて、複数の垂直に交差する
2種類の平行な溝部18(幅:約50乃至80μm)の
中央に沿ってウエハー状態の半導体発光素子1′を個々
のチップ状の半導体発光素子1に分割する。この時、後
工程での実装状態等を考慮して溝部18に形成される凹
状部分の深さが、少なくとも異方導電性樹脂接着剤9,
10中に含まれる導電性物質14の最大径よりも大きく
なるように分割幅を設定する必要がある。本実施例で
は、導電性粗粒子等の導電性物質14の最大径が約10
μm以下であるので分割精度等も加味して、凹状部分の
深さが少なくとも20μm以上になるように分割幅は4
0μm以下に設定した。
Finally, as shown in FIG. 4 (f), using, for example, a diamond blade or the like, a wafer is formed along the center of a plurality of two kinds of vertically parallel groove portions 18 (width: about 50 to 80 μm). The semiconductor light emitting device 1 ′ in the state is divided into individual chip-shaped semiconductor light emitting devices 1. At this time, the depth of the concave portion formed in the groove portion 18 should be at least the anisotropic conductive resin adhesive 9 in consideration of the mounting state in the subsequent process.
It is necessary to set the division width so as to be larger than the maximum diameter of the electroconductive substance 14 contained in 10. In this embodiment, the maximum diameter of the conductive material 14 such as conductive coarse particles is about 10
Since it is less than μm, the division width is 4 so that the depth of the concave portion is at least 20 μm or more, taking into account the division accuracy.
It was set to 0 μm or less.

【0079】図5に上記半導体発光素子の製造過程にお
いて、金属薄膜と金属箔との接着に異方導電性樹脂接着
剤を使用する理由を示す。
FIG. 5 shows the reason why the anisotropic conductive resin adhesive is used for bonding the metal thin film and the metal foil in the manufacturing process of the semiconductor light emitting device.

【0080】図5(a)は導電性のろう材又は樹脂接着
剤を用いて金属薄膜と金属箔とを接着した場合の断面
図、(b)は異方導電性樹脂接着剤を用いて金属薄膜と
金属箔とを接着した場合の断面図である。
FIG. 5 (a) is a cross-sectional view of the case where the metal thin film and the metal foil are adhered using a conductive brazing material or resin adhesive, and FIG. 5 (b) is a metal using the anisotropic conductive resin adhesive. It is sectional drawing at the time of adhering a thin film and a metal foil.

【0081】図から明らかなように金属薄膜5と金属箔
7とを接着する際に金属薄膜5上に導電性のろう材又は
樹脂接着剤19や異方導電性樹脂接着剤9等を塗布する
と、溝部18にこれらの一部が流れ込む。溝部18側面
にはPN接合が露出する端面が形成されているので導電
性のろう材又は樹脂接着剤19がこの部分に付着する
と、PN接合が露出する端面での短絡や漏洩電流の発生
等により半導体発光素子が正常に駆動しなくなる。
As is apparent from the figure, when the metal thin film 5 and the metal foil 7 are bonded to each other, if a conductive brazing material or resin adhesive 19 or anisotropic conductive resin adhesive 9 is applied onto the metal thin film 5, A part of these flows into the groove 18. Since the end face where the PN junction is exposed is formed on the side surface of the groove portion 18, if a conductive brazing material or resin adhesive 19 adheres to this portion, a short circuit or a leakage current may occur at the end face where the PN junction is exposed. The semiconductor light emitting device will not operate normally.

【0082】しかし、異方導電性樹脂接着剤9の場合
は、溝部18には負荷がかかっていないので導電性物質
14同士が接触しあうことはほとんど無く樹脂15中に
分散しており絶縁性樹脂接着剤として振舞うのでPN接
合が露出する端面での短絡や漏洩電流は発生しない。
However, in the case of the anisotropic conductive resin adhesive 9, since the groove 18 is not loaded, the conductive substances 14 hardly contact with each other and are dispersed in the resin 15 so that the insulating property is improved. Since it behaves as a resin adhesive, no short circuit or leakage current occurs at the end face where the PN junction is exposed.

【0083】図6は本発明の第1の実施例における半導
体発光素子の実装方法を説明する図面であり、異方導電
性樹脂接着剤を用いて絶縁基板又はリードフレーム等の
基体に接続した場合の断面図である。
FIG. 6 is a view for explaining a method of mounting a semiconductor light emitting device in the first embodiment of the present invention, in the case where it is connected to a base such as an insulating substrate or a lead frame using an anisotropic conductive resin adhesive. FIG.

【0084】図6に示すように絶縁基板又はリードフレ
ーム等の基体の電極部分20,21に、例えばハイソー
ル社製の「モーフィット TG‐9000R」やその類
似品で液状の透光性エポキシ樹脂に数乃至数十wt%の導
電性粗粒子(粒径:約10μm以下)を配合した樹脂材
料等の異方導電性樹脂接着剤9″を塗布(膜厚:約数乃
至10μm)する。
As shown in FIG. 6, a liquid translucent epoxy resin such as "Morfit TG-9000R" manufactured by Hysole Co., Ltd. or a similar product is used for the electrode portions 20 and 21 of the substrate such as the insulating substrate or the lead frame. An anisotropic conductive resin adhesive 9 ″ such as a resin material mixed with several to several tens wt% of conductive coarse particles (particle size: about 10 μm or less) is applied (film thickness: about several to 10 μm).

【0085】次に、絶縁基板又はリードフレーム等の基
体の電極部分20,21にたいしてP・N両電極層1
1,12が垂直方向で接するように半導体発光素子1を
搭載する。
Next, with respect to the electrode portions 20 and 21 of the substrate such as the insulating substrate or the lead frame, the P / N electrode layer 1 is formed.
The semiconductor light emitting element 1 is mounted so that 1 and 12 are in contact with each other in the vertical direction.

【0086】最後に、半導体発光素子1の上面から荷重
(約2乃至20kg/cm2 ,図中矢印で示した方向から加
圧する)を架けながら異方導電性樹脂接着剤9″の硬化
を行う。硬化条件は、異方導電性樹脂接着剤9″の種類
により異なるが本実施例で用いたものでは、150℃‐
2分乃至200℃‐30秒である。
Finally, the anisotropic conductive resin adhesive 9 ″ is cured while applying a load (about 2 to 20 kg / cm 2 , applying pressure from the direction shown by the arrow in the figure) from the upper surface of the semiconductor light emitting device 1. The curing conditions differ depending on the type of the anisotropic conductive resin adhesive 9 ″, but the one used in this example has a temperature of 150 ° C.
2 minutes to 200 ° C.-30 seconds.

【0087】この結果、荷重を受けて硬化したP・N両
電極層11,12と絶縁基板又はリードフレーム等の基
体の電極部分20,21との間では、間に挟まった個々
の導電性物質14″が直接接触するので導通状態が作り
出される。
As a result, between the P and N electrode layers 11 and 12 which are hardened under the load and the electrode portions 20 and 21 of the substrate such as the insulating substrate or the lead frame, the individual conductive substances sandwiched therebetween are provided. Conduction is created because the 14 "are in direct contact.

【0088】これに対して、その他の部分の異方導電性
樹脂接着剤9″は、負荷を受けずに硬化するので導電性
物質14″同士が接触しあうことはほとんど無く樹脂1
5中に分散しているので絶縁性樹脂接着剤として振舞
う。
On the other hand, the anisotropic conductive resin adhesive 9 ″ on the other portions is cured without being loaded, so that the conductive substances 14 ″ hardly contact each other, and the resin 1
Since it is dispersed in 5, it behaves as an insulating resin adhesive.

【0089】但しこの場合でも、被接着面間の隙間が導
電性物質14″の最大径よりも小さいと被接着面間に導
電性物質14″による導通が生じる可能性があるが、上
記半導体発光素子1はPN接合部及びその近傍13が凹
状に形成されているのでPN接合が露出する端面での導
電性物質14″による導通状態は起こらない。
However, even in this case, if the gap between the adhered surfaces is smaller than the maximum diameter of the conductive material 14 ″, the conductive material 14 ″ may cause conduction between the adhered surfaces. Since the PN junction and the vicinity 13 of the element 1 are formed in a concave shape, a conductive state due to the conductive substance 14 ″ does not occur at the end face where the PN junction is exposed.

【0090】上記本発明の第1の実施例では、4面すべ
てのPN接合部及びその近傍が凹状に形成されている
が、半導体発光素子を絶縁基板又はリードフレーム等の
基体に接続する際にこれらの少なくとも電極方向に対抗
する1面のみが凹状に形成されていればよい。
In the above-described first embodiment of the present invention, the PN junctions on all four surfaces and the vicinity thereof are formed in a concave shape, but when connecting the semiconductor light emitting element to a base such as an insulating substrate or a lead frame. It suffices that at least one of these surfaces facing the electrode direction is formed in a concave shape.

【0091】又、これらの形状は必ずしも凹状である必
要はなく、半導体発光素子の電極層が絶縁基板又はリー
ドフレーム等の基体と接着する箇所では異方導電性樹脂
接着剤が導電性樹脂接着剤として振舞い、それ以外の付
着面、特にPN接合が露出する端面では異方導電性樹脂
接着剤が絶縁性樹脂接着剤として振舞う様な構造であれ
ばよい。
Further, these shapes do not necessarily have to be concave, and the anisotropic conductive resin adhesive is a conductive resin adhesive at a position where the electrode layer of the semiconductor light emitting element is bonded to a base such as an insulating substrate or a lead frame. The anisotropic conductive resin adhesive behaves as an insulative resin adhesive on the other adhering surface, especially on the end face where the PN junction is exposed.

【0092】次に、本発明の他の実施例について図面を
参照して説明する。
Next, another embodiment of the present invention will be described with reference to the drawings.

【0093】尚、図面において本発明の第1の実施例と
同じ材料,形状等を示す部分は同一の符号を付してその
詳しい説明は省略する。
In the drawings, the same reference numerals are given to the same materials, shapes and the like as those of the first embodiment of the present invention, and the detailed description thereof will be omitted.

【0094】図7は本発明の他の実施例により形成され
た半導体発光素子の斜視図であり、図8(a)は図1に
おけるB‐B′部分の断面図、(b)は上面図、(c)
は底面図である。
FIG. 7 is a perspective view of a semiconductor light emitting device formed according to another embodiment of the present invention, FIG. 8 (a) is a sectional view taken along the line BB 'in FIG. 1, and FIG. 8 (b) is a top view. , (C)
Is a bottom view.

【0095】この実施例が先に説明した実施例と異なる
点は、P・N電極層11′,12′を金属薄膜5,6と
導電性のろう材又は樹脂接着剤19′,19″とで形成
したことと、PN接合部及びその近傍13を絶縁性物質
22で端面を被覆したことの2点にある。
This embodiment is different from the above-described embodiment in that the P / N electrode layers 11 'and 12' are made of metal thin films 5 and 6 and a conductive brazing material or resin adhesive 19 ', 19 ". And that the end surface of the PN junction and its vicinity 13 is covered with an insulating material 22.

【0096】即ち、本実施例の半導体発光素子23の構
造は、まずIII‐V族化合物半導体,II‐VI族化合物半
導体或いはSiC 等の半導体材料よりなるN型の半導体
層2上に、同じくIII‐V族化合物半導体,II‐VI族化
合物半導体或いはSiC 等の半導体材料よりなるP型の
半導体層3が積層形成されている。
That is, the structure of the semiconductor light emitting device 23 of this embodiment is as follows. First, on the N-type semiconductor layer 2 made of a semiconductor material such as a III-V group compound semiconductor, a II-VI group compound semiconductor, or SiC, the same III A P-type semiconductor layer 3 made of a semiconductor material such as a group-V compound semiconductor, a group II-VI compound semiconductor, or SiC is laminated.

【0097】次に、PN接合面4に平行な両端面の全面
上に例えばAgやAu等よりなる金属薄膜5,6と、例え
ばインジウム等の金属系からなる導電性のろう材又はA
u ‐エポキシ樹脂,Ag ‐エポキシ樹脂等からなる導電
性樹脂接着剤19′,19″が順次積層されてP電極層
11′とN電極層12′が形成されている。導電性のろ
う材又は樹脂接着剤19′,19″の膜厚は後工程での
実装状態等を考慮して、少なくとも20μm以上、望ま
しくは30乃至100μmの間に設定されている。
Next, metal thin films 5 and 6 made of, for example, Ag or Au, and a conductive brazing material made of metal such as indium, or A, are formed on the entire surfaces of both end surfaces parallel to the PN junction surface 4.
Conductive resin adhesives 19 'and 19 "made of u-epoxy resin, Ag-epoxy resin or the like are sequentially laminated to form a P electrode layer 11' and an N electrode layer 12 '. The film thickness of the resin adhesives 19 ′ and 19 ″ is set to at least 20 μm or more, preferably 30 to 100 μm, in consideration of the mounting state in the subsequent steps.

【0098】PN接合部及びその近傍13は、その周囲
の面よりも低い位置になるように凹状に形成されてお
り、この凹状に形成された部分は、例えば液状エポキシ
樹脂(ビスフェノールA型エポキシ樹脂:40乃至70
重量部,フェノールノボラック型エポキシ樹脂:10乃
至30重量部,シリカ微粒子:0乃至50重量部,変性
尿素樹脂:1乃至5重量部未満の混合物等)等の有機材
料の絶縁性物質22で端面が被覆されている。
The PN junction portion and its vicinity 13 are formed in a concave shape so as to be located at a position lower than the peripheral surface thereof, and the concave portion is formed of, for example, a liquid epoxy resin (bisphenol A type epoxy resin). : 40 to 70
Parts by weight, phenol novolac type epoxy resin: 10 to 30 parts by weight, silica fine particles: 0 to 50 parts by weight, modified urea resin: mixture of 1 to less than 5 parts by weight, etc.) It is covered.

【0099】尚、本実施例では液状エポキシ樹脂等の有
機材料で絶縁性物質を形成しているが、Si2やAl2
3 等の無機材料を用いて、蒸着,スパッタリング又はス
ピンコーティング等の手法により形成してもよい。
In this embodiment, the insulating substance is formed of an organic material such as liquid epoxy resin, but S i O 2 or Al 2 O is used.
It may be formed by using an inorganic material such as 3 by a method such as vapor deposition, sputtering or spin coating.

【0100】次に、本発明の他の実施例における半導体
発光素子の製造方法について詳細に説明する。
Next, a method of manufacturing a semiconductor light emitting device according to another embodiment of the present invention will be described in detail.

【0101】図9(a)乃至(i)は本実施例を用いた
半導体発光素子の製造方法を示す手順図である。
9A to 9I are procedural diagrams showing a method for manufacturing a semiconductor light emitting device using this embodiment.

【0102】尚、図9(a)及び(b)は、本発明の第
1の実施例において説明した図4(a)及び(b)と同
じ工程であるので図中に図番のみ記して説明は省略す
る。
Since FIGS. 9A and 9B show the same steps as FIGS. 4A and 4B described in the first embodiment of the present invention, only the drawing numbers are shown in the drawings. The description is omitted.

【0103】溝部18中の表面の化学処理後、ウエハー
状態の半導体発光素子23′は、図9(c)に示すよう
にP型の半導体層3側の金属薄膜5の表面上で同表面よ
り僅かに小さな面積の範囲内に、例えばインジウム等の
金属系からなる導電性のろう材又はAu ‐エポキシ樹
脂,Ag ‐エポキシ樹脂等からなる導電性樹脂接着剤1
9が塗布される。この時の導電性のろう材又は樹脂接着
剤19の膜厚は、あまり薄くすると後工程での作業性が
悪くなり、逆に厚くすると硬化の際に応力破壊等が発生
するので、例えば20乃至150μmの間に設定され
る。
After the surface of the groove 18 is chemically treated, the semiconductor light emitting device 23 'in a wafer state is formed on the surface of the metal thin film 5 on the P-type semiconductor layer 3 side as shown in FIG. 9C. Within a slightly small area, a conductive brazing material made of metal such as indium or a conductive resin adhesive made of Au-epoxy resin, Ag-epoxy resin, etc. 1
9 is applied. At this time, if the film thickness of the conductive brazing material or the resin adhesive 19 is too thin, workability in the subsequent process is deteriorated, and conversely, if it is thick, stress fracture or the like occurs at the time of curing. It is set between 150 μm.

【0104】上記状態では、導電性のろう材又は樹脂接
着剤19はまだ未硬化の状態であり、次にこれを硬化し
て金属薄膜5表面上に硬化定着する必要がある。
In the above-mentioned state, the conductive brazing material or resin adhesive 19 is still in an uncured state, and it is necessary to subsequently cure this to cure and fix it on the surface of the metal thin film 5.

【0105】従って、次に図9(d)に示すように所定
の硬化条件(硬化条件は、導電性のろう材又は樹脂接着
剤19の種類により異なるが本実施例で使用したもので
は、150℃‐1乃至2時間もしくは相当条件である)
にて金属薄膜5に硬化定着させる。
Therefore, as shown in FIG. 9D, a predetermined curing condition (the curing condition varies depending on the type of the conductive brazing material or the resin adhesive 19 is 150 in the present embodiment). (° C-1 to 2 hours or equivalent)
Then, the metal thin film 5 is cured and fixed.

【0106】次に、図9(e)に示すように複数の垂直
に交差する2種類の平行な溝部18に例えば液状エポキ
シ樹脂(ビスフェノールA型エポキシ樹脂:40乃至7
0重量部,フェノールノボラック型エポキシ樹脂:10
乃至30重量部,シリカ微粒子:0乃至50重量部,変
性尿素樹脂:1乃至5重量部未満の混合物等)等の有機
材料の絶縁性物質22を塗布する。この時の絶縁性物質
22の塗布量は、金属薄膜5表面上に硬化定着した導電
性のろう材又は樹脂接着剤19の表面上に溢れ出さない
ように溝部18上で約5乃至20μmの高さになるよう
にする。絶縁性物質22塗布の際は、この中に気泡が内
在しないように、例えば絶縁性物質22の粘度を10po
ise(1poise=10-1N・s/m2)以下に押さえるとか、塗
布後に真空脱泡を行う等の配慮が必要である。
Next, as shown in FIG. 9E, for example, liquid epoxy resin (bisphenol A type epoxy resin: 40 to 7) is formed in a plurality of two kinds of vertical groove portions 18 that intersect each other vertically.
0 parts by weight, phenol novolac type epoxy resin: 10
To 30 parts by weight, fine silica particles: 0 to 50 parts by weight, modified urea resin: mixture of 1 to less than 5 parts by weight) and the like, and an insulating substance 22 of an organic material is applied. The amount of the insulating material 22 applied at this time is about 5 to 20 μm on the groove 18 so as not to overflow onto the surface of the conductive brazing material or resin adhesive 19 which is cured and fixed on the surface of the metal thin film 5. To be When applying the insulating substance 22, for example, the viscosity of the insulating substance 22 is set to 10 po so that no bubbles are present therein.
It is necessary to keep the pressure below ise ( 1 poise = 10 -1 N · s / m 2 ) or to perform vacuum defoaming after coating.

【0107】絶縁性物質22は、塗布・脱泡後に所定の
硬化条件(硬化条件は、絶縁性物質22の種類により異
なるが本実施例で用いたものでは、130℃以下の温
度、望ましくは100℃‐4乃至8時間)にて溝部18
に硬化定着させる。
The insulating substance 22 has a predetermined curing condition after coating and defoaming (the curing condition is different depending on the type of the insulating substance 22, but in the case of this embodiment, the temperature is 130 ° C. or lower, preferably 100 ° C. Groove part 18 at ℃ -4 to 8 hours)
Cure and fix to.

【0108】絶縁性物質22の硬化は、溝部18が深す
ぎたり、絶縁性物質22の硬化温度が高くなるにつれて
絶縁性物質22の硬化収縮によりウエハー状態の半導体
発光素子23′に「反り」が発生して後工程に支障を来
すので、絶縁性物質22の硬化性能(本実施例では、含
有樹脂の成分・組成に依存する)をも含めてこれらのパ
ラメータを個々の場合に応じて慎重に選ぶことが肝要で
ある。例えば、本実施例では溝部18の深さは、100
μm以内で絶縁性物質22の硬化温度は120℃以下に
止める方がよい。
When the insulating material 22 is hardened, the groove 18 becomes too deep, and as the hardening temperature of the insulating material 22 rises, the insulating material 22 hardens and shrinks, so that the semiconductor light emitting element 23 'in a wafer state is warped. Since these occur and interfere with the subsequent processes, these parameters including the curing performance of the insulating material 22 (in this embodiment, it depends on the components and compositions of the resin contained) should be carefully adjusted according to the individual case. It is essential to choose. For example, in this embodiment, the groove 18 has a depth of 100
It is better to keep the curing temperature of the insulating material 22 at 120 ° C. or less within μm.

【0109】本実施例では液状エポキシ樹脂等の有機材
料で絶縁性物質22を形成しているが、Si2やAl2
3 等の無機材料により形成してもよい。この場合は、蒸
着,スパッタリング又はスピンコーティング等の手法を
用いる。
In this embodiment, the insulating substance 22 is made of an organic material such as liquid epoxy resin, but S i O 2 or Al 2 O is used.
It may be formed of an inorganic material such as 3 . In this case, a technique such as vapor deposition, sputtering or spin coating is used.

【0110】次に、図9(f)に示すようにP型の半導
体層3側の金属薄膜5の表面上に形成された導電性のろ
う材又は樹脂接着剤19を、その膜厚が2O乃至50μ
mになるまで例えばサンドペーパー等(番手:#800
乃至#2000程度)を用いて研磨する。
Next, as shown in FIG. 9 (f), a conductive brazing material or resin adhesive 19 formed on the surface of the metal thin film 5 on the P-type semiconductor layer 3 side is applied, and its thickness is 20 To 50μ
For example, sandpaper (count: # 800)
To about # 2000).

【0111】更に、図9(g)に示すようにウエハー状
態の半導体発光素子23′の表裏両面に導電性のろう材
又は樹脂接着剤19′,19″を塗布する。
Further, as shown in FIG. 9 (g), a conductive brazing material or resin adhesive 19 ', 19 "is applied to both front and back surfaces of the semiconductor light emitting device 23' in a wafer state.

【0112】そして図9(h)に示すように、例えば1
10℃‐4乃至8時間或いは150℃‐1乃至2時間等
の硬化条件で硬化し、膜厚が、少なくとも20μm以
上、望ましくは30乃至100μmの間になるようにP
・N両面の電極層11′,12′を形成する。何故なら
ば、電極層11′,12′の膜厚が20μm以下の場合
は、絶縁基板又はリードフレーム等の基体の電極部との
導通が充分に取れず、逆に100μm以上の場合は、応
力破壊や電極剥離等が発生しやすくなるからである。上
記導通は膜厚が20μm以上あれば取れるが、30μm以
上ある方がより確実である。又、150μm程度までの
膜厚であれば本発明における上記不良の発生頻度はそれ
ほど高くない。
Then, as shown in FIG. 9 (h), for example, 1
It is cured under the curing conditions of 10 ° C-4 to 8 hours or 150 ° C-1 to 2 hours, and the film thickness is at least 20 μm or more, preferably 30 to 100 μm.
-Form electrode layers 11 'and 12' on both sides of N. The reason is that when the thickness of the electrode layers 11 'and 12' is 20 μm or less, sufficient electrical continuity cannot be obtained with the electrode portion of the base body such as the insulating substrate or lead frame, and conversely, when the thickness is 100 μm or more, stress is applied. This is because breakage and electrode peeling are likely to occur. The above conduction can be obtained when the film thickness is 20 μm or more, but it is more reliable when the film thickness is 30 μm or more. If the film thickness is up to about 150 μm, the frequency of occurrence of the above defects in the present invention is not so high.

【0113】最後に、図9(i)に示すように例えばダ
イヤモンドブレード等を用いて、絶縁性物質22が充填
された複数の垂直に交差する2種類の平行な溝部18
(幅:約50乃至80μm)の中央に沿ってウエハー状
態の半導体発光素子23′を個々のチップ状の半導体発
光素子23に分割する。この時、絶縁破壊等を考慮する
とPN接合が露出する端面上に形成された絶縁性物質2
2の膜厚が少なくとも絶縁破壊等が発生する距離以上に
なるように分割幅を設定する必要がある。本実施例で
は、分割精度等も加味してPN接合が露出する端面上に
形成された絶縁性物質22の膜厚が少なくとも5μm以
上になるように分割幅は、溝部18(幅:約50乃至8
0μm)よりも少なくとも10μm以上望ましくは約20
μm狭く設定する必要がある。
Finally, as shown in FIG. 9 (i), a plurality of vertically intersecting parallel groove portions 18 filled with the insulating material 22 are formed by using, for example, a diamond blade or the like.
The semiconductor light emitting device 23 'in a wafer state is divided into individual chip-shaped semiconductor light emitting devices 23 along the center of (width: about 50 to 80 μm). At this time, in consideration of dielectric breakdown or the like, the insulating material 2 formed on the end face where the PN junction is exposed
It is necessary to set the division width so that the film thickness of 2 is at least the distance at which dielectric breakdown or the like occurs. In the present embodiment, the division width is set so that the film thickness of the insulating material 22 formed on the end surface where the PN junction is exposed is at least 5 μm or more in consideration of division accuracy and the like, and the groove portion 18 (width: about 50 to 8
0 μm) and at least 10 μm or more, preferably about 20
It must be set to a narrower μm.

【0114】図10(a)乃至(c)は本発明の他の実
施例における半導体発光素子の実装方法を説明する図面
である。
FIGS. 10A to 10C are views for explaining a method of mounting a semiconductor light emitting device in another embodiment of the present invention.

【0115】図10(a)は絶縁基板又はリードフレー
ム等の基体の電極部分の間隔x1 を半導体発光素子のP
・N両電極層の間隔よりも狭く取った場合での実装方法
を示している。
In FIG. 10A, the distance x 1 between the electrode portions of the substrate such as the insulating substrate or the lead frame is defined as P of the semiconductor light emitting element.
-It shows the mounting method when the distance between the N electrode layers is narrower.

【0116】まず、半導体発光素子23の導電接着の際
の位置ずれを防ぐ目的で、予め絶縁基板又はリードフレ
ーム等の基体の電極部分20,21の間に絶縁性接着剤
24を塗布する。
First, an insulating adhesive 24 is applied in advance between the electrode portions 20 and 21 of a substrate such as an insulating substrate or a lead frame in order to prevent positional deviation during conductive bonding of the semiconductor light emitting element 23.

【0117】次に、絶縁基板又はリードフレーム等の基
体の電極部分20,21上に、例えばインジウム等の金
属系の導電性のろう材又はAg ‐エポキシ樹脂等の導電
性樹脂接着剤19を予め塗布した後、半導体発光素子2
3のP・N両電極層11′,12′を各々絶縁基板又は
リードフレーム等の基体の電極部分20,21上に設置
してから導電性のろう材又は樹脂接着剤19を硬化す
る。硬化条件は、導電性のろう材又は樹脂接着剤19の
種類により異なるが本実施例で用いたものでは、例えば
110℃‐4乃至8時間或いは150℃‐1乃至2時間
もしくは相当条件である。
Next, a metal-based conductive brazing material such as indium or a conductive resin adhesive 19 such as Ag-epoxy resin is preliminarily provided on the electrode portions 20 and 21 of the substrate such as the insulating substrate or the lead frame. After coating, the semiconductor light emitting device 2
The P and N electrode layers 11 'and 12' of No. 3 are placed on the electrode portions 20 and 21 of the substrate such as the insulating substrate or the lead frame, and the conductive brazing material or the resin adhesive 19 is hardened. The curing conditions differ depending on the type of the conductive brazing material or the resin adhesive 19, but in the case used in this embodiment, it is, for example, 110 ° C. for 4 to 8 hours or 150 ° C. for 1 to 2 hours or a corresponding condition.

【0118】本実施例では、半導体発光素子23搭載面
のPN接合部及びその近傍は13は、絶縁性物質22に
て端面が被覆されているので、搭載時に発生する導電性
のろう材又は樹脂接着剤19の回り込みによるPN接合
が露出する端面での短絡,傷や破損等の不良が無くな
る。
In this embodiment, the PN junction portion of the mounting surface of the semiconductor light emitting element 23 and its vicinity 13 are covered at their end faces with the insulating material 22, so that a conductive brazing material or resin generated during mounting is used. A defect such as a short circuit, a scratch or a breakage at the end face where the PN junction is exposed due to the wraparound of the adhesive 19 is eliminated.

【0119】図10(b)は絶縁基板又はリードフレー
ム等の基体の電極部分の間隔x2 を半導体発光素子のP
・N両電極層の間隔よりも広く取った場合での実装方法
を示している。基本的な実装方法・条件等は上記図10
(a)と同じである。
In FIG. 10B, the distance x 2 between the electrode portions of the substrate such as the insulating substrate or the lead frame is represented by P of the semiconductor light emitting device.
-The figure shows the mounting method when the distance between the N electrode layers is wider. The basic mounting method and conditions are shown in Fig. 10 above.
Same as (a).

【0120】まず、半導体発光素子23の導電接着の際
の位置ずれを防ぐ目的で、予め絶縁基板又はリードフレ
ーム等の基体の電極部分20,21の間に絶縁性接着剤
24を塗布しておき、半導体発光素子23のP・N両電
極層11′,12′を各々絶縁基板又はリードフレーム
等の基体の電極部分20,21上に搭載固定する。
First, in order to prevent positional displacement during conductive bonding of the semiconductor light emitting element 23, an insulating adhesive 24 is applied in advance between the electrode portions 20 and 21 of the substrate such as an insulating substrate or lead frame. The P and N electrode layers 11 'and 12' of the semiconductor light emitting device 23 are mounted and fixed on the electrode portions 20 and 21 of the base such as an insulating substrate or a lead frame.

【0121】次に、半導体発光素子23と絶縁基板又は
リードフレーム等の基体の電極部分20,21とを導通
させるために、例えばインジウム等の金属系からなる導
電性のろう材又はAg‐エポキシ樹脂等の導電性樹脂接
着剤19を塗布した後硬化する。硬化条件は、導電性の
ろう材又は樹脂接着剤19の種類により異なるが本実施
例で用いたものでは、例えば110℃‐4乃至8時間或
いは150℃‐1乃至2時間もしくは相当条件である。
Next, in order to electrically connect the semiconductor light emitting element 23 and the electrode portions 20 and 21 of the base body such as the insulating substrate or the lead frame, a conductive brazing material or Ag-epoxy resin made of metal such as indium is used. The conductive resin adhesive 19 such as the above is applied and then cured. The curing conditions differ depending on the type of the conductive brazing material or the resin adhesive 19, but in the case used in this embodiment, it is, for example, 110 ° C. for 4 to 8 hours or 150 ° C. for 1 to 2 hours or a corresponding condition.

【0122】本実施例では、P・N両電極層11′,1
2′が実装用の導電性のろう材又は樹脂接着剤19と同
じ材料の導電性のろう材又は樹脂接着剤19′,19″
で予め形成されているので、従来の実施例で実装したも
のに比べると、実装用の導電性のろう材又は樹脂接着剤
19とP・N両電極層11′,12′とのなじみは、格
段に向上する。
In this embodiment, both the P and N electrode layers 11 'and 1
2'is a conductive brazing material or resin adhesive 19 ', 19 "of the same material as the conductive brazing material or resin adhesive 19 for mounting.
Since it is formed in advance, the familiarity between the conductive brazing material or resin adhesive 19 for mounting and the P / N both electrode layers 11 ', 12' is larger than that of the one mounted in the conventional example. Greatly improved.

【0123】図10(c)は異方導電性樹脂接着剤を用
いて絶縁基板又はリードフレーム等の基体に接続した場
合の断面図である。
FIG. 10C is a cross-sectional view of the case where an anisotropic conductive resin adhesive is used to connect to an insulating substrate or a substrate such as a lead frame.

【0124】図10に示すように絶縁基板又はリードフ
レーム等の基体の電極部分20,21に例えばハイソー
ル社製の「モーフィット TG‐9000R」やその類
似品で液状の透光性エポキシ樹脂に数乃至数十wt%の導
電性粗粒子(粒径:約10μm以下)を配合した樹脂材
料等の異方導電性樹脂接着剤9″を塗布(膜厚:約数乃
至10μm)する。
As shown in FIG. 10, the electrode parts 20, 21 of the substrate such as the insulating substrate or the lead frame are made of liquid translucent epoxy resin such as "Morfit TG-9000R" manufactured by Hysole Co. or the like. An anisotropic conductive resin adhesive 9 ″ such as a resin material containing conductive coarse particles (particle size: about 10 μm or less) of 10 to several wt% is applied (film thickness: about several to 10 μm).

【0125】次に、絶縁基板又はリードフレーム等の基
体の電極部分20,21に対して、P・N両電極層1
1′,12′が垂直方向で接するように半導体発光素子
23を搭載する。
Next, with respect to the electrode portions 20 and 21 of the substrate such as the insulating substrate or the lead frame, the P / N electrode layer 1 is formed.
The semiconductor light emitting element 23 is mounted so that 1'and 12 'are in contact with each other in the vertical direction.

【0126】最後に、半導体発光素子23の上面から荷
重(約2乃至20kg/cm2 ,図中矢印で示した方向から
加圧する)を架けながら異方導電性樹脂接着剤9″の硬
化を行う。硬化条件は、異方導電性樹脂接着剤9″の種
類により異なるが本実施例で用いたものでは、150℃
‐2分乃至200℃‐30秒である。
Finally, the anisotropic conductive resin adhesive 9 ″ is cured while applying a load (about 2 to 20 kg / cm 2 , pressure is applied in the direction shown by the arrow in the figure) from the upper surface of the semiconductor light emitting element 23. The curing conditions differ depending on the type of the anisotropic conductive resin adhesive 9 ″, but the one used in this example has a temperature of 150 ° C.
-2 minutes to 200 ° C.-30 seconds.

【0127】この結果、荷重を受けて硬化したP・N両
電極層11′,12′と絶縁基板又はリードフレーム等
の基体の電極部分20,21との間では間に挟まった個
々の導電性物質14″が直接接触するので導通状態が作
り出される。
As a result, the individual conductive layers sandwiched between the P and N electrode layers 11 'and 12' cured by the load and the electrode portions 20 and 21 of the substrate such as the insulating substrate or the lead frame. Conductivity is created because the material 14 "is in direct contact.

【0128】これに対して、その他の部分の異方導電性
樹脂接着剤9″は、負荷を受けずに硬化するので導電性
物質14″同士が接触しあうことはほとんど無く樹脂1
5中に分散しており絶縁性樹脂接着剤として振舞う。
On the other hand, the anisotropic conductive resin adhesive 9 ″ on the other portions is cured without being loaded, so that the conductive substances 14 ″ hardly contact each other and the resin 1
Dispersed in 5 and behaves as an insulating resin adhesive.

【0129】但しこの場合においても、被接着面間の隙
間が導電性物質14″の最大径よりも小さいと導電性物
質14″による導通が生じる可能性があるが、上記半導
体発光素子23はPN接合部及びその近傍13は絶縁性
物質22により絶縁耐圧以上の膜厚で被覆されており、
PN接合が露出する端面が上記導電性物質14″と接触
することは無く、従って導通状態は起こらない。
However, even in this case, if the gap between the surfaces to be adhered is smaller than the maximum diameter of the conductive substance 14 ″, conduction may occur due to the conductive substance 14 ″. The joint portion and its vicinity 13 are covered with the insulating substance 22 with a film thickness equal to or higher than the withstand voltage,
The end face where the PN junction is exposed does not come into contact with the conductive material 14 ″, so that no conduction state occurs.

【0130】本実施例では、異方導電性樹脂接着剤9″
が半導体発光素子23の固定用の絶縁性接着剤を兼ねる
ので、半導体発光素子23を導電接着する際の位置ずれ
防止及びPN接合露出部分の保護等を目的として従来使
用されていた絶縁性接着剤は不要になる。
In this embodiment, the anisotropic conductive resin adhesive 9 "is used.
Also serves as an insulative adhesive for fixing the semiconductor light emitting element 23, and thus the insulative adhesive that has been conventionally used for the purpose of preventing misalignment when the semiconductor light emitting element 23 is electrically conductively bonded, protecting the exposed PN junction, and the like. Becomes unnecessary.

【0131】上記本発明の他の実施例では、4面すべて
のPN接合部及びその近傍が凹状に形成されており、こ
の部分すべてに絶縁性物質が充填された構造になってい
るが、半導体発光素子を絶縁基板又はリードフレーム等
の基体に接続する際には、少なくとも電極方向に対抗す
る1面のみが凹状に形成され、この部分のみに絶縁性物
質が充填された構造になっていればよい。又、複数のP
N接合部及びその近傍が凹状に形成されている場合で
も、半導体発光素子を絶縁基板又はリードフレーム等の
基体に接続する際に、少なくとも電極方向に対抗する1
面のみに絶縁性物質が充填された構造になっていればよ
い。
In the other embodiment of the present invention described above, the PN junctions on all four surfaces and their vicinity are formed in a concave shape, and all of these portions are filled with an insulating material. When connecting the light emitting element to a base such as an insulating substrate or a lead frame, at least one surface facing the electrode direction is formed in a concave shape, and only this portion is filled with an insulating material. Good. Also, multiple P
Even when the N-junction portion and its vicinity are formed in a concave shape, when connecting the semiconductor light-emitting element to a base such as an insulating substrate or a lead frame, at least they oppose to the electrode direction.
The structure may be such that only the surface is filled with the insulating material.

【0132】更に、これらの形状は必ずしも凹状である
必要はなく、半導体発光素子のPN接合が露出する端面
が絶縁性物質で被覆可能であるならば、PN接合が露出
する端面のうち絶縁基板又はリードフレーム等の基体と
対抗する端面において、絶縁性物質が平坦な形状に形成
できる様な加工形状・工程であればよい。
Furthermore, these shapes do not necessarily have to be concave, and if the end surface of the semiconductor light emitting device where the PN junction is exposed can be covered with an insulating material, then the insulating substrate or the end surface where the PN junction is exposed can be used. Any processing shape / process may be used so that the insulating material can be formed into a flat shape on the end surface of the lead frame or the like that faces the substrate.

【0133】[0133]

【発明の効果】本発明によれば、 (1)半導体発光素子の半導体層のPN接合面に垂直な
端面のうち少なくとも一端面上に露出するPN接合部及
びその近傍が、周囲の垂直な端面よりも低い位置になる
ように形成されているか、又は凹状に形成されているの
で、絶縁基板又はリードフレーム等への搭載時に半導体
発光素子の端面上に露出するPN接合部及びその近傍に
発生する傷や破損等が防止される。
EFFECTS OF THE INVENTION According to the present invention, (1) of the end faces of the semiconductor layer of the semiconductor light emitting element, which are perpendicular to the PN junction face, exposed at least on one end face and the vicinity thereof are the peripheral vertical end faces. Since it is formed so as to be located at a position lower than that, or is formed in a concave shape, it is generated in the PN junction portion exposed on the end face of the semiconductor light emitting element and its vicinity when mounted on an insulating substrate or a lead frame or the like. Scratches and damages are prevented.

【0134】従って、作業が容易になり生産性及び歩留
まりが向上しコストダウンが可能になるので、安価な製
品を供給することが可能になる。
Therefore, the work is facilitated, the productivity and the yield are improved, and the cost can be reduced, so that the inexpensive product can be supplied.

【0135】(2)半導体発光素子の半導体層のPN接
合面に垂直な端面のうち少なくとも一端面上に露出する
PN接合部及びその近傍は絶縁性物質にて形成されてい
るので、絶縁基板又はリードフレーム等への搭載時に半
導体発光素子の端面上に露出するPN接合部及びその近
傍に発生する導電性のろう材又は樹脂接着剤の回り込み
によるPN接合の短絡や,傷又は破損等の不良が無くな
る。
(2) Since the PN junction part exposed on at least one end face of the semiconductor layer of the semiconductor light emitting element, which is perpendicular to the PN junction face, and its vicinity are formed of an insulating material, the insulating substrate or When the PN junction is exposed on the end face of the semiconductor light emitting device when mounted on a lead frame or the like, and there is a short circuit of the PN junction due to the wraparound of the conductive brazing material or the resin adhesive, a defect such as a scratch or a damage. Lost.

【0136】又は絶縁性物質により形成された端面は、
PN接合面に垂直な端面と同一面を有しているので、絶
縁基板又はリードフレーム等への搭載時には端面に安定
性があり、半導体発光素子の搭載が容易に行える。
Alternatively, the end face formed of an insulating material is
Since it has the same surface as the end surface perpendicular to the PN junction surface, the end surface has stability when mounted on an insulating substrate, a lead frame, or the like, and the semiconductor light emitting element can be mounted easily.

【0137】更に絶縁性物質は、半導体発光素子の出射
光に対して透明で、且つエポキシ系樹脂やフェノール系
樹脂等の有機材料及びSiO2やAl23 等の無機材料の
中から選ばれた物質を使用しているので、光の利用効率
は低下しない。
Further, the insulating material is transparent to the light emitted from the semiconductor light emitting element and is selected from organic materials such as epoxy resin and phenol resin and inorganic materials such as SiO 2 and Al 2 O 3. Since it uses different materials, the light utilization efficiency does not decrease.

【0138】従って、作業が容易になり生産性,信頼性
及び歩留まりが向上しコストダウンが可能になるので、
安価な製品を供給することが可能になる。
Therefore, the work is facilitated, the productivity, the reliability and the yield are improved and the cost can be reduced.
It becomes possible to supply inexpensive products.

【0139】(3)半導体発光素子の半導体層は、III
‐V族化合物半導体、II‐VI族化合物半導体、SiC等
の半導体材料の中から任意に選び出して作成することが
可能であるので、異なる発光色の半導体発光素子を用い
たカラー表示装置等が容易に製作可能になる。
(3) The semiconductor layer of the semiconductor light emitting device is III
-Since it can be created by arbitrarily selecting from semiconductor materials such as group V compound semiconductors, II-VI group compound semiconductors, and SiC, color display devices using semiconductor light emitting elements of different emission colors are easy. Can be manufactured.

【0140】従って、ブラウン管や液晶モニターと同等
もしくはそれ以上の商品価値を有する表示装置等を開発
することが可能になる。
Therefore, it becomes possible to develop a display device having a commercial value equal to or higher than that of a cathode ray tube or a liquid crystal monitor.

【0141】(4)半導体発光素子の半導体層上に形成
される電極層は、金属薄膜と、導電性のろう材又は樹脂
接着剤との組合せにより形成されるか、或いは金属薄膜
と、異方導電性樹脂接着剤及び金属箔との組合せにより
形成されているので、電極層形成が簡単に行え、又電極
層形成時の半導体発光素子の半導体層と電極層との応力
の差による半導体層の破壊や電極層の剥離等の発生も無
くなる。
(4) The electrode layer formed on the semiconductor layer of the semiconductor light emitting device is formed by a combination of a metal thin film and a conductive brazing material or a resin adhesive, or is anisotropic from the metal thin film. Since it is formed by the combination of the conductive resin adhesive and the metal foil, the electrode layer can be easily formed, and the semiconductor layer of the semiconductor light emitting element due to the difference in stress between the semiconductor layer and the electrode layer at the time of forming the electrode layer The occurrence of breakage and peeling of the electrode layer is eliminated.

【0142】更に電極層の膜厚を150μm以下に抑え
ているので応力破壊や電極剥離等の問題を未然に防止す
るとができる。
Further, since the film thickness of the electrode layer is suppressed to 150 μm or less, problems such as stress destruction and electrode peeling can be prevented.

【0143】又は、膜厚に少なくとも20μm以という
下限を設けることにより、実装時の駆動に支障をきたさ
ず、充分な導通を確保できる。
Alternatively, by setting the lower limit of the film thickness to at least 20 μm or more, it is possible to secure sufficient conduction without hindering the driving at the time of mounting.

【0144】従って、工程が簡略化されるので生産性,
信頼性及び歩留まりが向上しコストダウンが可能になる
ので、安価な製品を供給することが可能になる。
Therefore, since the process is simplified, the productivity,
Since reliability and yield are improved and cost can be reduced, inexpensive products can be supplied.

【0145】或いは半導体発光素子の電極層は、絶縁基
板又はリードフレーム等の基体に対して垂直方向になる
ようにして配置されるので、放射光を遮る電極層が無く
光の利用効率は高い。又、電極層の全面において導電性
のろう材又は樹脂接着剤或いは異方導電性樹脂接着剤で
接続されるので効果的な放熱が行われ、発光効率が増大
する。又、Au ワイヤー等による基板電極部との接続は
不要であり、工程及び作業時間や材料費の低減や寸法の
小型化が可能になる。
Alternatively, since the electrode layer of the semiconductor light emitting element is arranged so as to be perpendicular to the substrate such as the insulating substrate or the lead frame, there is no electrode layer for blocking the emitted light, and the light utilization efficiency is high. In addition, since the entire surface of the electrode layer is connected with a conductive brazing material, a resin adhesive, or an anisotropic conductive resin adhesive, effective heat dissipation is performed and luminous efficiency is increased. Further, it is not necessary to connect with the substrate electrode portion by Au wire or the like, and it is possible to reduce the process and working time, the material cost, and the size.

【0146】更に半導体発光素子の電極層が、導電性の
ろう材又は樹脂接着剤を用いて絶縁基板又はリードフレ
ーム等の基体に接続される場合は、電極層を形成する材
料と基体の電極部分とが同じ材料で形成されているので
両者のなじみはよい。
Further, when the electrode layer of the semiconductor light emitting element is connected to a base such as an insulating substrate or a lead frame using a conductive brazing material or resin adhesive, the material forming the electrode layer and the electrode portion of the base Since and are made of the same material, they are well compatible.

【0147】又は半導体発光素子の電極層が、異方導電
性樹脂接着剤を用いて絶縁基板又はリードフレーム等の
基体に接続される場合は、微小範囲での接続が可能であ
り、実装寸法の更なる小型化が可能になる。
Alternatively, when the electrode layer of the semiconductor light emitting element is connected to a base such as an insulating substrate or a lead frame by using an anisotropic conductive resin adhesive, connection in a minute range is possible and mounting dimensions are Further miniaturization becomes possible.

【0148】又、異方導電性樹脂接着剤は、半導体発光
素子と絶縁基板又はリードフレーム等の基体との固定と
PN接合露出部分の端面保護用の絶縁性接着剤を兼ねる
ので、従来必要であった仮固定の工程は不要になる。
Further, since the anisotropic conductive resin adhesive serves both as an insulating adhesive for fixing the semiconductor light emitting element to the insulating substrate or a base body such as a lead frame and for protecting the end face of the exposed PN junction, it has been conventionally required. There is no need for the temporary fixing process.

【0149】従って、小型で光の利用効率が良く高信頼
性の半導体発光素子を低価格で供給することが可能にな
る。
Therefore, it is possible to supply a semiconductor light emitting element which is small in size, has high light utilization efficiency, and is highly reliable, at a low price.

【0150】(5)半導体発光素子の外形寸法は、50
0μm角以下の微小寸法で形成可能であるので、これを
用いた高解像度表示装置の構築が可能になる。
(5) The external dimensions of the semiconductor light emitting device are 50
Since it can be formed with a minute dimension of 0 μm square or less, a high-resolution display device using this can be constructed.

【0151】従って、ブラウン管や液晶ディスプレイ等
と同等の性能を有し、更に薄型、高精細で、低価格の表
示装置等を得ることが可能になる。
Therefore, it is possible to obtain a display device having a performance equivalent to that of a cathode ray tube, a liquid crystal display, etc., and being thin, high-definition, and low-priced.

【0152】(6)異方導電性樹脂接着剤中に含まれる
導電性成分の最大径は、半導体層のPN接合面に垂直な
端面のうち少なくとも一端面上に露出するPN接合部及
びその近傍と、周囲の垂直な端面との段差よりも小さく
なるように設計されているので、半導体発光素子と絶縁
基板又はリードフレーム等の基体との接続部以外に回り
込んだ異方導電性樹脂接着剤が、PN接合部及びその近
傍に付着しても、PN接合が露出する端面での短絡や漏
洩電流の発生等による半導体発光素子の異常駆動は起こ
らない。
(6) The maximum diameter of the conductive component contained in the anisotropic conductive resin adhesive is such that the PN junction exposed on at least one of the end faces of the semiconductor layer perpendicular to the PN junction face and the vicinity thereof. Since it is designed to be smaller than the step between the peripheral vertical end face, the anisotropic conductive resin adhesive that wraps around other than the connection portion between the semiconductor light emitting element and the base such as the insulating substrate or the lead frame. However, even if it adheres to the PN junction and its vicinity, abnormal driving of the semiconductor light emitting element due to a short circuit, a leakage current, or the like at the end face where the PN junction is exposed does not occur.

【0153】従って、更に高信頼性の半導体発光素子を
供給することが可能になる。
Therefore, it is possible to supply a semiconductor light emitting device with higher reliability.

【0154】(7)半導体発光素子の製造方法において
は、半導体層に少なくともPN接合面に達する溝部分を
形成する工程と、半導体層の両面に電極層を形成する工
程と、半導体層及び両電極層を溝部分に沿って切断し、
分離する工程とを有しているので、半導体発光素子の端
面上に露出するPN接合部及びその近傍の形状を簡単に
加工,形成することができ、更に、厚みの比較的厚い電
極層を上面及び底面同時に形成できるので、反りが発生
しにくい。
(7) In the method for manufacturing a semiconductor light emitting device, the step of forming a groove portion at least reaching the PN junction surface in the semiconductor layer, the step of forming electrode layers on both sides of the semiconductor layer, the semiconductor layer and both electrodes Cut the layer along the groove,
Since it has a step of separating, the PN junction portion exposed on the end face of the semiconductor light emitting element and the shape in the vicinity thereof can be easily processed and formed, and further, an electrode layer having a relatively thick thickness is formed on the upper surface. Since it can be formed at the same time as the bottom surface, warpage is unlikely to occur.

【0155】或いは半導体発光素子の製造方法において
は、半導体層に少なくともPN接合面に達する溝部分を
形成する工程と、溝部分を絶縁性物質により被覆する工
程と、半導体層の両面に電極層を形成する工程と、半導
体層及び両電極層を被覆された溝部分に沿って切断し、
分離する工程とを有している場合は、上記作用の他に、
PN接合部及びその近傍の保護が簡単に行える。
Alternatively, in the method for manufacturing a semiconductor light emitting device, a step of forming a groove portion at least reaching the PN junction surface in the semiconductor layer, a step of covering the groove portion with an insulating material, and electrode layers on both sides of the semiconductor layer are provided. Forming step, cutting the semiconductor layer and both electrode layers along the covered groove portion,
In the case of having a step of separating, in addition to the above action,
The PN junction and its vicinity can be easily protected.

【0156】従って、製造工程における作業性が向上
し、工程の簡略化が達成され、更に製品の歩留まり及び
信頼性が向上する。
Therefore, the workability in the manufacturing process is improved, the process is simplified, and the yield and reliability of products are improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明を適用した第1の実施例による半導体発
光素子の斜視図。
FIG. 1 is a perspective view of a semiconductor light emitting device according to a first embodiment of the present invention.

【図2】(a)は、図1におけるA‐A′部分での断面
図、(b)は上面図、(c)は底面図。
2A is a sectional view taken along the line AA ′ in FIG. 1, FIG. 2B is a top view, and FIG. 2C is a bottom view.

【図3】(a)及び(b)は、異方導電性樹脂接着剤の
働きを説明するための半導体発光素子の断面図。
3A and 3B are cross-sectional views of a semiconductor light emitting device for explaining the function of an anisotropic conductive resin adhesive.

【図4】(a)乃至(f)は、本発明を適用した第1の
実施例による半導体発光素子の製造方法を示す手順図。
4A to 4F are procedure diagrams showing a method for manufacturing a semiconductor light emitting device according to the first embodiment of the present invention.

【図5】(a)及び(b)は、工程中に異方導電性樹脂
接着剤を用いる理由を説明するための半導体発光素子の
断面図。
5A and 5B are cross-sectional views of a semiconductor light emitting device for explaining the reason why an anisotropic conductive resin adhesive is used during a process.

【図6】本発明を適用した第1の実施例による半導体発
光素子の実装方法を示す半導体発光素子の断面図。
FIG. 6 is a sectional view of a semiconductor light emitting device showing a method for mounting the semiconductor light emitting device according to the first embodiment of the present invention.

【図7】本発明を適用した他の実施例による半導体発光
素子の斜視図。
FIG. 7 is a perspective view of a semiconductor light emitting device according to another embodiment of the present invention.

【図8】(a)は、図7におけるB‐B′部分での断面
図、(b)は上面図、(c)は底面図。
8A is a sectional view taken along the line BB ′ in FIG. 7, FIG. 8B is a top view, and FIG. 8C is a bottom view.

【図9】(a)乃至(i)は、本発明を適用した他の実
施例による半導体発光素子の製造方法を示す手順図。
9A to 9I are procedural diagrams showing a method for manufacturing a semiconductor light emitting device according to another embodiment of the present invention.

【図10】(a)乃至(c)は、本発明を適用した他の
実施例による半導体発光素子の実装方法を示す半導体発
光素子の断面図。
10A to 10C are cross-sectional views of a semiconductor light emitting device showing a method for mounting a semiconductor light emitting device according to another embodiment of the present invention.

【図11】従来例による半導体発光素子の斜視図。FIG. 11 is a perspective view of a conventional semiconductor light emitting device.

【図12】(a)は、図11におけるC‐C′部分での
断面図、(b)は上面図、(c)は底面図。
12A is a sectional view taken along the line CC ′ in FIG. 11, FIG. 12B is a top view, and FIG. 12C is a bottom view.

【図13】従来例による半導体発光素子の実装方法を示
す半導体発光素子の断面図。
FIG. 13 is a sectional view of a semiconductor light emitting device showing a method for mounting a semiconductor light emitting device according to a conventional example.

【図14】(a)及び(b)は、従来例によるチップ部
品形状の半導体発光素子の構造を示す断面図。
14A and 14B are cross-sectional views showing a structure of a semiconductor light emitting element in the form of a chip component according to a conventional example.

【図15】他の従来例による半導体発光素子の斜視図。FIG. 15 is a perspective view of a semiconductor light emitting device according to another conventional example.

【図16】(a)は、図15におけるD‐D′部分での
断面図、(b)は上面図、(c)は底面図。
16A is a sectional view taken along line DD ′ in FIG. 15, FIG. 16B is a top view, and FIG. 16C is a bottom view.

【図17】(a)及び(b)は、他の従来例による半導
体発光素子の実装方法を示す半導体発光素子の断面図。
17A and 17B are cross-sectional views of a semiconductor light emitting device showing a mounting method of a semiconductor light emitting device according to another conventional example.

【符号の説明】[Explanation of symbols]

1,23 半導体発光素子 2,3 (N型又はP型の)半導体層 4 PN接合面 5,6 金属薄膜 7,8 金属箔 9,9′,9″,10 異方導電性樹脂接着剤 11,11′,12,12′ (N又はP)電極層 13 PN接合部及びその近傍 14,14′,14″ 導電性物質 18 溝部 19,19′,19″ 導電性のろう材又は樹脂接着剤 20,21 絶縁性基板又はリードフレーム等の基体の
電極部分 22 絶縁性物質
1, 23 Semiconductor light emitting element 2, 3 (N-type or P-type) semiconductor layer 4 PN junction surface 5, 6 Metal thin film 7, 8 Metal foil 9, 9 ', 9 ", 10 Anisotropic conductive resin adhesive 11 , 11 ', 12, 12' (N or P) electrode layer 13 PN junction part and its vicinity 14, 14 ', 14 "conductive material 18 groove part 19, 19', 19" conductive brazing material or resin adhesive 20, 21 Insulating substrate or electrode portion of a base such as lead frame 22 Insulating material

Claims (16)

【特許請求の範囲】[Claims] 【請求項1】 PN接合を有する半導体層が積層形成さ
れ、該半導体層を挟んで電極層が形成されてなる半導体
発光素子において、 前記半導体層のPN接合面に垂直な端面のうち少なくと
も一端面上に露出するPN接合部及びその近傍が、周囲
の前記垂直な端面よりも低い位置になるように形成され
ていることを特徴とする半導体発光素子。
1. A semiconductor light-emitting device comprising: stacked semiconductor layers having a PN junction; and electrode layers sandwiching the semiconductor layers, wherein at least one end face of the semiconductor layers is perpendicular to the PN junction face. 2. A semiconductor light emitting device, wherein the PN junction portion exposed above and its vicinity are formed at a position lower than the surrounding vertical end face.
【請求項2】 前記PN接合面に垂直な端面のうち少な
くとも一端面上に露出するPN接合部及びその近傍が、
凹状に形成されていることを特徴とする請求項1に記載
の半導体発光素子。
2. A PN junction part exposed on at least one end face of the end face perpendicular to the PN junction face and the vicinity thereof,
The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is formed in a concave shape.
【請求項3】 PN接合を有する半導体層が積層形成さ
れ、該半導体層を挟んで電極層が形成されてなる半導体
発光素子において、 前記半導体層のPN接合面に垂直な端面のうち少なくと
も一端面上に露出するPN接合部及びその近傍が、絶縁
性物質にて形成されていることを特徴とする半導体発光
素子。
3. A semiconductor light-emitting device comprising a semiconductor layer having a PN junction, which is laminated, and electrode layers sandwiching the semiconductor layer, wherein at least one end face of the semiconductor layer is perpendicular to the PN junction face. A semiconductor light emitting device characterized in that the PN junction portion exposed above and the vicinity thereof are formed of an insulating material.
【請求項4】 前記絶縁性物質により形成された端面
は、前記PN接合面に垂直な端面と同一面を有すること
を特徴とする請求項3に記載の半導体発光素子。
4. The semiconductor light emitting device according to claim 3, wherein an end surface formed of the insulating material has the same surface as an end surface perpendicular to the PN junction surface.
【請求項5】 前記絶縁性物質は、前記半導体発光素子
の出射光に対して透明で、且つエポキシ系樹脂やフェノ
ール系樹脂等の有機材料及びSiO2やAl23 等の無機
材料の中から選ばれた物質であることを特徴とする請求
項3又は4に記載の半導体発光素子。
5. The insulating material is transparent to the emitted light of the semiconductor light emitting element and is an organic material such as an epoxy resin or a phenol resin or an inorganic material such as SiO 2 or Al 2 O 3. The semiconductor light emitting device according to claim 3, wherein the semiconductor light emitting device is a substance selected from the group consisting of:
【請求項6】 前記半導体層は、III‐V族化合物半導
体、II‐VI族化合物半導体、SiC 等の半導体材料の中
から選ばれた物質であることを特徴とする請求項1又は
3に記載の半導体発光素子。
6. The semiconductor layer according to claim 1 or 3, wherein the semiconductor layer is a substance selected from semiconductor materials such as III-V group compound semiconductors, II-VI group compound semiconductors, and SiC. Semiconductor light emitting device.
【請求項7】 前記電極層は、金属薄膜と、導電性のろ
う材又は樹脂接着剤との組合せにより形成されることを
特徴とする請求項3に記載の半導体発光素子。
7. The semiconductor light emitting device according to claim 3, wherein the electrode layer is formed of a combination of a metal thin film and a conductive brazing material or a resin adhesive.
【請求項8】 前記電極層は、金属薄膜と、異方導電性
樹脂接着剤及び金属箔との組合せにより形成されること
を特徴とする請求項1又は3に記載の半導体発光素子。
8. The semiconductor light emitting device according to claim 1, wherein the electrode layer is formed by a combination of a metal thin film, an anisotropic conductive resin adhesive and a metal foil.
【請求項9】 前記電極層の膜厚は、20乃至150μ
mの間にあることを特徴とする請求項1,3,7,8に
記載の半導体発光素子。
9. The electrode layer has a thickness of 20 to 150 μm.
9. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is between m.
【請求項10】 前記半導体発光素子の電極層は、絶縁
基板又はリードフレーム等の基体に対して垂直方向にな
るようにして配置されることを特徴とする請求項1乃至
9に記載の半導体発光素子。
10. The semiconductor light emitting device according to claim 1, wherein the electrode layer of the semiconductor light emitting device is arranged so as to be perpendicular to a substrate such as an insulating substrate or a lead frame. element.
【請求項11】 前記半導体発光素子の電極層は、導電
性のろう材又は樹脂接着剤を用いて前記絶縁基板又はリ
ードフレーム等の基体に接続されることを特徴とする請
求項3乃至10に記載の半導体発光素子。
11. The semiconductor light emitting device according to claim 3, wherein the electrode layer of the semiconductor light emitting device is connected to the base such as the insulating substrate or the lead frame by using a conductive brazing material or a resin adhesive. The semiconductor light-emitting device as described above.
【請求項12】 前記半導体発光素子の電極層は、異方
導電性樹脂接着剤を用いて前記絶縁基板又はリードフレ
ーム等の基体に接続されることを特徴とする請求項1乃
至10に記載の半導体発光素子。
12. The electrode layer of the semiconductor light emitting device is connected to a base such as the insulating substrate or a lead frame by using an anisotropic conductive resin adhesive. Semiconductor light emitting device.
【請求項13】 前記半導体発光素子の外形寸法は、5
00μm角以下であることを特徴とする請求項1乃至1
2に記載の半導体発光素子。
13. The semiconductor light emitting device has an outer dimension of 5
2. The size is less than 00 .mu.m square.
2. The semiconductor light emitting device according to item 2.
【請求項14】 前記異方導電性樹脂接着剤中に含まれ
る導電性成分の最大径は、前記半導体層のPN接合面に
垂直な端面のうち少なくとも一端面上に露出するPN接
合部及びその近傍と、周囲の前記垂直な端面との段差よ
りも小さいことを特徴とする請求項8,12に記載の半
導体発光素子
14. The maximum diameter of a conductive component contained in the anisotropic conductive resin adhesive is a PN junction portion exposed on at least one end face of an end face perpendicular to the PN junction face of the semiconductor layer, and a portion thereof. 13. The semiconductor light emitting device according to claim 8, which is smaller than a step between the vicinity and the vertical end face around the periphery.
【請求項15】 PN接合を有する半導体層が積層形成
され、該半導体層を挟んで電極層が形成されてなる半導
体発光素子の製造方法において、 前記半導体層に、少なくともPN接合面に達する溝部分
を形成する工程と、 前記半導体層の両面に電極層を形成する工程と、 前記半導体層及び両電極層を前記溝部分に沿って切断
し、分離する工程と、を有することを特徴とする半導体
発光素子の製造方法。
15. A method for manufacturing a semiconductor light-emitting device, comprising: forming semiconductor layers having a PN junction in a stacked manner, and forming electrode layers with the semiconductor layers sandwiched therebetween, wherein a groove portion reaching at least a PN junction surface in the semiconductor layer. And a step of forming electrode layers on both surfaces of the semiconductor layer, and a step of cutting and separating the semiconductor layer and both electrode layers along the groove portion. Method for manufacturing light emitting device.
【請求項16】 PN接合を有する半導体層が積層形成
され、該半導体層を挟んで電極層が形成されてなる半導
体発光素子の製造方法において、 前記半導体層に、少なくともPN接合面に達する溝部分
を形成する工程と、 前記溝部分を絶縁性物質により被覆する工程と、 前記半導体層の両面に電極層を形成する工程と、 前記半導体層及び両電極層を前記被覆された溝部分に沿
って切断し、分離する工程と、を有することを特徴とす
る半導体発光素子の製造方法。
16. A method of manufacturing a semiconductor light-emitting device, comprising: forming semiconductor layers having a PN junction in a stacked manner, and forming electrode layers with the semiconductor layers sandwiched therebetween, wherein a groove portion reaching at least a PN junction surface is formed in the semiconductor layer. A step of forming, a step of covering the groove portion with an insulating material, a step of forming electrode layers on both surfaces of the semiconductor layer, and the semiconductor layer and both electrode layers along the covered groove portion. A step of cutting and separating the semiconductor light emitting element.
JP7066494A 1994-04-08 1994-04-08 Method for manufacturing semiconductor light emitting device Expired - Fee Related JP3299839B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7066494A JP3299839B2 (en) 1994-04-08 1994-04-08 Method for manufacturing semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7066494A JP3299839B2 (en) 1994-04-08 1994-04-08 Method for manufacturing semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPH07283439A true JPH07283439A (en) 1995-10-27
JP3299839B2 JP3299839B2 (en) 2002-07-08

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Country Status (1)

Country Link
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5670797A (en) * 1994-12-06 1997-09-23 Sharp Kabushiki Kaisha Compact light-emitting device with sealing member and light-transmitting resin seal
US6018167A (en) * 1996-12-27 2000-01-25 Sharp Kabushiki Kaisha Light-emitting device
US7126163B2 (en) 2001-02-26 2006-10-24 Sharp Kabushiki Kaisha Light-emitting diode and its manufacturing method
JP2009176805A (en) * 2008-01-22 2009-08-06 Tekcore Co Ltd Surface roughening method for light emitting diode substrate

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5670797A (en) * 1994-12-06 1997-09-23 Sharp Kabushiki Kaisha Compact light-emitting device with sealing member and light-transmitting resin seal
US5814837A (en) * 1994-12-06 1998-09-29 Sharp Kabushiki Kaisha Compact light-emitting device with sealing member
US5882949A (en) * 1994-12-06 1999-03-16 Sharp Kabushiki Kaisha Method of making compact light-emitting device with sealing member
US6018167A (en) * 1996-12-27 2000-01-25 Sharp Kabushiki Kaisha Light-emitting device
US7126163B2 (en) 2001-02-26 2006-10-24 Sharp Kabushiki Kaisha Light-emitting diode and its manufacturing method
JP2009176805A (en) * 2008-01-22 2009-08-06 Tekcore Co Ltd Surface roughening method for light emitting diode substrate

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