JP3299839B2 - Method for manufacturing semiconductor light emitting device - Google Patents

Method for manufacturing semiconductor light emitting device

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Publication number
JP3299839B2
JP3299839B2 JP7066494A JP7066494A JP3299839B2 JP 3299839 B2 JP3299839 B2 JP 3299839B2 JP 7066494 A JP7066494 A JP 7066494A JP 7066494 A JP7066494 A JP 7066494A JP 3299839 B2 JP3299839 B2 JP 3299839B2
Authority
JP
Japan
Prior art keywords
light emitting
semiconductor light
emitting device
resin adhesive
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP7066494A
Other languages
Japanese (ja)
Other versions
JPH07283439A (en
Inventor
芳紀 桂
章 上本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
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Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP7066494A priority Critical patent/JP3299839B2/en
Publication of JPH07283439A publication Critical patent/JPH07283439A/en
Application granted granted Critical
Publication of JP3299839B2 publication Critical patent/JP3299839B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Led Devices (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Led Device Packages (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、超小型で高機能の半導
体発光素子及びその製造方法に関し、更に詳しくは、ブ
ラウン管や液晶ディスプレイ等と同等の性能を有し、更
に薄型、高精細で、低価格の表示装置等に採択し得る半
導体発光素子の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultra-small, high-performance semiconductor light emitting device and a method of manufacturing the same, and more particularly, to a thinner, higher-definition device having the same performance as a cathode ray tube or a liquid crystal display. the method for manufacturing a semiconductor light emitting element that can adopt a low-cost display device.

【0002】[0002]

【従来の技術】従来の半導体発光素子101の構造は図
11及び12に示すように、GaP やGaAs等よりなる
N型の半導体層102上に、同じくGaP やGaAs等よ
りなるP型の半導体層103を積層形成した後、PN接
合面104に平行な両端面上にAg やAu 等よりなる金
属薄膜を順次積層してP電極層111とN電極層112
が形成されている。
2. Description of the Related Art As shown in FIGS. 11 and 12, a conventional semiconductor light emitting device 101 has a structure in which a P-type semiconductor layer made of GaP or GaAs is formed on an N-type semiconductor layer 102 made of GaP or GaAs. After laminating 103, a metal thin film made of Ag, Au, or the like is sequentially laminated on both end surfaces parallel to the PN junction surface 104 to form a P electrode layer 111 and an N electrode layer 112.
Are formed.

【0003】上記半導体発光素子を用いて表示装置等を
形成する場合の実装方法は図13に示すように、まず絶
縁基板又はリードフレーム等に設けられた第一の電極部
分120と半導体発光素子101のN電極層112と
を、例えばインジウム等の金属系からなる導電性のろう
材又はAg ‐エポキシ樹脂等の導電性樹脂接着剤119
で電気的導通状態で接続した後、半導体発光素子101
のP電極層111と絶縁基板又はリードフレーム等に設
けられた第二の電極部分121とを、例えばAu細線等
の金属ワイヤー125で電気的に接続する。
As shown in FIG. 13, a mounting method for forming a display device or the like using the above semiconductor light emitting device is as follows. First, a first electrode portion 120 provided on an insulating substrate or a lead frame and a semiconductor light emitting device 101 are provided. The N electrode layer 112 is made of a conductive brazing material made of a metal such as indium or a conductive resin adhesive 119 such as an Ag-epoxy resin.
The semiconductor light emitting device 101
The P electrode layer 111 is electrically connected to a second electrode portion 121 provided on an insulating substrate or a lead frame by a metal wire 125 such as a fine Au wire.

【0004】或いは、上記半導体発光素子を個々のチッ
プ部品として形成し、このチップ部品を絶縁基板上に搭
載して表示装置等を形成する場合の構造は図14に示す
ように、半導体発光素子101を金属リードフレーム1
26又は回路配線を有する絶縁基板128上に搭載した
後、透光性の樹脂127,129で封止して形成する。
Alternatively, when the semiconductor light emitting device is formed as individual chip components, and the chip components are mounted on an insulating substrate to form a display device or the like, the structure of the semiconductor light emitting device 101 is as shown in FIG. Metal lead frame 1
26, or after being mounted on an insulating substrate 128 having circuit wiring, it is sealed with a light-transmitting resin 127, 129 to form.

【0005】又、上記従来の技術以外にも形状及び実装
方法の異なる他の従来技術による半導体発光素子及びそ
の製造方法が考案されている。
[0005] In addition to the above-mentioned conventional techniques, other conventional semiconductor light-emitting devices having different shapes and mounting methods and methods of manufacturing the same have been devised.

【0006】他の従来技術による半導体発光素子130
の構造は図15及び16に示すように、GaP やGaAs
等よりなるN型の半導体層102上に、同じくGaP や
GaAs 等よりなるP型の半導体層103を積層形成し
た後、PN接合面104に平行な両端面の全面にAg や
Au 等よりなる金属薄膜を順次積層してP電極層11
1′とN電極層112′が形成されている。
Another conventional semiconductor light emitting device 130
The structure of GaP or GaAs is shown in FIGS.
After a P-type semiconductor layer 103 also made of GaP or GaAs is formed on the N-type semiconductor layer 102 made of, for example, a metal such as Ag or Au over the entire end faces parallel to the PN junction surface 104. The P electrode layer 11 is formed by sequentially laminating thin films.
1 'and an N electrode layer 112' are formed.

【0007】上記他の従来技術による半導体発光素子を
用いて表示装置等を形成する場合の実装方法は図17に
示すように、まず、半導体発光素子130の導電接着の
際の位置ずれを防ぐ目的で、予め絶縁基板又はリードフ
レーム等の電極部分120,121の間に絶縁性接着剤
124を塗布する。この絶縁性接着剤は半導体発光素子
搭載面側のPN接合露出部分の保護に使用される場合も
ある。
As shown in FIG. 17, a mounting method for forming a display device or the like using a semiconductor light emitting device according to the above-mentioned other prior art is to firstly prevent a displacement of the semiconductor light emitting device 130 during conductive bonding. Then, an insulating adhesive 124 is applied between the electrode portions 120 and 121 such as an insulating substrate or a lead frame in advance. This insulating adhesive may be used to protect the exposed portion of the PN junction on the semiconductor light emitting element mounting surface side.

【0008】次に、絶縁基板又はリードフレーム等の電
極部分120,121上に、例えばインジウム等の金属
系からなる導電性のろう材又はAg ‐エポキシ樹脂の導
電性樹脂接着剤119等を予め塗布し、半導体発光素子
130のP・N両電極層111′,112′を各々絶縁
基板又はリードフレーム等の電極部分120,121上
に設置後、導電性のろう材又は樹脂接着剤119を所定
の硬化条件で硬化形成する。
Next, a conductive brazing material made of a metal such as indium or a conductive resin adhesive 119 of Ag-epoxy resin is applied on the electrode portions 120 and 121 such as an insulating substrate or a lead frame in advance. After the P and N electrode layers 111 'and 112' of the semiconductor light emitting device 130 are respectively placed on the electrode portions 120 and 121 such as an insulating substrate or a lead frame, a conductive brazing material or a resin adhesive 119 is applied to a predetermined position. Cured and formed under curing conditions.

【0009】尚、図17(a)は絶縁基板又はリードフ
レーム等の電極部分の間隔x3 を半導体発光素子のP・
N両電極層の間隔よりも狭く取った場合の実装方法を示
し、(b)は、この間隔x4 を半導体発光素子のP・N
両電極層の間隔よりも広く取った場合の実装方法を示し
ている。
[0009] Incidentally, FIG. 17 (a) P · of the semiconductor light emitting device a distance x 3 electrode portions such as an insulating substrate or a lead frame
Shows how to implement when taken smaller than the distance N the electrode layers, (b) is, P · N of the semiconductor light emitting element of this distance x 4
This shows a mounting method in the case where the distance between the two electrode layers is larger than the distance between the two electrode layers.

【0010】[0010]

【発明が解決しようとする課題】上記従来の半導体発光
素子おいては、下記に示すような問題点があった。
The above-mentioned conventional semiconductor light emitting device has the following problems.

【0011】(1)図11及び12に示すような半導体
発光素子は、P電極方向への放射光を主に利用するよう
に構成されている。従って、放射光の出る面に形成され
ているP電極に遮られて、放射光量が減少するので光の
利用効率が悪いという問題点があった。
(1) A semiconductor light emitting device as shown in FIGS. 11 and 12 is configured to mainly use radiation emitted in the direction of the P electrode. Therefore, there is a problem that the light use efficiency is poor because the amount of radiated light is reduced by being blocked by the P electrode formed on the surface from which the radiated light is emitted.

【0012】(2)上記図11及び12の半導体発光素
子を実装する際は、図13に示すようなAu ワイヤー等
による基板電極部との接続が不可欠である。しかし、表
示装置等に利用する場合、多数の半導体発光素子を搭載
する必要があり、一方では装置の処理能力(速度,精度
など)に限界があり、莫大な設備投資と歩留まり低下、
Au ワイヤー等の材料費の増加を招く等の問題点があっ
た。
(2) When mounting the semiconductor light emitting device shown in FIGS. 11 and 12, it is essential to connect it to the substrate electrode portion by using Au wires or the like as shown in FIG. However, when it is used for a display device or the like, it is necessary to mount a large number of semiconductor light emitting elements.
There were problems such as an increase in the cost of materials such as Au wires.

【0013】(3)図14に示すような半導体発光素子
では、上記(1)及び(2)の問題点の他に個々の半導
体発光素子の寸法が大きくなり、表示装置に最低限必要
なブラウン管等の画素と同等の、少なくとも500μm
角以下の寸法にするのは困難である。又、個々のチップ
部品形状の半導体発光素子は価格的にも非常に高価な物
になるという問題点があった。
(3) In the semiconductor light emitting device as shown in FIG. 14, in addition to the above-mentioned problems (1) and (2), the size of each semiconductor light emitting device becomes large, and the minimum required cathode ray tube for a display device. At least 500 μm, equivalent to pixels such as
It is difficult to make the dimensions smaller than a corner. In addition, there is a problem that the semiconductor light emitting element in the form of individual chip parts is very expensive in terms of price.

【0014】(4)図15及び16に示すような半導体
発光素子は、PN接合が露出する端面側からの光放射を
利用するために、基板等への実装時には基板等に対して
電極層が垂直方向で接するように搭載する工程が必要と
なる。この工程中では、PN接合が露出する端面が搭載
用の装置や基板等と物理的に接触するため、PN接合が
露出する端面に傷や欠損等が発生し易く、PN接合が露
出する端面の破損や短絡不良の要因となるという問題点
があった。
(4) Since the semiconductor light emitting device as shown in FIGS. 15 and 16 utilizes light emission from the end face where the PN junction is exposed, an electrode layer is formed on the substrate or the like when mounted on the substrate or the like. A step of mounting so as to be in contact in the vertical direction is required. During this step, the end face where the PN junction is exposed is in physical contact with the mounting device, the substrate, or the like. There is a problem that it causes damage and short-circuit failure.

【0015】(5)図15及び16の半導体発光素子を
基板等に実装するには、図17に示すようにP電極・N
電極共に導電性のろう材又は樹脂接着剤による接続が必
要であるが、このP電極表面とPN接合面とは僅か数乃
至数十μmしか離れておらず、上記導電性のろう材又は
樹脂接着剤が基板等と半導体発光素子との間に回り込む
ことにより、PN接合が露出する端面での導電性のろう
材又は樹脂接着剤による短絡及び漏洩電流等が発生し、
このため半導体発光素子が正常に駆動しなくなるという
問題点があった。
(5) To mount the semiconductor light emitting device of FIGS. 15 and 16 on a substrate or the like, as shown in FIG.
The electrodes need to be connected with a conductive brazing material or a resin adhesive, but the surface of the P electrode and the PN junction surface are separated only by a few to several tens of μm. When the agent goes around between the substrate and the semiconductor light emitting element, a short circuit and a leakage current due to the conductive brazing material or the resin adhesive at the end face where the PN junction is exposed occur,
Therefore, there is a problem that the semiconductor light emitting element does not operate normally.

【0016】又、半導体発光素子は予め実装位置に絶縁
性接着剤等で仮固定しなければならず、工程の複雑化や
コストアップの要因となるという問題点があった。
In addition, the semiconductor light emitting element must be temporarily fixed in advance to the mounting position with an insulating adhesive or the like, which causes a problem that the process becomes complicated and the cost increases.

【0017】又、上記固定用の絶縁性接着剤をPN接合
露出部分の保護に用いる場合は、塗布量のコントロール
が難しく、基板等の上に形成された電極面に付着して半
導体発光素子の電極層との接続が困難になるという問題
点があった。
In the case where the above-mentioned insulating adhesive for fixing is used for protecting the exposed portion of the PN junction, it is difficult to control the amount of application, and the adhesive adheres to the electrode surface formed on the substrate or the like, and the semiconductor light-emitting element is There is a problem that connection with the electrode layer becomes difficult.

【0018】又、半導体発光素子の電極層の金属薄膜と
導電性のろう材又は樹脂接着剤とのなじみが悪いため、
接続不良を起こすという問題点があった。
In addition, since the compatibility between the metal thin film of the electrode layer of the semiconductor light emitting element and the conductive brazing material or resin adhesive is poor,
There is a problem that a connection failure occurs.

【0019】更に、PN接合面と電極層との距離をとる
ため、或いは基板上の電極との接続や位置合せを確実な
ものにするためには、電極層を100μm以上に厚く形
成する必要があるが、この場合、電極層の厚さが厚くな
ればなる程、電極層と半導体層個々の膨張係数の差に基
づく層間応力が増大して結果的に半導体層の応力破壊や
電極層の剥離等を引き起こすという問題点があった。
Further, in order to increase the distance between the PN junction surface and the electrode layer, or to ensure connection and alignment with the electrode on the substrate, it is necessary to form the electrode layer as thick as 100 μm or more. However, in this case, as the thickness of the electrode layer increases, the interlayer stress based on the difference between the expansion coefficients of the electrode layer and the semiconductor layer increases, resulting in stress destruction of the semiconductor layer and peeling of the electrode layer. And so on.

【0020】又、逆に電極層を20μm以下に薄く形成
すると、電極との接続が充分に行えず、導通が取れなく
なるという問題点もあった。
On the other hand, if the electrode layer is formed as thin as 20 μm or less, there is also a problem that the connection with the electrode cannot be made sufficiently and the conduction cannot be obtained.

【0021】[0021]

【課題を解決するための手段】本発明は、上記問題点に
鑑みなされたもので、半導体発光素子の製造方法におい
て、PN接合を有する半導体層上及び/又は下に、金属
薄膜を形成する工程と、該金属薄膜に異方導電性樹脂接
着剤を介して金属箔を配置して、加圧硬化する工程と、
を備えてなると共に、前記異方導電性樹脂接着剤を形成
する、金属薄膜で被覆された半導体層には予め、PN接
合に達する溝部が形成されてなることを特徴とする。
記溝部の略中央に沿ってチップ状に分割することによ
り、凹状窪みを持つ半導体発光素子を形成することを特
徴とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and is directed to a method of manufacturing a semiconductor light emitting device.
Forming a metal thin film on and / or below the semiconductor layer having a PN junction; disposing a metal foil on the metal thin film via an anisotropic conductive resin adhesive; ,
And a groove portion reaching the PN junction is formed in advance in the semiconductor layer covered with the metal thin film forming the anisotropic conductive resin adhesive. Previous
By dividing into chips along the approximate center of the groove
And forming a semiconductor light emitting device having a concave depression.
Sign.

【0022】[0022]

【0023】[0023]

【0024】[0024]

【0025】[0025]

【0026】[0026]

【0027】[0027]

【0028】[0028]

【0029】[0029]

【0030】[0030]

【0031】[0031]

【0032】[0032]

【0033】[0033]

【0034】[0034]

【0035】[0035]

【0036】[0036]

【作用】本発明によれば金属薄膜に異方導電性樹脂接
着剤を介して金属箔を配置して、加圧硬化する工程で
PN接合部分は溝部によって、短絡や漏洩電流の発生を
防ぐことが可能となる。
According to the present invention , an anisotropic conductive resin contacting a metal thin film is provided .
In the step of arranging the metal foil via the adhesive and curing under pressure ,
The PN junction portion is the groove, that Do is possible to prevent the occurrence of short circuit and leakage current.

【0037】[0037]

【0038】[0038]

【0039】[0039]

【0040】[0040]

【0041】[0041]

【0042】[0042]

【0043】[0043]

【0044】[0044]

【0045】[0045]

【0046】[0046]

【0047】[0047]

【0048】[0048]

【0049】[0049]

【0050】[0050]

【0051】[0051]

【0052】[0052]

【実施例】本発明の実施例を図面を参照して説明する。An embodiment of the present invention will be described with reference to the drawings.

【0053】尚、本発明ではPN接合面がP型電極層側
に近接した構造で説明しているが、逆にN型電極層側に
近接した構造であってもよい。
Although the present invention has been described with a structure in which the PN junction surface is close to the P-type electrode layer side, the structure may be conversely close to the N-type electrode layer side.

【0054】又、本発明の半導体発光素子は、量産性を
考慮して実際は大きな一枚のウエハー状態で形成された
後、分割して個々の半導体発光素子にチップ化される。
The semiconductor light emitting device of the present invention is actually formed in a single large wafer in consideration of mass productivity, and then divided into individual semiconductor light emitting devices.

【0055】個々の半導体発光素子は、表示装置に用い
る場合にはブラウン管等の画素と同等の外形寸法にする
必要が在り、少なくとも500μm角以下の寸法で形成
可能な様に各種条件設定を行っている。
When each semiconductor light emitting element is used for a display device, it is necessary to have the same external dimensions as a pixel such as a cathode ray tube, and various conditions are set so that the individual semiconductor light emitting elements can be formed with dimensions of at least 500 μm square or less. I have.

【0056】図1は本発明の実施例において形成された
半導体発光素子の斜視図であり、図2(a)は図1にお
けるA‐A′部分の断面図、(b)は上面図、(c)は
底面図である。
[0056] Figure 1 is a perspective view of a semiconductor light emitting device formed in a real施例of the present invention, FIG. 2 (a) is sectional view of the A-A 'portion in FIG. 1, (b) is a top view, (C) is a bottom view.

【0057】本実施例の半導体発光素子1の構造は、II
I‐V族化合物半導体,II‐VI族化合物半導体或いはSi
C 等の半導体材料よりなるN型の半導体層2上に、同
じくIII‐V族化合物半導体,II‐VI族化合物半導体或
いはSiC 等の半導体材料よりなるP型の半導体層3が
積層形成されている。
The structure of the semiconductor light emitting device 1 of this embodiment has the structure II
Group IV compound semiconductor, Group II-VI compound semiconductor or Si
On an N-type semiconductor layer 2 made of a semiconductor material such as C 2, a P-type semiconductor layer 3 also made of a semiconductor material such as a III-V compound semiconductor, a II-VI compound semiconductor, or SiC is laminated. .

【0058】次に、PN接合面4に平行な両端面の全面
上に例えばAgやAu等よりなる金属薄膜5,6と、例え
ばAu ,Ag ,Mo 等からなる金属箔7,8が異方導電
性樹脂接着剤9,10を介して順次積層されてP電極層
11とN電極層12が形成されている。金属箔5,6の
膜厚は後工程での実装状態等を考慮して、少なくとも2
0μm以上、望ましくは30乃至150μmの間に設定さ
れている。
Next, metal thin films 5, 6 made of, for example, Ag or Au and metal foils 7, 8 made of, for example, Au, Ag, Mo, etc. are anisotropically formed on the entire end faces parallel to the PN junction surface 4. The P electrode layer 11 and the N electrode layer 12 are sequentially laminated with the conductive resin adhesives 9 and 10 interposed therebetween. The film thickness of the metal foils 5 and 6 should be at least 2 in consideration of the mounting state in a later process.
The thickness is set to 0 μm or more, preferably 30 to 150 μm.

【0059】PN接合部及びその近傍13は、その周囲
の面よりも低い位置になるように凹状に形成されてい
る。この時のPN接合部及びその近傍13とその周囲の
面との段差は後工程での実装状態等を考慮して、異方導
電性樹脂接着剤9,10中に含まれる金属粉等の導電性
物質14の最大径を例えば5μmとすると、少なくとも
5μmより大きくなるように形成する必要がある。
The PN junction and its vicinity 13 are formed in a concave shape so as to be lower than the surrounding surface. At this time, the level difference between the PN junction and its vicinity 13 and the surface around the PN junction takes into consideration the mounting state and the like in a later step, and the conductivity of the metal powder and the like contained in the anisotropic conductive resin adhesives 9 and 10 is considered. If the maximum diameter of the conductive material 14 is, for example, 5 μm, it is necessary to form the conductive material 14 so as to be at least larger than 5 μm.

【0060】ここで、本発明にも使用されている異方導
電性樹脂接着剤について以下に補足説明する。
Here, the anisotropic conductive resin adhesive used in the present invention will be additionally described below.

【0061】図3(a)は説明のために半導体発光素子
の電極層上に異方導電性樹脂接着剤を塗布し、更に金属
箔をそのうえに乗せた後、無負荷で硬化させた状態を示
す断面図、(b)は負荷をかけて硬化させた状態を示す
断面図である。
FIG. 3 (a) shows a state in which an anisotropic conductive resin adhesive is applied on the electrode layer of the semiconductor light emitting element for the purpose of explanation, a metal foil is further placed thereon, and then cured without load. FIG. 3B is a cross-sectional view showing a state where the resin is cured by applying a load.

【0062】異方導電性樹脂接着剤9′は、熱可塑性樹
脂,熱硬化性樹脂或いはこれら両方の混合物のいずれか
の樹脂15の中に、金属粉等の導電性物質14′(粒状
又は鱗片状,最大径:約数乃至10μm)を所定量混練
して接着性と導電性を併せ持たせた点はAg ‐エポキシ
樹脂等に代表される導電性樹脂接着剤と同じである。
The anisotropic conductive resin adhesive 9 ′ is made of a conductive material 14 ′ (granular or scale) in a resin 15 of either a thermoplastic resin, a thermosetting resin or a mixture of both. (A maximum diameter: about several μm to 10 μm) is kneaded in a predetermined amount to have both adhesiveness and conductivity, which is the same as a conductive resin adhesive represented by Ag-epoxy resin or the like.

【0063】これら一般の導電性樹脂接着剤の場合は、
導電性物質の混練率が約50乃至90wt%と高く、導電
性物質は樹脂中で互いに接触しあっており見かけ上導電
性樹脂接着剤またはその硬化物そのものが金属並の電導
度(約5乃至500×10-5Ω/cm)を有するように調
整されている。
In the case of these general conductive resin adhesives,
The kneading rate of the conductive substance is as high as about 50 to 90 wt%, and the conductive substances are in contact with each other in the resin. Apparently, the conductive resin adhesive or the cured product itself has a conductivity similar to that of metal (about 5 to 90%). 500 × 10 −5 Ω / cm).

【0064】これに対して異方導電性樹脂接着剤9′
は、導電性物質14′の混練率を数乃至数十wt%にする
ことにより、無負荷の状態で異方導電性樹脂接着剤9′
をそのまま硬化させた場合には導電性物質14′同士が
接触しあうことはほとんど無く樹脂15中に分散してい
るので絶縁性樹脂接着剤として振舞う。
On the other hand, anisotropic conductive resin adhesive 9 '
Is to set the kneading rate of the conductive substance 14 'to several to several tens wt% so that the anisotropic conductive resin adhesive 9'
When cured as it is, the conductive substances 14 'hardly come into contact with each other and are dispersed in the resin 15, so that they behave as an insulating resin adhesive.

【0065】ところが、電極面等の被接着面16,17
同士を互いに押し合うように荷重(図中矢印で示す)を
架けながら硬化させると、個々の導電性物質14′が直
接被接着面16,17間に挟まって導通状態を作り出す
という性質を有している。
However, the surfaces 16 and 17 to be bonded such as electrode surfaces
When hardened while applying a load (indicated by an arrow in the figure) so as to press each other, each conductive material 14 ′ has a property of being directly sandwiched between the surfaces 16 and 17 to be bonded to create a conductive state. ing.

【0066】但しこの場合でも、何らかの理由で被接着
面16,17間の隙間が導電性物質14′の最大径より
も大きいと(図中○で囲った部分のような場合)、この
ような導電性物質14′による被接着面16,17間の
導通状態は起こらない。
However, even in this case, if for some reason the gap between the surfaces 16 and 17 to be bonded is larger than the maximum diameter of the conductive material 14 '(in the case of the portion circled in the figure), such a case is obtained. A conductive state between the adhered surfaces 16 and 17 by the conductive material 14 'does not occur.

【0067】次に、本発明の実施例における半導体発光
素子の製造方法について詳細に説明する。
Next, will be described in detail a method of manufacturing a semiconductor light-emitting element in the real施例of the present invention.

【0068】図4(a)乃至(f)は本実施例を用いた
半導体発光素子の製造方法を示す手順図である。
FIGS. 4A to 4F are process diagrams showing a method for manufacturing a semiconductor light emitting device using this embodiment.

【0069】図4(a)に示すようにまずウエハー状態
の半導体発光素子1′の構造は、III‐V族化合物半導
体,II‐VI族化合物半導体或いはSiC 等の半導体材料
よりなるN型の半導体層2上に、同じくIII‐V族化合
物半導体,II‐VI族化合物半導体或いはSiC 等の半導
体材料よりなるP型の半導体層3を積層形成(層厚:約
200乃至300μm,PN接合面4はP型半導体層表
面より約数乃至数十μm)した後、PN接合面4に平行
な両端面の全面上に例えばAg やAu 等よりなる金属薄
膜5,6を積層形成(層厚:約3μm)する。
As shown in FIG. 4A, the structure of the semiconductor light emitting device 1 'in a wafer state is an N-type semiconductor made of a semiconductor material such as a III-V compound semiconductor, a II-VI compound semiconductor or SiC. A P-type semiconductor layer 3 made of a semiconductor material such as a III-V compound semiconductor, a II-VI compound semiconductor, or SiC is formed on the layer 2 (layer thickness: about 200 to 300 μm, and a PN junction surface 4 is formed). After about several to several tens of μm from the surface of the P-type semiconductor layer), metal thin films 5 and 6 made of, for example, Ag or Au are formed on the entire end faces parallel to the PN junction surface 4 (layer thickness: about 3 μm). ).

【0070】次に、ウエハー状態の半導体発光素子1′
のP型半導体層3側の表面より、PN接合面4を越えて
N型半導体層2に至るまでの深さに、例えばダイヤモン
ドブレード等を用いて複数の垂直に交差する2種類の平
行な溝部18を形成する。この時の溝部18の幅は約5
0乃至80μmであり、深さはP型半導体層3側の表面
より約50乃至150μm、又隣り合う溝部間のピッチ
は約200乃至500μmである。尚、これらの寸法は
最終に得られる個々の半導体発光素子の外形寸法や量産
性等を考慮して適宜設定することができる。
Next, the semiconductor light emitting device 1 'in a wafer state
A plurality of perpendicularly intersecting two types of parallel grooves using, for example, a diamond blade or the like, at a depth from the surface on the P-type semiconductor layer 3 side to the N-type semiconductor layer 2 beyond the PN junction surface 4. 18 are formed. The width of the groove 18 at this time is about 5
The depth is about 50 to 150 μm from the surface on the P-type semiconductor layer 3 side, and the pitch between adjacent grooves is about 200 to 500 μm. Note that these dimensions can be appropriately set in consideration of the external dimensions, mass productivity, and the like of each semiconductor light emitting element finally obtained.

【0071】これらの複数の垂直に交差する2種類の平
行な溝部18により、P型半導体層3側の表面は見かけ
上多数の四角柱が林立する形状を呈する。ここで、一方
の溝部のピッチと、これに垂直に交差する溝部とのピッ
チは必ずしも同一出なくてもよい。
The surface on the side of the P-type semiconductor layer 3 has an apparent shape in which a large number of square pillars stand by the two kinds of parallel grooves 18 which intersect perpendicularly. Here, the pitch of one groove portion and the pitch of the groove portion that intersects perpendicularly with the pitch need not necessarily be the same.

【0072】上記複数の垂直に交差する2種類の平行な
溝部18中の表面には、微細なクラックが多数発生して
おり、これらのクラックは半導体発光素子の性能に悪影
響を及ぼすことが経験的に知られている。
A large number of fine cracks are generated on the surface of the two types of parallel grooves 18 which intersect perpendicularly, and these cracks have an empirical effect on the performance of the semiconductor light emitting device. Is known to.

【0073】従って、図4(b)に示すように例えばH
2SO4:H22:H2O =3:1:1の組成のエッチン
グ液等で、溝部18中の表面に化学処理を施して、微細
なクラックの除去を行う。
Therefore, for example, as shown in FIG.
The surface in the groove 18 is subjected to a chemical treatment with an etching solution having a composition of 2 SO 4 : H 2 O 2 : H 2 O = 3: 1: 1 to remove fine cracks.

【0074】溝部18中の表面の化学処理を行った後の
ウエハー状態の半導体発光素子1′は、図4(c)に示
すように金属薄膜5,6各々の表面上に例えばハイソー
ル社製の「モーフィット TG‐9000R」やその類
似品で液状の透光性エポキシ樹脂に数乃至数十wt%の導
電性粗粒子(粒径:約10μm以下)を配合した樹脂材
料等の異方導電性樹脂接着剤9,10を塗布(膜厚:約
数乃至10μm)する。
As shown in FIG. 4 (c), the semiconductor light emitting device 1 'in a wafer state after the surface of the groove 18 has been subjected to the chemical treatment is provided on the surface of each of the metal thin films 5 and 6 by, for example, Hysole. Anisotropic conductivity such as resin material, such as "Mofit TG-9000R" or a similar product, in which several to several tens wt% of conductive coarse particles (particle size: about 10 μm or less) are mixed with liquid translucent epoxy resin The resin adhesives 9 and 10 are applied (film thickness: about several to 10 μm).

【0075】更に異方導電性樹脂接着剤9,10を塗布
した両表面上に、図4(d)に示すように例えばAu ,
Ag ,Mo 等からなる金属箔7,8を張り付ける。これ
らの金属箔7,8の膜厚は、後工程での実装状態等を考
慮して、少なくとも20μm以上、望ましくは30乃至
100μmの間に設定される。何故ならば、金属箔7,
8の膜厚が20μm以下の場合は、絶縁基板又はリード
フレーム等の基体の電極部との導通が充分に取れず、逆
に100μm以上の場合は、応力破壊や電極剥離等が発
生しやすくなるからである。上記導通は膜厚が20μm
以上あれば取れるが、30μm以上ある方がより確実で
ある。又、150μm程度までの膜厚であれば本発明に
おける上記不良の発生頻度はそれほど高くない。
Further, as shown in FIG. 4 (d), for example, Au, on both surfaces to which the anisotropic conductive resin adhesives 9, 10 have been applied.
Metal foils 7, 8 made of Ag, Mo, etc. are attached. The film thickness of these metal foils 7 and 8 is set to at least 20 μm or more, preferably 30 to 100 μm in consideration of a mounting state in a later step. Because the metal foil 7,
When the film thickness of 8 is 20 μm or less, conduction with an electrode portion of a base such as an insulating substrate or a lead frame cannot be sufficiently obtained. Conversely, when the film thickness is 100 μm or more, stress destruction, electrode peeling, and the like tend to occur. Because. The above conduction has a film thickness of 20 μm
If it is more than the above, it can be obtained. Further, if the film thickness is up to about 150 μm, the frequency of occurrence of the above defects in the present invention is not so high.

【0076】上記状態では、異方導電性樹脂接着剤9,
10はまだ未硬化の状態であり、次にこれを硬化して金
属薄膜5,6と金属箔7,8とを導通状態に接着する必
要がある。
In the above state, the anisotropic conductive resin adhesive 9,
10 is still in an uncured state, and it is necessary to cure it and then bond the metal thin films 5, 6 and the metal foils 7, 8 in a conductive state.

【0077】従って、次に図4(e)に示すようにウエ
ハー状態の半導体発光素子1′の両面から荷重(約2乃
至20kg/cm2 ,図中矢印で示した方向から加圧する)
を架けながら異方導電性樹脂接着剤9,10の硬化を行
う。硬化条件は、異方導電性樹脂接着剤9,10の種類
により異なるが本実施例で用いたものでは、150℃‐
2分乃至200℃‐30秒である。
Accordingly, as shown in FIG. 4 (e), a load (approximately 2 to 20 kg / cm 2 , pressurized in the direction indicated by the arrow in FIG. 4) is applied from both sides of the semiconductor light emitting device 1 'in a wafer state.
While the anisotropic conductive resin adhesives 9 and 10 are cured. The curing conditions vary depending on the type of the anisotropic conductive resin adhesives 9 and 10, but the curing conditions used in this example are 150 ° C.
2 minutes to 200 ° C. for 30 seconds.

【0078】最後に、図4(f)に示すように例えばダ
イヤモンドブレード等を用いて、複数の垂直に交差する
2種類の平行な溝部18(幅:約50乃至80μm)の
中央に沿ってウエハー状態の半導体発光素子1′を個々
のチップ状の半導体発光素子1に分割する。この時、後
工程での実装状態等を考慮して溝部18に形成される凹
状部分の深さが、少なくとも異方導電性樹脂接着剤9,
10中に含まれる導電性物質14の最大径よりも大きく
なるように分割幅を設定する必要がある。本実施例で
は、導電性粗粒子等の導電性物質14の最大径が約10
μm以下であるので分割精度等も加味して、凹状部分の
深さが少なくとも20μm以上になるように分割幅は4
0μm以下に設定した。
Finally, as shown in FIG. 4 (f), using a diamond blade or the like, for example, the wafer is formed along the center of a plurality of two types of parallel grooves 18 (width: about 50 to 80 μm) which intersect perpendicularly. The semiconductor light emitting element 1 'in the state is divided into individual chip-shaped semiconductor light emitting elements 1. At this time, the depth of the concave portion formed in the groove 18 in consideration of the mounting state in a later step and the like is at least set to at least the anisotropic conductive resin adhesive 9,
It is necessary to set the division width so as to be larger than the maximum diameter of the conductive substance 14 contained in 10. In this embodiment, the maximum diameter of the conductive substance 14 such as conductive coarse particles is about 10
μm or less, taking into account the division accuracy, etc., the division width should be 4 so that the depth of the concave portion is at least 20 μm or more.
It was set to 0 μm or less.

【0079】図5に上記半導体発光素子の製造過程にお
いて、金属薄膜と金属箔との接着に異方導電性樹脂接着
剤を使用する理由を示す。
FIG. 5 shows the reason why an anisotropic conductive resin adhesive is used for bonding the metal thin film and the metal foil in the process of manufacturing the semiconductor light emitting device.

【0080】図5(a)は導電性のろう材又は樹脂接着
剤を用いて金属薄膜と金属箔とを接着した場合の断面
図、(b)は異方導電性樹脂接着剤を用いて金属薄膜と
金属箔とを接着した場合の断面図である。
FIG. 5A is a cross-sectional view of a case where a metal thin film and a metal foil are bonded using a conductive brazing material or a resin adhesive, and FIG. 5B is a cross-sectional view of a metal using an anisotropic conductive resin adhesive. It is sectional drawing in case a thin film and a metal foil are adhered.

【0081】図から明らかなように金属薄膜5と金属箔
7とを接着する際に金属薄膜5上に導電性のろう材又は
樹脂接着剤19や異方導電性樹脂接着剤9等を塗布する
と、溝部18にこれらの一部が流れ込む。溝部18側面
にはPN接合が露出する端面が形成されているので導電
性のろう材又は樹脂接着剤19がこの部分に付着する
と、PN接合が露出する端面での短絡や漏洩電流の発生
等により半導体発光素子が正常に駆動しなくなる。
As is apparent from the figure, when the metal thin film 5 and the metal foil 7 are bonded, a conductive brazing material or a resin adhesive 19 or an anisotropic conductive resin adhesive 9 is applied onto the metal thin film 5. Some of these flow into the groove 18. Since the end face where the PN junction is exposed is formed on the side face of the groove portion 18, if a conductive brazing material or a resin adhesive 19 adheres to this portion, a short circuit or a leakage current occurs at the end face where the PN junction is exposed. The semiconductor light emitting element does not operate normally.

【0082】しかし、異方導電性樹脂接着剤9の場合
は、溝部18には負荷がかかっていないので導電性物質
14同士が接触しあうことはほとんど無く樹脂15中に
分散しており絶縁性樹脂接着剤として振舞うのでPN接
合が露出する端面での短絡や漏洩電流は発生しない。
However, in the case of the anisotropic conductive resin adhesive 9, since no load is applied to the groove 18, the conductive substances 14 hardly come into contact with each other and are dispersed in the resin 15. Since it behaves as a resin adhesive, no short circuit or leakage current occurs at the end face where the PN junction is exposed.

【0083】図6は本発明の実施例における半導体発光
素子の実装方法を説明する図面であり、異方導電性樹脂
接着剤を用いて絶縁基板又はリードフレーム等の基体に
接続した場合の断面図である。
[0083] Figure 6 is a view for explaining a mounting method of a semiconductor light-emitting device in the real施例of the present invention, cross-section when connected to the insulating substrate or substrate such as a lead frame using the anisotropic conductive resin adhesive FIG.

【0084】図6に示すように絶縁基板又はリードフレ
ーム等の基体の電極部分20,21に、例えばハイソー
ル社製の「モーフィット TG‐9000R」やその類
似品で液状の透光性エポキシ樹脂に数乃至数十wt%の導
電性粗粒子(粒径:約10μm以下)を配合した樹脂材
料等の異方導電性樹脂接着剤9″を塗布(膜厚:約数乃
至10μm)する。
As shown in FIG. 6, for example, a liquid translucent epoxy resin such as "Morfit TG-9000R" manufactured by Hysole or a similar product is applied to the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame. An anisotropic conductive resin adhesive 9 ″ such as a resin material containing several to several tens wt% of conductive coarse particles (particle size: about 10 μm or less) is applied (film thickness: about several to 10 μm).

【0085】次に、絶縁基板又はリードフレーム等の基
体の電極部分20,21にたいしてP・N両電極層1
1,12が垂直方向で接するように半導体発光素子1を
搭載する。
Next, the P and N electrode layers 1 are applied to the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame.
The semiconductor light emitting element 1 is mounted so that the semiconductor light emitting devices 1 and 12 are in contact with each other in the vertical direction.

【0086】最後に、半導体発光素子1の上面から荷重
(約2乃至20kg/cm2 ,図中矢印で示した方向から加
圧する)を架けながら異方導電性樹脂接着剤9″の硬化
を行う。硬化条件は、異方導電性樹脂接着剤9″の種類
により異なるが本実施例で用いたものでは、150℃‐
2分乃至200℃‐30秒である。
Lastly, the anisotropic conductive resin adhesive 9 ″ is cured while applying a load (approximately 2 to 20 kg / cm 2 , pressurizing in the direction indicated by the arrow in the figure) from the upper surface of the semiconductor light emitting device 1. The curing conditions vary depending on the type of the anisotropic conductive resin adhesive 9 ″, but the curing conditions used in this example are 150 ° C.
2 minutes to 200 ° C. for 30 seconds.

【0087】この結果、荷重を受けて硬化したP・N両
電極層11,12と絶縁基板又はリードフレーム等の基
体の電極部分20,21との間では、間に挟まった個々
の導電性物質14″が直接接触するので導通状態が作り
出される。
As a result, between the P and N electrode layers 11 and 12 cured by receiving a load and the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame, the individual conductive substances sandwiched between the two. A conduction state is created because the 14 "is in direct contact.

【0088】これに対して、その他の部分の異方導電性
樹脂接着剤9″は、負荷を受けずに硬化するので導電性
物質14″同士が接触しあうことはほとんど無く樹脂1
5中に分散しているので絶縁性樹脂接着剤として振舞
う。
On the other hand, the other portion of the anisotropic conductive resin adhesive 9 ″ cures without receiving a load, so that the conductive substances 14 ″ hardly come into contact with each other, and
5, it behaves as an insulating resin adhesive.

【0089】但しこの場合でも、被接着面間の隙間が導
電性物質14″の最大径よりも小さいと被接着面間に導
電性物質14″による導通が生じる可能性があるが、上
記半導体発光素子1はPN接合部及びその近傍13が凹
状に形成されているのでPN接合が露出する端面での導
電性物質14″による導通状態は起こらない。
However, even in this case, if the gap between the surfaces to be bonded is smaller than the maximum diameter of the conductive material 14 ", there is a possibility that the conductive material 14" may cause conduction between the surfaces to be bonded. Since the element 1 has the PN junction and the vicinity 13 formed in a concave shape, the conductive state due to the conductive material 14 ″ does not occur on the end face where the PN junction is exposed.

【0090】上記本発明の実施例では、4面すべてのP
N接合部及びその近傍が凹状に形成されているが、半導
体発光素子を絶縁基板又はリードフレーム等の基体に接
続する際にこれらの少なくとも電極方向に対抗する1面
のみが凹状に形成されていればよい。
[0090] In the real施例of the present invention, all four sides of the P
The N-junction and its vicinity are formed in a concave shape, but when connecting the semiconductor light-emitting element to a base such as an insulating substrate or a lead frame, at least one surface opposing the electrode direction is formed in a concave shape. I just need.

【0091】又、これらの形状は必ずしも凹状である必
要はなく、半導体発光素子の電極層が絶縁基板又はリー
ドフレーム等の基体と接着する箇所では異方導電性樹脂
接着剤が導電性樹脂接着剤として振舞い、それ以外の付
着面、特にPN接合が露出する端面では異方導電性樹脂
接着剤が絶縁性樹脂接着剤として振舞う様な構造であれ
ばよい。
Further, these shapes need not necessarily be concave, and the anisotropic conductive resin adhesive may be replaced with the conductive resin adhesive at a portion where the electrode layer of the semiconductor light emitting element is bonded to a base such as an insulating substrate or a lead frame. The other adhesion surface, especially the end surface where the PN junction is exposed, may have a structure in which the anisotropic conductive resin adhesive behaves as an insulating resin adhesive.

【0092】次に、参考例について図面を参照して説明
する。
Next, a reference example will be described with reference to the drawings.

【0093】尚、図面において本発明の実施例と同じ材
料,形状等を示す部分は同一の符号を付してその詳しい
説明は省略する。
[0093] Incidentally, the same material, the portion showing the shape and the actual施例of the present invention will not be described in detail with the same reference numerals in the drawings.

【0094】図7は参考例により形成された半導体発光
素子の斜視図であり、図8(a)は図1におけるB‐
B′部分の断面図、(b)は上面図、(c)は底面図で
ある。
FIG. 7 is a perspective view of a semiconductor light emitting device formed according to the reference example, and FIG.
FIG. 4B is a cross-sectional view of a portion B ′, FIG. 4B is a top view, and FIG.

【0095】この参考例が先に説明した実施例と異なる
点は、P・N電極層11′,12′を金属薄膜5,6と
導電性のろう材又は樹脂接着剤19′,19″とで形成
したことと、PN接合部及びその近傍13を絶縁性物質
22で端面を被覆したことの2点にある。
This reference example is different from the above-described embodiment in that the PN electrode layers 11 'and 12' are made of metal thin films 5 and 6 and conductive brazing materials or resin adhesives 19 'and 19 ". And that the PN junction and its vicinity 13 are covered with an insulating material 22 on the end face.

【0096】即ち、本参考例の半導体発光素子23の構
造は、まずIII‐V族化合物半導体,II‐VI族化合物半
導体或いはSiC 等の半導体材料よりなるN型の半導体
層2上に、同じくIII‐V族化合物半導体,II‐VI族化
合物半導体或いはSiC 等の半導体材料よりなるP型の
半導体層3が積層形成されている。
[0096] That is, the structure of the semiconductor light emitting element 23 of the present embodiment, first group III-V compound semiconductor, on the II-VI compound semiconductor or N-type semiconductor layer 2 made of a semiconductor material such as SiC, similarly III A P-type semiconductor layer 3 made of a semiconductor material such as a -V compound semiconductor, a II-VI compound semiconductor, or SiC is laminated.

【0097】次に、PN接合面4に平行な両端面の全面
上に例えばAgやAu等よりなる金属薄膜5,6と、例え
ばインジウム等の金属系からなる導電性のろう材又はA
u ‐エポキシ樹脂,Ag ‐エポキシ樹脂等からなる導電
性樹脂接着剤19′,19″が順次積層されてP電極層
11′とN電極層12′が形成されている。導電性のろ
う材又は樹脂接着剤19′,19″の膜厚は後工程での
実装状態等を考慮して、少なくとも20μm以上、望ま
しくは30乃至100μmの間に設定されている。
Next, metal thin films 5 and 6 made of, for example, Ag or Au, and a conductive brazing material made of a metal material such as indium, or A, are formed on the entire end faces parallel to the PN junction surface 4.
Conductive resin adhesives 19 'and 19 "made of u-epoxy resin, Ag-epoxy resin or the like are sequentially laminated to form a P electrode layer 11' and an N electrode layer 12 '. The film thickness of the resin adhesives 19 ', 19 "is set to at least 20 [mu] m or more, preferably between 30 and 100 [mu] m, in consideration of a mounting state in a later step.

【0098】PN接合部及びその近傍13は、その周囲
の面よりも低い位置になるように凹状に形成されてお
り、この凹状に形成された部分は、例えば液状エポキシ
樹脂(ビスフェノールA型エポキシ樹脂:40乃至70
重量部,フェノールノボラック型エポキシ樹脂:10乃
至30重量部,シリカ微粒子:0乃至50重量部,変性
尿素樹脂:1乃至5重量部未満の混合物等)等の有機材
料の絶縁性物質22で端面が被覆されている。
The PN junction and its vicinity 13 are formed in a concave shape so as to be lower than the surrounding surface, and the portion formed in the concave shape is, for example, a liquid epoxy resin (bisphenol A type epoxy resin). : 40 to 70
Parts by weight, a phenol novolak type epoxy resin: 10 to 30 parts by weight, a silica fine particle: 0 to 50 parts by weight, a modified urea resin: a mixture of 1 to less than 5 parts by weight) and the like. Coated.

【0099】尚、本参考例では液状エポキシ樹脂等の有
機材料で絶縁性物質を形成しているが、SiO2やAl2
3 等の無機材料を用いて、蒸着,スパッタリング又はス
ピンコーティング等の手法により形成してもよい。
[0099] Incidentally, in the present embodiment is formed an insulating material with an organic material such as liquid epoxy resin, SiO 2 and Al 2 O
It may be formed by a method such as vapor deposition, sputtering, or spin coating using an inorganic material such as 3 .

【0100】次に、参考例における半導体発光素子の製
造方法について詳細に説明する。
Next, a method of manufacturing a semiconductor light emitting device in the reference example will be described in detail.

【0101】図9(a)乃至(i)は本参考例を用いた
半導体発光素子の製造方法を示す手順図である。
[0102] Figure 9 (a) to (i) is a procedure diagram showing the method of manufacturing the semiconductor light-emitting device using the present embodiment.

【0102】尚、図9(a)及び(b)は、本発明の実
施例において説明した図4(a)及び(b)と同じ工程
であるので図中に図番のみ記して説明は省略する。
Since FIGS. 9A and 9B show the same steps as FIGS. 4A and 4B described in the embodiment of the present invention , only the figure numbers are shown in the figures. The description is omitted.

【0103】溝部18中の表面の化学処理後、ウエハー
状態の半導体発光素子23′は、図9(c)に示すよう
にP型の半導体層3側の金属薄膜5の表面上で同表面よ
り僅かに小さな面積の範囲内に、例えばインジウム等の
金属系からなる導電性のろう材又はAu ‐エポキシ樹
脂,Ag ‐エポキシ樹脂等からなる導電性樹脂接着剤1
9が塗布される。この時の導電性のろう材又は樹脂接着
剤19の膜厚は、あまり薄くすると後工程での作業性が
悪くなり、逆に厚くすると硬化の際に応力破壊等が発生
するので、例えば20乃至150μmの間に設定され
る。
After the chemical treatment of the surface in the groove 18, the semiconductor light emitting device 23 'in a wafer state is formed on the surface of the metal thin film 5 on the P-type semiconductor layer 3 side from the same surface as shown in FIG. A conductive brazing material made of a metal such as indium or a conductive resin adhesive made of an Au-epoxy resin, an Ag-epoxy resin, or the like is provided within a slightly small area.
9 is applied. If the thickness of the conductive brazing material or the resin adhesive 19 at this time is too small, the workability in the subsequent process is deteriorated. On the other hand, if the thickness is too large, stress destruction or the like occurs at the time of curing. It is set between 150 μm.

【0104】上記状態では、導電性のろう材又は樹脂接
着剤19はまだ未硬化の状態であり、次にこれを硬化し
て金属薄膜5表面上に硬化定着する必要がある。
In the above state, the conductive brazing material or the resin adhesive 19 is still in an uncured state, and needs to be cured and fixed on the surface of the metal thin film 5.

【0105】従って、次に図9(d)に示すように所定
の硬化条件(硬化条件は、導電性のろう材又は樹脂接着
剤19の種類により異なるが本参考例で使用したもので
は、150℃‐1乃至2時間もしくは相当条件である)
にて金属薄膜5に硬化定着させる。
[0105] Accordingly, next predetermined curing conditions (curing conditions as shown in FIG. 9 (d), intended varies depending on the kind of conductive brazing material or a resin adhesive 19 is used in this reference example, 150 ℃ -1 to 2 hours or equivalent conditions)
Is cured and fixed on the metal thin film 5.

【0106】次に、図9(e)に示すように複数の垂直
に交差する2種類の平行な溝部18に例えば液状エポキ
シ樹脂(ビスフェノールA型エポキシ樹脂:40乃至7
0重量部,フェノールノボラック型エポキシ樹脂:10
乃至30重量部,シリカ微粒子:0乃至50重量部,変
性尿素樹脂:1乃至5重量部未満の混合物等)等の有機
材料の絶縁性物質22を塗布する。この時の絶縁性物質
22の塗布量は、金属薄膜5表面上に硬化定着した導電
性のろう材又は樹脂接着剤19の表面上に溢れ出さない
ように溝部18上で約5乃至20μmの高さになるよう
にする。絶縁性物質22塗布の際は、この中に気泡が内
在しないように、例えば絶縁性物質22の粘度を10po
ise(1poise=10-1N・s/m2)以下に押さえるとか、塗
布後に真空脱泡を行う等の配慮が必要である。
Next, as shown in FIG. 9E, for example, a liquid epoxy resin (bisphenol A type epoxy resin: 40 to 7) is inserted into a plurality of two kinds of parallel grooves 18 which intersect vertically.
0 parts by weight, phenol novolak type epoxy resin: 10
To 30 parts by weight, a silica fine particle: 0 to 50 parts by weight, a modified urea resin: a mixture of 1 to less than 5 parts by weight, etc.). At this time, the applied amount of the insulating substance 22 is about 5 to 20 μm on the groove 18 so as not to overflow onto the surface of the conductive brazing material or the resin adhesive 19 cured and fixed on the surface of the metal thin film 5. So that When applying the insulating material 22, for example, the viscosity of the insulating material 22 is set to 10 po so that no air bubble is contained therein.
Care must be taken to keep it below ise ( 1 poise = 10 -1 N · s / m 2 ) or to perform vacuum defoaming after coating.

【0107】絶縁性物質22は、塗布・脱泡後に所定の
硬化条件(硬化条件は、絶縁性物質22の種類により異
なるが本参考例で用いたものでは、130℃以下の温
度、望ましくは100℃‐4乃至8時間)にて溝部18
に硬化定着させる。
[0107] The insulating material 22, a predetermined curing conditions after coating and defoamed (curing conditions than those used in different but this reference example on the type of insulating material 22, 130 ° C. or less of the temperature, preferably 100 At -4 to 8 hours).
Is cured and fixed.

【0108】絶縁性物質22の硬化は、溝部18が深す
ぎたり、絶縁性物質22の硬化温度が高くなるにつれて
絶縁性物質22の硬化収縮によりウエハー状態の半導体
発光素子23′に「反り」が発生して後工程に支障を来
すので、絶縁性物質22の硬化性能(本実施例では、含
有樹脂の成分・組成に依存する)をも含めてこれらのパ
ラメータを個々の場合に応じて慎重に選ぶことが肝要で
ある。例えば、本参考例では溝部18の深さは、100
μm以内で絶縁性物質22の硬化温度は120℃以下に
止める方がよい。
When the insulating material 22 is cured, as the groove 18 becomes too deep or as the curing temperature of the insulating material 22 increases, the semiconductor light emitting device 23 ′ in the wafer state is warped due to the curing contraction of the insulating material 22. These parameters may interfere with the subsequent process. Therefore, these parameters including the curing performance of the insulating material 22 (in this embodiment, depending on the components and compositions of the contained resins) must be carefully adjusted according to the individual case. It is important to choose one. For example, the depth of the reference example grooves 18, 100
It is preferable that the curing temperature of the insulating substance 22 be kept at 120 ° C. or less within μm.

【0109】本参考例では液状エポキシ樹脂等の有機材
料で絶縁性物質22を形成しているが、SiO2やAl2
3 等の無機材料により形成してもよい。この場合は、蒸
着,スパッタリング又はスピンコーティング等の手法を
用いる。
[0109] In this reference example is formed an insulating material 22 in the organic material such as liquid epoxy resins but, SiO 2 and Al 2 O
It may be formed of an inorganic material such as 3 . In this case, a technique such as vapor deposition, sputtering, or spin coating is used.

【0110】次に、図9(f)に示すようにP型の半導
体層3側の金属薄膜5の表面上に形成された導電性のろ
う材又は樹脂接着剤19を、その膜厚が2O乃至50μ
mになるまで例えばサンドペーパー等(番手:#800
乃至#2000程度)を用いて研磨する。
Next, as shown in FIG. 9F, a conductive brazing material or a resin adhesive 19 formed on the surface of the metal thin film 5 on the side of the P-type semiconductor layer 3 is applied with a thickness of 2O. ~ 50μ
m until it reaches m (counter: # 800
To about # 2000).

【0111】更に、図9(g)に示すようにウエハー状
態の半導体発光素子23′の表裏両面に導電性のろう材
又は樹脂接着剤19′,19″を塗布する。
Further, as shown in FIG. 9 (g), a conductive brazing material or resin adhesive 19 ', 19 "is applied to both front and back surfaces of the semiconductor light emitting element 23' in the wafer state.

【0112】そして図9(h)に示すように、例えば1
10℃‐4乃至8時間或いは150℃‐1乃至2時間等
の硬化条件で硬化し、膜厚が、少なくとも20μm以
上、望ましくは30乃至100μmの間になるようにP
・N両面の電極層11′,12′を形成する。何故なら
ば、電極層11′,12′の膜厚が20μm以下の場合
は、絶縁基板又はリードフレーム等の基体の電極部との
導通が充分に取れず、逆に100μm以上の場合は、応
力破壊や電極剥離等が発生しやすくなるからである。上
記導通は膜厚が20μm以上あれば取れるが、30μm以
上ある方がより確実である。又、150μm程度までの
膜厚であれば本発明における上記不良の発生頻度はそれ
ほど高くない。
Then, as shown in FIG.
It is cured under the curing conditions of 10 ° C. for 4 to 8 hours or 150 ° C. for 1 to 2 hours, and the P is applied so that the film thickness is at least 20 μm or more, preferably 30 to 100 μm.
-Form electrode layers 11 'and 12' on both sides of N. This is because when the thickness of the electrode layers 11 'and 12' is 20 μm or less, sufficient conduction with the electrode portion of the base such as an insulating substrate or a lead frame cannot be obtained. This is because breakage, electrode peeling, and the like are likely to occur. The conduction can be obtained when the film thickness is 20 μm or more, but it is more reliable when the film thickness is 30 μm or more. Further, if the film thickness is up to about 150 μm, the frequency of occurrence of the above defects in the present invention is not so high.

【0113】最後に、図9(i)に示すように例えばダ
イヤモンドブレード等を用いて、絶縁性物質22が充填
された複数の垂直に交差する2種類の平行な溝部18
(幅:約50乃至80μm)の中央に沿ってウエハー状
態の半導体発光素子23′を個々のチップ状の半導体発
光素子23に分割する。この時、絶縁破壊等を考慮する
とPN接合が露出する端面上に形成された絶縁性物質2
2の膜厚が少なくとも絶縁破壊等が発生する距離以上に
なるように分割幅を設定する必要がある。本参考例で
は、分割精度等も加味してPN接合が露出する端面上に
形成された絶縁性物質22の膜厚が少なくとも5μm以
上になるように分割幅は、溝部18(幅:約50乃至8
0μm)よりも少なくとも10μm以上望ましくは約20
μm狭く設定する必要がある。
Finally, as shown in FIG. 9 (i), using a diamond blade or the like, for example, a plurality of perpendicularly intersecting two kinds of parallel grooves 18 filled with the insulating material 22 are used.
The semiconductor light emitting device 23 ′ in a wafer state is divided into individual chip-shaped semiconductor light emitting devices 23 along the center (width: about 50 to 80 μm). At this time, in consideration of dielectric breakdown or the like, the insulating material 2 formed on the end face where the PN junction is exposed is formed.
It is necessary to set the division width so that the film thickness of No. 2 is at least equal to or longer than the distance at which dielectric breakdown or the like occurs. In the present reference example, the division width is set so that the film thickness of the insulating material 22 formed on the end face where the PN junction is exposed is at least 5 μm or more considering the division accuracy and the like. 8
0 μm) and at least 10 μm or more, preferably about 20 μm.
It is necessary to set it to be μm narrow.

【0114】図10(a)乃至(c)は参考例における
半導体発光素子の実装方法を説明する図面である。
FIGS. 10A to 10C are views for explaining a method of mounting a semiconductor light emitting device in a reference example.

【0115】図10(a)は絶縁基板又はリードフレー
ム等の基体の電極部分の間隔x1 を半導体発光素子のP
・N両電極層の間隔よりも狭く取った場合での実装方法
を示している。
FIG. 10A shows the distance x 1 between the electrode portions of a base such as an insulating substrate or a lead frame.
The mounting method is shown in the case where the distance is smaller than the distance between the N electrode layers.

【0116】まず、半導体発光素子23の導電接着の際
の位置ずれを防ぐ目的で、予め絶縁基板又はリードフレ
ーム等の基体の電極部分20,21の間に絶縁性接着剤
24を塗布する。
First, an insulating adhesive 24 is applied in advance between the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame in order to prevent the semiconductor light emitting element 23 from being displaced during conductive bonding.

【0117】次に、絶縁基板又はリードフレーム等の基
体の電極部分20,21上に、例えばインジウム等の金
属系の導電性のろう材又はAg ‐エポキシ樹脂等の導電
性樹脂接着剤19を予め塗布した後、半導体発光素子2
3のP・N両電極層11′,12′を各々絶縁基板又は
リードフレーム等の基体の電極部分20,21上に設置
してから導電性のろう材又は樹脂接着剤19を硬化す
る。硬化条件は、導電性のろう材又は樹脂接着剤19の
種類により異なるが本参考例で用いたものでは、例えば
110℃‐4乃至8時間或いは150℃‐1乃至2時間
もしくは相当条件である。
Next, a metal conductive brazing material such as indium or a conductive resin adhesive 19 such as Ag-epoxy resin is previously applied onto the electrode portions 20 and 21 of the base such as an insulating substrate or a lead frame. After coating, the semiconductor light emitting element 2
After the PN electrode layers 11 'and 12' are placed on the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame, the conductive brazing material or the resin adhesive 19 is cured. Curing conditions vary depending on the type of conductive brazing material or a resin adhesive 19 but is intended used in this reference example, for example, 110 ° C. -4 to 8 hours or 0.99 ° C. -1 to 2 hours or equivalent conditions.

【0118】本参考例では、半導体発光素子23搭載面
のPN接合部及びその近傍は13は、絶縁性物質22に
て端面が被覆されているので、搭載時に発生する導電性
のろう材又は樹脂接着剤19の回り込みによるPN接合
が露出する端面での短絡,傷や破損等の不良が無くな
る。
[0118] In this reference example, PN junction and its vicinity 13 of the semiconductor light emitting element 23 mounting surface, since the end face by an insulating material 22 is coated, an electrically conductive brazing material or resin generated during mounting Eliminating defects such as short circuit, scratches and breakage at the end face where the PN junction is exposed due to the adhesive 19 wraparound.

【0119】図10(b)は絶縁基板又はリードフレー
ム等の基体の電極部分の間隔x2 を半導体発光素子のP
・N両電極層の間隔よりも広く取った場合での実装方法
を示している。基本的な実装方法・条件等は上記図10
(a)と同じである。
FIG. 10B shows the distance x 2 between the electrode portions of the base such as an insulating substrate or a lead frame.
The mounting method is shown in the case where the distance between the two electrode layers is wider than that of the N electrode layers. The basic mounting method and conditions are shown in FIG.
Same as (a).

【0120】まず、半導体発光素子23の導電接着の際
の位置ずれを防ぐ目的で、予め絶縁基板又はリードフレ
ーム等の基体の電極部分20,21の間に絶縁性接着剤
24を塗布しておき、半導体発光素子23のP・N両電
極層11′,12′を各々絶縁基板又はリードフレーム
等の基体の電極部分20,21上に搭載固定する。
First, an insulating adhesive 24 is applied between the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame in order to prevent the semiconductor light emitting element 23 from being displaced during the conductive bonding. The P and N electrode layers 11 'and 12' of the semiconductor light emitting element 23 are mounted and fixed on electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame, respectively.

【0121】次に、半導体発光素子23と絶縁基板又は
リードフレーム等の基体の電極部分20,21とを導通
させるために、例えばインジウム等の金属系からなる導
電性のろう材又はAg‐エポキシ樹脂等の導電性樹脂接
着剤19を塗布した後硬化する。硬化条件は、導電性の
ろう材又は樹脂接着剤19の種類により異なるが本参考
例で用いたものでは、例えば110℃‐4乃至8時間或
いは150℃‐1乃至2時間もしくは相当条件である。
Next, in order to electrically connect the semiconductor light emitting element 23 to the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame, a conductive brazing material made of a metal such as indium or an Ag-epoxy resin is used. After the conductive resin adhesive 19 such as is applied, it is cured. Curing conditions than those used in different but this reference <br/> example the type of conductive brazing material or a resin adhesive 19, for example, 110 ° C. -4 to 8 hours or 0.99 ° C. -1 to 2 hours or equivalent Condition.

【0122】本参考例では、P・N両電極層11′,1
2′が実装用の導電性のろう材又は樹脂接着剤19と同
じ材料の導電性のろう材又は樹脂接着剤19′,19″
で予め形成されているので、従来の実施例で実装したも
のに比べると、実装用の導電性のろう材又は樹脂接着剤
19とP・N両電極層11′,12′とのなじみは、格
段に向上する。
[0122] In the present embodiment, P · N the electrode layers 11 ', 1
2 'is a conductive brazing material or resin adhesive 19', 19 "of the same material as the conductive brazing material or resin adhesive 19 for mounting.
In comparison with the conventional mounting method, the connection between the conductive brazing material or resin adhesive 19 for mounting and the P and N electrode layers 11 'and 12' is Dramatically improved.

【0123】図10(c)は異方導電性樹脂接着剤を用
いて絶縁基板又はリードフレーム等の基体に接続した場
合の断面図である。
FIG. 10 (c) is a cross-sectional view of a case where an anisotropic conductive resin adhesive is used to connect to a base such as an insulating substrate or a lead frame.

【0124】図10に示すように絶縁基板又はリードフ
レーム等の基体の電極部分20,21に例えばハイソー
ル社製の「モーフィット TG‐9000R」やその類
似品で液状の透光性エポキシ樹脂に数乃至数十wt%の導
電性粗粒子(粒径:約10μm以下)を配合した樹脂材
料等の異方導電性樹脂接着剤9″を塗布(膜厚:約数乃
至10μm)する。
As shown in FIG. 10, the electrode portions 20, 21 of a base such as an insulating substrate or a lead frame are provided with a number of liquid translucent epoxy resins such as "Morfit TG-9000R" manufactured by Hysole Co. or similar products. An anisotropic conductive resin adhesive 9 ″ such as a resin material mixed with conductive coarse particles (particle size: about 10 μm or less) of 10 to several tens wt% is applied (film thickness: about several to 10 μm).

【0125】次に、絶縁基板又はリードフレーム等の基
体の電極部分20,21に対して、P・N両電極層1
1′,12′が垂直方向で接するように半導体発光素子
23を搭載する。
Next, the P and N electrode layers 1 are applied to the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame.
The semiconductor light emitting element 23 is mounted so that 1 'and 12' are vertically in contact with each other.

【0126】最後に、半導体発光素子23の上面から荷
重(約2乃至20kg/cm2 ,図中矢印で示した方向から
加圧する)を架けながら異方導電性樹脂接着剤9″の硬
化を行う。硬化条件は、異方導電性樹脂接着剤9″の種
類により異なるが本参考例で用いたものでは、150℃
‐2分乃至200℃‐30秒である。
Finally, the anisotropic conductive resin adhesive 9 ″ is cured while applying a load (approximately 2 to 20 kg / cm 2, pressurizing in the direction indicated by the arrow in the figure) from the upper surface of the semiconductor light emitting element 23. The curing conditions differ depending on the type of the anisotropic conductive resin adhesive 9 ″, but the curing conditions used in this reference example are 150 ° C.
−2 minutes to 200 ° C. for 30 seconds.

【0127】この結果、荷重を受けて硬化したP・N両
電極層11′,12′と絶縁基板又はリードフレーム等
の基体の電極部分20,21との間では間に挟まった個
々の導電性物質14″が直接接触するので導通状態が作
り出される。
As a result, each of the conductive layers sandwiched between the P and N electrode layers 11 'and 12' cured by receiving a load and the electrode portions 20 and 21 of a base such as an insulating substrate or a lead frame. A conduction state is created because the substance 14 "is in direct contact.

【0128】これに対して、その他の部分の異方導電性
樹脂接着剤9″は、負荷を受けずに硬化するので導電性
物質14″同士が接触しあうことはほとんど無く樹脂1
5中に分散しており絶縁性樹脂接着剤として振舞う。
On the other hand, the other portion of the anisotropic conductive resin adhesive 9 ″ hardens without receiving a load, so that the conductive substances 14 ″ hardly come into contact with each other, and
5 and behaves as an insulating resin adhesive.

【0129】但しこの場合においても、被接着面間の隙
間が導電性物質14″の最大径よりも小さいと導電性物
質14″による導通が生じる可能性があるが、上記半導
体発光素子23はPN接合部及びその近傍13は絶縁性
物質22により絶縁耐圧以上の膜厚で被覆されており、
PN接合が露出する端面が上記導電性物質14″と接触
することは無く、従って導通状態は起こらない。
In this case, however, if the gap between the surfaces to be bonded is smaller than the maximum diameter of the conductive substance 14 ", conduction by the conductive substance 14" may occur. The junction and its vicinity 13 are covered with an insulating substance 22 with a film thickness higher than the withstand voltage.
The end face where the PN junction is exposed does not come into contact with the conductive material 14 ", and thus no conduction occurs.

【0130】本参考例では、異方導電性樹脂接着剤9″
が半導体発光素子23の固定用の絶縁性接着剤を兼ねる
ので、半導体発光素子23を導電接着する際の位置ずれ
防止及びPN接合露出部分の保護等を目的として従来使
用されていた絶縁性接着剤は不要になる。
[0130] In the present embodiment, the anisotropic conductive resin adhesive 9 "
Also serves as an insulating adhesive for fixing the semiconductor light emitting element 23, so that the insulating adhesive which has been conventionally used for the purpose of preventing the displacement when the semiconductor light emitting element 23 is conductively bonded and protecting the exposed portion of the PN junction, etc. Becomes unnecessary.

【0131】上記参考例では、4面すべてのPN接合部
及びその近傍が凹状に形成されており、この部分すべて
に絶縁性物質が充填された構造になっているが、半導体
発光素子を絶縁基板又はリードフレーム等の基体に接続
する際には、少なくとも電極方向に対抗する1面のみが
凹状に形成され、この部分のみに絶縁性物質が充填され
た構造になっていればよい。又、複数のPN接合部及び
その近傍が凹状に形成されている場合でも、半導体発光
素子を絶縁基板又はリードフレーム等の基体に接続する
際に、少なくとも電極方向に対抗する1面のみに絶縁性
物質が充填された構造になっていればよい。
In the above reference example, the PN junction on all four sides and the vicinity thereof are formed in a concave shape, and all of the parts are filled with an insulating material. Alternatively, at the time of connection to a base such as a lead frame, it is sufficient that at least only one surface opposing the electrode direction is formed in a concave shape, and only this portion is filled with an insulating material. Even when the plurality of PN junctions and the vicinity thereof are formed in a concave shape, when connecting the semiconductor light emitting element to a base such as an insulating substrate or a lead frame, at least one surface facing the electrode direction has an insulating property. What is necessary is just to have the structure filled with the substance.

【0132】更に、これらの形状は必ずしも凹状である
必要はなく、半導体発光素子のPN接合が露出する端面
が絶縁性物質で被覆可能であるならば、PN接合が露出
する端面のうち絶縁基板又はリードフレーム等の基体と
対抗する端面において、絶縁性物質が平坦な形状に形成
できる様な加工形状・工程であればよい。
Furthermore, these shapes need not necessarily be concave, and if the end face of the semiconductor light emitting device where the PN junction is exposed can be covered with an insulating material, the insulating substrate or the end face where the PN junction is exposed can be covered. Any processing shape and process may be used as long as the insulating material can be formed in a flat shape on the end face opposing the base such as a lead frame.

【0133】[0133]

【発明の効果】本発明によれば、金属薄膜に異方導電性
樹脂接着剤を介して金属箔を配置して、加圧硬化する工
程で、PN接合部分は溝部によって、短絡や漏洩電流の
発生を防ぐことが可能となるので、以下のような半導体
発光素子を容易に製造することができる。 導体発光素
子の半導体層のPN接合面に垂直な端面のうち少なくと
も一端面上に露出するPN接合部及びその近傍が、周囲
の垂直な端面よりも低い位置になるように形成されてい
るか、又は凹状に形成されていれば、絶縁基板又はリー
ドフレーム等への搭載時に半導体発光素子の端面上に露
出するPN接合部及びその近傍に発生する傷や破損等が
防止される。
According to the present invention, the metal thin film has anisotropic conductivity.
A process of placing a metal foil via a resin adhesive and curing it under pressure
In the process, the PN junction part is short-circuited and leak current
It is possible to prevent the occurrence of such semiconductors
A light-emitting element can be easily manufactured. PN junction is exposed on at least one end surface and its vicinity of the perpendicular end surface to the PN junction surface of the semiconductor layer in a semi-conductor light emitting element, or is formed so as to be positioned lower than the vertical end face of the periphery, or lever is formed in a concave shape, PN junction exposed on the end face of the semiconductor light emitting device and scratches or damage occurring in the vicinity thereof is prevented during mounting of the insulating substrate or a lead frame or the like.

【0134】従って、作業が容易になり生産性及び歩留
まりが向上しコストダウンが可能になるので、安価な製
品を供給することが可能になる。
Accordingly, the work becomes easy, the productivity and the yield are improved, and the cost can be reduced. Therefore, it is possible to supply inexpensive products.

【0135】[0135]

【0136】[0136]

【0137】[0137]

【0138】[0138]

【0139】導体発光素子の半導体層として、III‐
V族化合物半導体、II‐VI族化合物半導体、SiC等の
半導体材料の中から任意に選び出して作成すれば、異な
る発光色の半導体発光素子を用いたカラー表示装置等が
容易に製作可能になる。
[0139] As the semiconductor layer in a semi-conductor light emitting elements, III-
V group compound semiconductor, II-VI group compound semiconductor, lever to create picked any from among semiconductor materials such as SiC, a color display device or the like is easily fabricated using semiconductor light emitting elements of different emission colors .

【0140】従って、ブラウン管や液晶モニターと同等
もしくはそれ以上の商品価値を有する表示装置等を開発
することが可能になる。
Accordingly, it is possible to develop a display device having a commercial value equal to or higher than that of a cathode ray tube or a liquid crystal monitor.

【0141】導体発光素子の半導体層に形成される電
極層は、金属薄膜と、異方導電性樹脂接着剤及び金属箔
との組合せにより形成されているので、電極層形成が簡
単に行え、又電極層形成時の半導体発光素子の半導体層
と電極層との応力の差による半導体層の破壊や電極層の
剥離等の発生も無くなる。
[0141] electrode layer formed on the semiconductor layer in a semi-conductor light emitting element, a metallic thin film, because it is formed by the combination of the anisotropic conductive resin adhesive and a metal foil, the electrode layer formed easy In addition, breakage of the semiconductor layer and peeling of the electrode layer due to a difference in stress between the semiconductor layer and the electrode layer of the semiconductor light emitting element when forming the electrode layer are eliminated.

【0142】更に電極層の膜厚を150μm以下に抑え
れば応力破壊や電極剥離等の問題を未然に防止するとが
できる。
Further, the thickness of the electrode layer was suppressed to 150 μm or less.
In this way , problems such as stress destruction and electrode peeling can be prevented.

【0143】又は、膜厚に少なくとも20μm以という
下限を設けることにより、実装時の駆動に支障をきたさ
ず、充分な導通を確保できる。
Alternatively, by providing a lower limit of at least 20 μm for the film thickness, sufficient conduction can be ensured without hindering driving during mounting.

【0144】従って、工程が簡略化されるので生産性,
信頼性及び歩留まりが向上しコストダウンが可能になる
ので、安価な製品を供給することが可能になる。
Therefore, the process is simplified, so that the productivity,
Since reliability and yield can be improved and costs can be reduced, it is possible to supply inexpensive products.

【0145】或いは半導体発光素子の電極層、絶縁基
板又はリードフレーム等の基体に対して垂直方向になる
ようにして配置されれば、放射光を遮る電極層が無く光
の利用効率は高い。又、電極層の全面において導電性の
ろう材又は樹脂接着剤或いは異方導電性樹脂接着剤で接
続されるので効果的な放熱が行われ、発光効率が増大す
る。又、Au ワイヤー等による基板電極部との接続は不
要であり、工程及び作業時間や材料費の低減や寸法の小
型化が可能になる。
[0145] Alternatively the electrode layer of the semiconductor light emitting element, the utilization efficiency of the insulating substrate or the lead frame or the like is disposed so as to be perpendicular to the substrate of the lever, the electrode layer that blocks the emitted light is not the light is high. In addition, since the entire surface of the electrode layer is connected with a conductive brazing material, a resin adhesive, or an anisotropic conductive resin adhesive, effective heat radiation is performed, and luminous efficiency is increased. In addition, connection with the substrate electrode portion by Au wire or the like is unnecessary, so that it is possible to reduce the process and operation time, material cost, and size.

【0146】更に半導体発光素子の電極層が、導電性の
ろう材又は樹脂接着剤を用いて絶縁基板又はリードフレ
ーム等の基体に接続される場合は、電極層を形成する材
料と基体の電極部分とが同じ材料で形成されているので
両者のなじみはよい。
Further, when the electrode layer of the semiconductor light emitting element is connected to a base such as an insulating substrate or a lead frame using a conductive brazing material or a resin adhesive, the material forming the electrode layer and the electrode portion of the base are used. Are made of the same material, so that the two are well adapted to each other.

【0147】又は半導体発光素子の電極層が、異方導電
性樹脂接着剤を用いて絶縁基板又はリードフレーム等の
基体に接続される場合は、微小範囲での接続が可能であ
り、実装寸法の更なる小型化が可能になる。
Alternatively, when the electrode layer of the semiconductor light emitting element is connected to a base such as an insulating substrate or a lead frame using an anisotropic conductive resin adhesive, connection in a minute range is possible, and Further miniaturization becomes possible.

【0148】又、異方導電性樹脂接着剤、半導体発光
素子と絶縁基板又はリードフレーム等の基体との固定と
PN接合露出部分の端面保護用の絶縁性接着剤を兼ね
、従来必要であった仮固定の工程は不要になる。
[0148] Further, the anisotropic conductive resin adhesive, which also serves as the insulating adhesive for an end surface protection of the fixed and PN junction exposed portion of the semiconductor light emitting element and the substrate such as an insulating substrate or a lead frame
If this is the case, the step of temporarily fixing, which was conventionally required, becomes unnecessary.

【0149】従って、小型で光の利用効率が良く高信頼
性の半導体発光素子を低価格で供給することが可能にな
る。
Therefore, it is possible to supply a semiconductor light emitting device which is small, has high light use efficiency and high reliability, at low cost.

【0150】導体発光素子の外形寸法は、500μm
角以下の微小寸法で形成可能であるので、これを用いた
高解像度表示装置の構築が可能になる。
[0150] Dimensions of the semi-conductor light emitting element, 500 [mu] m
Since it can be formed with a small size smaller than a corner, it is possible to construct a high-resolution display device using this.

【0151】従って、ブラウン管や液晶ディスプレイ等
と同等の性能を有し、更に薄型、高精細で、低価格の表
示装置等を得ることが可能になる。
Accordingly, it is possible to obtain a thin, high-definition, low-cost display device having the same performance as a cathode ray tube or a liquid crystal display.

【0152】方導電性樹脂接着剤中に含まれる導電性
成分の最大径、半導体層のPN接合面に垂直な端面の
うち少なくとも一端面上に露出するPN接合部及びその
近傍と、周囲の垂直な端面との段差よりも小さくなるよ
うに設計されれば、半導体発光素子と絶縁基板又はリー
ドフレーム等の基体との接続部以外に回り込んだ異方導
電性樹脂接着剤が、PN接合部及びその近傍に付着して
も、PN接合が露出する端面での短絡や漏洩電流の発生
等による半導体発光素子の異常駆動は起こらない。
[0152] The maximum diameter of the conductive component contained in the anisotropic conductive resin adhesive, a PN junction and the vicinity thereof are exposed on at least one end face of the vertical end surface to the PN junction surface of the semiconductor layer, surrounding is designed to be smaller than the difference in level between the vertical end face of the lever, the semiconductor light emitting element and the insulating substrate or the anisotropic conductive resin adhesive wrapping around the other connecting portion of the substrate such as a lead frame, PN junction Even if it adheres to the portion and its vicinity, abnormal driving of the semiconductor light emitting element due to short circuit or generation of leakage current at the end face where the PN junction is exposed does not occur.

【0153】従って、更に高信頼性の半導体発光素子を
供給することが可能になる。
Therefore, it is possible to supply a semiconductor light emitting device with higher reliability.

【0154】これらの半導体発光素子の製造方法におい
て、半導体発光素子の端面上に露出するPN接合部及び
その近傍の形状を簡単に加工,形成することができ、更
に、厚みの比較的厚い電極層を上面及び/又は底面同時
に形成できるので、反りが発生しにくい。
In the method of manufacturing these semiconductor light emitting devices,
Te, easily processed PN junction and the vicinity of the shape thereof is exposed on the end face of the semiconductor light-emitting element can be formed, further, since the relatively thick electrode layers of thickness can be formed top and / or bottom at the same time, Warpage is unlikely to occur.

【0155】或いは半導体発光素子の製造方法において
は、半導体層に少なくともPN接合面に達する溝部分を
形成する工程と、溝部分を絶縁性物質により被覆する工
程と、半導体層の両面に電極層を形成する工程と、半導
体層及び両電極層を被覆された溝部分に沿って切断し、
分離する工程とを有している場合は、上記作用の他に、
PN接合部及びその近傍の保護が簡単に行える。
Alternatively, in the method for manufacturing a semiconductor light emitting device, a step of forming at least a groove portion reaching the PN junction surface in the semiconductor layer, a step of covering the groove portion with an insulating material, and forming an electrode layer on both surfaces of the semiconductor layer Forming and cutting along the groove portion covering the semiconductor layer and both electrode layers,
When having the step of separating, in addition to the above action,
The PN junction and its vicinity can be easily protected.

【0156】従って、製造工程における作業性が向上
し、工程の簡略化が達成され、更に製品の歩留まり及び
信頼性が向上する。
Accordingly, workability in the manufacturing process is improved, the process is simplified, and the yield and reliability of the product are improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明を適用した実施例による半導体発光素子
の斜視図。
Perspective view of a semiconductor light-emitting device according to the real施例according to the invention; FIG.

【図2】(a)は、図1におけるA‐A′部分での断面
図、(b)は上面図、(c)は底面図。
2A is a sectional view taken along the line AA ′ in FIG. 1, FIG. 2B is a top view, and FIG. 2C is a bottom view.

【図3】(a)及び(b)は、異方導電性樹脂接着剤の
働きを説明するための半導体発光素子の断面図。
FIGS. 3A and 3B are cross-sectional views of a semiconductor light emitting device for explaining the function of an anisotropic conductive resin adhesive.

【図4】(a)乃至(f)は、本発明を適用した実施例
による半導体発光素子の製造方法を示す手順図。
4 (a) to (f), the procedure diagram showing the method of manufacturing the semiconductor light emitting device according to the real施例according to the present invention.

【図5】(a)及び(b)は、工程中に異方導電性樹脂
接着剤を用いる理由を説明するための半導体発光素子の
断面図。
FIGS. 5A and 5B are cross-sectional views of a semiconductor light emitting device for explaining the reason for using an anisotropic conductive resin adhesive during a process.

【図6】本発明を適用した実施例による半導体発光素子
の実装方法を示す半導体発光素子の断面図。
Sectional view of a semiconductor light emitting device showing a mounting method of a semiconductor light emitting device according to the real施例according to the present invention; FIG.

【図7】参考例による半導体発光素子の斜視図。FIG. 7 is a perspective view of a semiconductor light emitting device according to a reference example.

【図8】(a)は、図7におけるB‐B′部分での断面
図、(b)は上面図、(c)は底面図。
8A is a sectional view taken along the line BB ′ in FIG. 7, FIG. 8B is a top view, and FIG. 8C is a bottom view.

【図9】(a)乃至(i)は、参考例による半導体発光
素子の製造方法を示す手順図。
FIGS. 9A to 9I are procedural diagrams illustrating a method for manufacturing a semiconductor light emitting device according to a reference example.

【図10】(a)乃至(c)は、参考例による半導体発
光素子の実装方法を示す半導体発光素子の断面図。
FIGS. 10A to 10C are cross-sectional views of a semiconductor light emitting device illustrating a method of mounting the semiconductor light emitting device according to a reference example.

【図11】従来例による半導体発光素子の斜視図。FIG. 11 is a perspective view of a conventional semiconductor light emitting device.

【図12】(a)は、図11におけるC‐C′部分での
断面図、(b)は上面図、(c)は底面図。
12A is a sectional view taken along the line CC ′ in FIG. 11, FIG. 12B is a top view, and FIG. 12C is a bottom view.

【図13】従来例による半導体発光素子の実装方法を示
す半導体発光素子の断面図。
FIG. 13 is a cross-sectional view of a semiconductor light emitting device illustrating a method for mounting the semiconductor light emitting device according to a conventional example.

【図14】(a)及び(b)は、従来例によるチップ部
品形状の半導体発光素子の構造を示す断面図。
FIGS. 14A and 14B are cross-sectional views showing the structure of a semiconductor light emitting device having a chip component shape according to a conventional example.

【図15】他の従来例による半導体発光素子の斜視図。FIG. 15 is a perspective view of a semiconductor light emitting device according to another conventional example.

【図16】(a)は、図15におけるD‐D′部分での
断面図、(b)は上面図、(c)は底面図。
16A is a sectional view taken along the line DD ′ in FIG. 15, FIG. 16B is a top view, and FIG. 16C is a bottom view.

【図17】(a)及び(b)は、他の従来例による半導
体発光素子の実装方法を示す半導体発光素子の断面図。
FIGS. 17A and 17B are cross-sectional views of a semiconductor light emitting device showing a method of mounting a semiconductor light emitting device according to another conventional example.

【符号の説明】[Explanation of symbols]

1,23 半導体発光素子 2,3 (N型又はP型の)半導体層 4 PN接合面 5,6 金属薄膜 7,8 金属箔 9,9′,9″,10 異方導電性樹脂接着剤 11,11′,12,12′ (N又はP)電極層 13 PN接合部及びその近傍 14,14′,14″ 導電性物質 18 溝部 19,19′,19″ 導電性のろう材又は樹脂接着剤 20,21 絶縁性基板又はリードフレーム等の基体の
電極部分 22 絶縁性物質
1,23 Semiconductor light emitting element 2,3 (N-type or P-type) semiconductor layer 4 PN junction surface 5,6 Metal thin film 7,8 Metal foil 9,9 ', 9 ", 10 Anisotropic conductive resin adhesive 11 , 11 ', 12, 12' (N or P) electrode layer 13 PN junction and its vicinity 14, 14 ', 14 "conductive material 18 groove 19, 19', 19" conductive brazing material or resin adhesive 20, 21 Insulating substrate or electrode part of base such as lead frame 22 Insulating substance

フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 33/00 G09F 9/33 Continuation of front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 33/00 G09F 9/33

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 PN接合を有する半導体層上及び/又は
下に、金属薄膜を形成する工程と、 該金属薄膜に異方導電性樹脂接着剤を介して金属箔を配
置して、加圧硬化する工程と、を備えてなると共に、 前記異方導電性樹脂接着剤を形成する、金属薄膜で被覆
された半導体層には予め、PN接合に達する溝部が形成
されてなることを特徴とする半導体発光素子の製造方
法。
1. A step of forming a metal thin film on and / or below a semiconductor layer having a PN junction, and arranging a metal foil on the metal thin film via an anisotropic conductive resin adhesive, and curing under pressure. And forming a groove reaching the PN junction in advance on the semiconductor layer coated with the metal thin film, forming the anisotropic conductive resin adhesive. A method for manufacturing a light-emitting element.
【請求項2】 前記溝部の略中央に沿ってチップ状に分
割することにより、凹状窪みを持つ半導体発光素子を形
成することを特徴とする請求項に記載の半導体発光素
子の製造方法。
2. The method for manufacturing a semiconductor light emitting device according to claim 1 , wherein the semiconductor light emitting device having a concave depression is formed by dividing the groove into a chip shape along a substantially center of the groove.
JP7066494A 1994-04-08 1994-04-08 Method for manufacturing semiconductor light emitting device Expired - Fee Related JP3299839B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7066494A JP3299839B2 (en) 1994-04-08 1994-04-08 Method for manufacturing semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7066494A JP3299839B2 (en) 1994-04-08 1994-04-08 Method for manufacturing semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPH07283439A JPH07283439A (en) 1995-10-27
JP3299839B2 true JP3299839B2 (en) 2002-07-08

Family

ID=13438167

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3299839B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3127195B2 (en) * 1994-12-06 2001-01-22 シャープ株式会社 Light emitting device and method of manufacturing the same
JP3337405B2 (en) * 1996-12-27 2002-10-21 シャープ株式会社 Light-emitting display element, method for connecting to light-emitting substrate, and method for manufacturing
JP2002324919A (en) 2001-02-26 2002-11-08 Sharp Corp Light emitting diode and method of manufacturing the same
JP2009176805A (en) * 2008-01-22 2009-08-06 Tekcore Co Ltd Surface roughening method for light emitting diode substrate

Also Published As

Publication number Publication date
JPH07283439A (en) 1995-10-27

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