JPH07273307A - High breakdown strength semiconductor device - Google Patents

High breakdown strength semiconductor device

Info

Publication number
JPH07273307A
JPH07273307A JP6325194A JP6325194A JPH07273307A JP H07273307 A JPH07273307 A JP H07273307A JP 6325194 A JP6325194 A JP 6325194A JP 6325194 A JP6325194 A JP 6325194A JP H07273307 A JPH07273307 A JP H07273307A
Authority
JP
Japan
Prior art keywords
semiconductor region
type
semiconductor
breakdown voltage
high breakdown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6325194A
Other languages
Japanese (ja)
Inventor
Susumu Murakami
進 村上
Satoshi Matsuyoshi
松吉  聡
Hidekatsu Onose
秀勝 小野瀬
Yasuhiro Mochizuki
康弘 望月
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6325194A priority Critical patent/JPH07273307A/en
Publication of JPH07273307A publication Critical patent/JPH07273307A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0661Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thyristors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To arrange functionally a positive bevel configuration and a negative bevel configuration in an end surface of a semiconductor substrate to exhibit high reliability and high breakdown strength characteristics. CONSTITUTION:A high breakdown strength semiconductor device comprises at least a first semiconductor region 2 of a p-type high impurity concentration and a second semiconductor region 3 of an n-type, and a pn junction part 13 is formed with the first semiconductor region 2 and second semiconductor region 3, and the above device comprises a semiconductor substrate 1 of which an end surface 9 is exposed, an anode electrode 7 provided in the first semiconductor region 2 and a cathode electrode 8 provided in the second semiconductor region 3. In the end surface 9 exposed from the semiconductor substrate 1, a specific thickness portion containing a pn junction part 13 has a positive bevel configuration 10. A remaining thickness portion is formed so as to have a negative bevel configuration 11, and the cathode electrode 8 projects outwardly of the end surface 9 exposed from the second semiconductor region 3 and a length containing the projected portion is equal to or slightly longer than the longest width between the end surfaces of the first semiconductor region 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高耐圧半導体装置に係
わり、特に、半導体基体の露出した端面が正ベベル構造
及び負ベベル構造を有するように構成され、半導体装置
の高耐圧特性と高信頼特性とを両立させた高耐圧半導体
装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high breakdown voltage semiconductor device, and more particularly, to a semiconductor substrate having an exposed end surface having a positive bevel structure and a negative bevel structure, which has a high breakdown voltage characteristic and a high reliability. The present invention relates to a high breakdown voltage semiconductor device having both characteristics.

【0002】[0002]

【従来の技術】従来、高耐圧半導体装置、特に、高耐圧
のダイオ−ドにおいては、p型半導体領域とn型半導体
領域とによってpn接合部を有する半導体基体を構成
し、前記半導体基体におけるpn接合部を含む露出した
端面をベベル構造に形成し、このベベル構造のベベル角
度を適宜調整することにより、前記pn接合部を含む端
面に生じる電界強度を低下させ、高耐圧特性を有するダ
イオードを得る手段(以下、これを既知の第1の手段と
いう)が知られている。そして、この既知の第1の手段
は、例えば、「IEEE Transaction o
n Electron Devices」Vol.ED
−31、No.6、P733(1984)等に開示され
ている。
2. Description of the Related Art Conventionally, in a high breakdown voltage semiconductor device, particularly in a high breakdown voltage diode, a p-type semiconductor region and an n-type semiconductor region form a semiconductor substrate having a pn junction, and the pn in the semiconductor substrate is formed. The exposed end face including the junction is formed into a bevel structure, and the bevel angle of the bevel structure is appropriately adjusted to reduce the electric field strength generated on the end face including the pn junction to obtain a diode having a high breakdown voltage characteristic. Means (hereinafter referred to as known first means) are known. Then, this known first means is, for example, “IEEE Transaction o
n Electron Devices "Vol. ED
-31, No. 6, P733 (1984) and the like.

【0003】また、同じく、高耐圧のダイオ−ドにおい
ては、p型半導体領域とn型半導体領域とによってpn
接合部を有する半導体基体を構成し、前記半導体基体に
おけるpn接合部を含む露出した端面(側面部)を凹形
彎曲状にするとともに、その凹形彎曲状の部分の頂点が
前記p型半導体領域とn型半導体領域の中の低不純物濃
度の半導体領域側にくるように形成し、前記半導体基体
の表面部分に生じる放電を防止して、高耐圧特性を有す
るダイオードを得る手段(以下、これを既知の第2の手
段という)も知られている。そして、この既知の第2の
手段は、例えば、実公昭48−40370号等に開示さ
れている。
Similarly, in a high breakdown voltage diode, a pn is formed by a p-type semiconductor region and an n-type semiconductor region.
A semiconductor base having a junction is formed, and an exposed end surface (side surface) including the pn junction of the semiconductor base is formed into a concave curve, and the apex of the concave curve is the p-type semiconductor region. And a means for obtaining a diode having a high withstand voltage characteristic by preventing discharge from occurring on the surface portion of the semiconductor substrate by forming the diode so as to come to the side of the low impurity concentration semiconductor region in the n-type semiconductor region (hereinafter referred to as The known second means) is also known. The known second means is disclosed in, for example, Japanese Utility Model Publication No. 48-40370.

【0004】さらに、他の高耐圧半導体装置、特に、静
電誘導サイリスタや静電誘導トランジスタ等において
は、少なくともそれぞれ1つ以上のp型半導体領域とn
型半導体領域とによって2つ以上のpn接合部を有する
半導体基体を構成し、前記半導体基体における一方のp
n接合部を含んだ端面を正ベベル構造に、他方のpn接
合部を含んだ端面を負ベベル構造にそれぞれ形成し、こ
れら2つのベベル構造の形成により、高耐圧特性を有す
る静電誘導サイリスタや静電誘導トランジスタ等を得る
手段(以下、これを既知の第3の手段という)が知られ
ている。そして、この既知の第3の手段は、例えば、特
開昭64−45171号、特開昭62−150774
号、特開昭61−144871号、特開昭61−137
361号、特開昭60−163460号等に開示されて
いる。
Further, in other high breakdown voltage semiconductor devices, particularly in static induction thyristors, static induction transistors, etc., at least one or more p-type semiconductor regions and n are respectively provided.
A semiconductor substrate having two or more pn junctions is formed by the type semiconductor region, and one of the p-type semiconductor regions has a p-type junction.
The end surface including the n-junction portion is formed into a positive bevel structure, and the other end surface including the pn junction portion is formed into a negative bevel structure. By forming these two bevel structures, an electrostatic induction thyristor having high withstand voltage characteristics and A means for obtaining an electrostatic induction transistor or the like (hereinafter, referred to as a known third means) is known. The known third means is disclosed, for example, in JP-A-64-45171 and JP-A-62-150774.
JP-A-61-144871, JP-A-61-137
No. 361 and JP-A-60-163460.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、既知の
第1の手段は、半導体基体のpn接合部を含む端面に生
じる電界強度が一様ではなく、その端面に形成されたベ
ベル構造のベベル角度や保護膜中の電荷の極性や強さ等
に応じて、p型半導体領域や高不純物濃度のn型半導体
領域に近いn型半導体領域の端面の表面部分の電界強度
が大きくなるため、その表面部分に降伏現象を生じ易い
という問題がある。
However, in the known first means, the electric field strength generated at the end face of the semiconductor substrate including the pn junction is not uniform, and the bevel angle of the bevel structure formed on the end face is Depending on the polarity and strength of the charges in the protective film, the electric field strength of the surface portion of the end face of the n-type semiconductor region close to the p-type semiconductor region or the n-type semiconductor region having a high impurity concentration becomes large, so There is a problem that the yield phenomenon is likely to occur.

【0006】即ち、前記降伏現象は、半導体基体のpn
接合部に一様に生じるものではなく、専ら端面部分に生
じるもので、仮に、高耐圧ダイオ−ドが得られたとして
も、その高耐圧ダイオ−ドに降伏現象が生じる際は、局
所的な発熱状態になって、半導体基体が破壊され易くな
る。この現象は、特に、高耐圧ダイオ−ドに電圧を印加
したままで、高温状態に保持させる試験、いわゆる高温
バイアス試験等の寿命試験を行う際に顕著に生じるもの
である。
That is, the breakdown phenomenon is caused by the pn of the semiconductor substrate.
It does not occur uniformly at the joint, but occurs exclusively at the end face portion. Even if a high breakdown voltage diode is obtained, when a breakdown phenomenon occurs in the high breakdown voltage diode, it is locally generated. The semiconductor substrate is likely to be broken due to heat generation. This phenomenon remarkably occurs particularly when performing a life test such as a so-called high temperature bias test in which a voltage is applied to the high withstand voltage diode and kept at a high temperature.

【0007】また、既知の第2の手段は、高耐圧ダイオ
ードの表面の安定化膜中に存在する電荷量を充分配慮し
ていないため、既知の第1の手段と同様に、高耐圧ダイ
オードにおける高温バイアス試験等の寿命試験を行う際
に、高耐圧ダイオードの阻止特性が低下するようにな
り、やはり満足な高耐圧特性が得られない等の問題があ
る。
Further, since the known second means does not sufficiently consider the amount of electric charges existing in the stabilizing film on the surface of the high breakdown voltage diode, like the known first means, in the high breakdown voltage diode, When performing a life test such as a high temperature bias test, the blocking characteristic of the high breakdown voltage diode is deteriorated, and there is a problem that a satisfactory high breakdown voltage characteristic cannot be obtained.

【0008】さらに、既知の第3の手段は、いずれのも
のも、半導体基体における一方のpn接合部を含んだ端
面を正ベベル構造に形成し、他方のpn接合部を含んだ
端面を負ベベル構造に形成するとき、正ベベル構造から
負ベベル構造へ転換される位置を半導体基体の厚さに対
して略中心位置に設けているので、これら2つのベベル
構造の機能が充分に利用されていないという問題があ
る。
Further, in any of the known third means, the end face including one pn junction in the semiconductor substrate is formed into a positive bevel structure, and the end face including the other pn junction is formed into the negative bevel. When the structure is formed, the position where the positive bevel structure is converted to the negative bevel structure is provided at a substantially central position with respect to the thickness of the semiconductor substrate, so the functions of these two bevel structures are not fully utilized. There is a problem.

【0009】本発明は、前記各問題点を除去するもの
で、その目的は、半導体基体の端面に正ベベル構造と負
ベベル構造を機能的に配置設定し、充分満たされた高信
頼性と高耐圧特性を発揮できる高耐圧半導体装置を提供
することにある。
The present invention eliminates the above-mentioned problems, and an object thereof is to functionally dispose a positive bevel structure and a negative bevel structure on an end face of a semiconductor substrate, thereby sufficiently satisfying high reliability and high reliability. An object of the present invention is to provide a high breakdown voltage semiconductor device capable of exhibiting breakdown voltage characteristics.

【0010】[0010]

【課題を解決するための手段】前記目的を達成するため
に、本発明は、少なくとも第1の導電型の高不純物濃度
の第1の半導体領域と第2の導電型の第2の半導体領域
とからなり、前記第1の半導体領域及び前記第2の半導
体領域によってpn接合部が形成され、かつ、端面が露
出した半導体基体と、前記第1の半導体領域の表面に設
けられた第1の電極と、前記第2の半導体領域の表面に
設けられた第2の電極とを有する高耐圧半導体装置にお
いて、前記半導体基体の露出した端面は、その厚み方向
に、前記pn接合部を含む一定の厚みの部分が正ベベル
構造を有し、かつ、残りの厚みの部分が負ベベル構造を
有するように構成され、前記第2の電極は、設けられて
いる部分の半導体領域の露出した端面よりも外方に突出
し、その突出部分を含む長さが前記第1の半導体領域の
端面間の最長幅に等しいかそれより僅かに長く構成する
手段を備える。
In order to achieve the above-mentioned object, the present invention provides at least a first semiconductor region of a high impurity concentration of a first conductivity type and a second semiconductor region of a second conductivity type. And a semiconductor substrate in which a pn junction is formed by the first semiconductor region and the second semiconductor region, and an end face is exposed, and a first electrode provided on the surface of the first semiconductor region. And a second electrode provided on the surface of the second semiconductor region, the exposed end face of the semiconductor substrate has a constant thickness in the thickness direction including the pn junction. Part has a positive bevel structure, and the remaining thickness part has a negative bevel structure, and the second electrode is outside the exposed end surface of the semiconductor region of the provided part. Projecting in the direction of the Length including comprises means for constituting slightly longer than or equal to the largest width between the end faces of the first semiconductor region.

【0011】[0011]

【作用】前記手段によれば、半導体基体の露出した端面
は、その厚み方向に、pn接合部を含む一定の厚みの部
分が正ベベル構造を有するように形成されているので、
半導体基体内に形成される空乏層は、第2の半導体領域
側に大きく拡がるようになり、半導体装置の高耐圧化が
計れる。また、半導体基体の露出した端面は、その厚み
方向に、前記一定の厚みの部分の残りの厚みの部分が負
ベベル構造を有するように形成され、かつ、第2の電極
は、設けられている半導体領域の露出した端面よりも外
方に突出し、その突出部分を含む長さが第1の半導体領
域の端面間の最長幅に等しいかそれより僅かに長くなる
ように形成されているので、前記負ベベル構造と第2の
電極の突出部分との併用によって、空乏層の第2の半導
体領域側への拡がりが抑制され、特定の部分の電界強度
が極端に上昇することがなくなり、高信頼性と高耐圧特
性とを両立させた高耐圧半導体装置が得られる。
According to the above means, the exposed end surface of the semiconductor substrate is formed in the thickness direction so that the portion having a constant thickness including the pn junction has the positive bevel structure.
The depletion layer formed in the semiconductor substrate largely spreads toward the second semiconductor region side, and the breakdown voltage of the semiconductor device can be increased. Further, the exposed end surface of the semiconductor substrate is formed in the thickness direction so that the remaining thickness part of the constant thickness part has a negative bevel structure, and the second electrode is provided. Since the semiconductor region is formed so as to protrude outward from the exposed end face and the length including the protruding portion is equal to or slightly longer than the longest width between the end faces of the first semiconductor region, The combined use of the negative bevel structure and the protruding portion of the second electrode suppresses the expansion of the depletion layer toward the second semiconductor region side, and the electric field strength at a specific portion does not rise extremely, resulting in high reliability. It is possible to obtain a high breakdown voltage semiconductor device having both high breakdown voltage characteristics and high breakdown voltage characteristics.

【0012】このため、半導体基体の表面の安定化膜の
電荷に偏りがあったとしても、第2半導体領域の端面の
表面部分の電界強度が局所的に高くなることはなく、高
耐圧半導体装置の高耐圧特性が低下することはない。
Therefore, even if the electric charge of the stabilizing film on the surface of the semiconductor substrate is uneven, the electric field strength at the surface portion of the end face of the second semiconductor region does not locally increase, and the high breakdown voltage semiconductor device is obtained. The high withstand voltage characteristic of does not deteriorate.

【0013】この場合、半導体装置が、第2の半導体領
域と第2の電極との間に、第2の半導体領域と同導電型
の高不純物濃度の第3の半導体領域を有する構成のもの
であるとき、この第3の半導体領域の露出した端面を、
第2の半導体領域の露出した端面に連続した負ベベル構
造を有するように形成すれば、第2の半導体領域と第3
の半導体領域との接合部の近傍の端面の電界強度が極端
に高くなるのを有効に抑制することができる。
In this case, the semiconductor device has a structure in which a third semiconductor region having the same conductivity type as that of the second semiconductor region and a high impurity concentration is provided between the second semiconductor region and the second electrode. At some point, the exposed end face of this third semiconductor region
If the exposed end face of the second semiconductor region is formed to have a continuous negative bevel structure, the second semiconductor region and the third semiconductor region can be formed.
It is possible to effectively prevent the electric field strength of the end face near the junction with the semiconductor region from becoming extremely high.

【0014】[0014]

【実施例】以下、本発明の実施例を図面を用いて詳細に
説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0015】図1は、本発明に係わる高耐圧半導体装置
の第1の実施例の構成を示す横断面図である。
FIG. 1 is a cross sectional view showing the structure of a first embodiment of a high breakdown voltage semiconductor device according to the present invention.

【0016】図1において、1は半導体基体、2はp型
(第1の導電型)の高不純物濃度の第1の半導体領域、
3はn型(第2の導電型)の第2の半導体領域、4はn
型(第2の導電型)の高不純物濃度の第3の半導体領
域、5は半導体基体1の第1の主表面、6は半導体基体
1の第2の主表面、7はアノード電極、8はカソ−ド電
極、9は半導体基体1の端面、10は端面9の正ベベル
構造部分、11は端面9の負ベベル構造部分、12はベ
ベル構造の転換点、13はpn接合部、14はnn+接
合部である。
In FIG. 1, 1 is a semiconductor substrate, 2 is a p-type (first conductivity type) high impurity concentration first semiconductor region,
3 is an n-type (second conductivity type) second semiconductor region, 4 is n
-Type (second conductivity type) high impurity concentration third semiconductor region, 5 is the first main surface of the semiconductor substrate 1, 6 is the second main surface of the semiconductor substrate 1, 7 is an anode electrode, and 8 is A cathode electrode, 9 is an end surface of the semiconductor substrate 1, 10 is a positive bevel structure portion of the end surface 9, 11 is a negative bevel structure portion of the end surface 9, 12 is a turning point of the bevel structure, 13 is a pn junction, and 14 is nn +. It is a junction.

【0017】そして、半導体基体1は、p型の第1の半
導体領域2、n型の第2の半導体領域3、n型の第3の
半導体領域4からなる積層構造によって構成され、この
積層構造は、p型の第1の半導体領域2側の表面が第1
の主表面5であり、n型の第3の半導体領域4側の表面
が第2の主表面6である。第1の主表面5におけるp型
の第1の半導体領域2上にはアノード電極7がオーミッ
ク接触状態に形成され、第2の主表面6におけるn型の
第3の半導体領域4上にはカソ−ド電極8が等電位接触
状態に形成される。p型の第1の半導体領域2とn型の
第2の半導体領域3との境界はpn接合部12を構成
し、ともにn型の第2の半導体領域3と第3の半導体領
域4との境界はnn+接合部14を構成する。また、半
導体基体1は、側面が露出した端面9であり、この露出
した端面9は正ベベル構造10(低不純物濃度部分から
高不純物濃度部分に向かって端面間の幅が短くなる構
造)と負ベベル構造11(高不純物濃度部分から低不純
物濃度部分に向かって端面間の幅が短くなる構造)にな
っている。正ベベル構造10と負ベベル構造11との接
合部分であるベベル構造の転換点12は、半導体基体1
の厚さ方向において、中央から第2の主表面6方向にか
なり偏った位置、即ち、半導体基体1において負ベベル
構造に偏った位置に設けられる。
The semiconductor substrate 1 is composed of a p-type first semiconductor region 2, an n-type second semiconductor region 3, and an n-type third semiconductor region 4, which are laminated structures. Is the first surface of the p-type first semiconductor region 2 side.
Is the main surface 5 of the above, and the surface on the n-type third semiconductor region 4 side is the second main surface 6. An anode electrode 7 is formed in an ohmic contact state on the p-type first semiconductor region 2 on the first main surface 5, and an anode electrode 7 is formed on the n-type third semiconductor region 4 on the second main surface 6. -The electrode 8 is formed in an equipotential contact state. The boundary between the p-type first semiconductor region 2 and the n-type second semiconductor region 3 constitutes a pn junction 12, and both of the n-type second semiconductor region 3 and the third semiconductor region 4 are formed. The boundary constitutes the nn + junction 14. The semiconductor substrate 1 is an end face 9 whose side surface is exposed. The exposed end face 9 has a positive bevel structure 10 (a structure in which the width between the end faces decreases from the low impurity concentration portion to the high impurity concentration portion). The bevel structure 11 (the structure in which the width between the end faces decreases from the high impurity concentration portion to the low impurity concentration portion). The turning point 12 of the bevel structure, which is the junction between the positive bevel structure 10 and the negative bevel structure 11, is the semiconductor substrate 1
In the thickness direction of the semiconductor substrate 1, the semiconductor substrate 1 is provided at a position deviated considerably from the center toward the second main surface 6, that is, at a position deviated to the negative bevel structure in the semiconductor substrate 1.

【0018】前記構成に係わる第1の実施例の高耐圧半
導体装置において、アノード電極7とカソ−ド電極8間
に、アノード電極7側が負でカソ−ド電極8側が正にな
る電圧を印加すると、p型の第1の半導体領域2とn型
の第2の半導体領域3との間のpn接合部13に逆バイ
アス電圧が印加される。この逆バイアス電圧の印加によ
り、半導体基体1内には空乏層が発生し、空乏層はpn
接合部13からp型の第1の半導体領域2側及びn型の
第2の半導体領域3側の内部に拡がる。この場合、第1
の実施例においては、pn接合部13を含む端面9が正
ベベル構造10に形成されているので、空乏層は、高不
純物濃度のp型の第1の半導体領域2側への拡がりが小
さく、比較的不純物濃度の小さいn型の第2の半導体領
域3側への拡がりが大きくなり、しかも、pn接合部1
3の部分の空乏層の拡がりは、p型の第1の半導体領域
2側では内部よりも端面9の方が少なくなり、反対に、
n型の第2の半導体領域3側では内部よりも端面9の方
がかなり多くなる。
In the high breakdown voltage semiconductor device of the first embodiment having the above-mentioned structure, when a voltage is applied between the anode electrode 7 and the cathode electrode 8 so that the anode electrode 7 side is negative and the cathode electrode 8 side is positive. , A reverse bias voltage is applied to the pn junction 13 between the p-type first semiconductor region 2 and the n-type second semiconductor region 3. By applying this reverse bias voltage, a depletion layer is generated in the semiconductor substrate 1, and the depletion layer is pn.
It extends from the junction 13 to the inside of the p-type first semiconductor region 2 side and the n-type second semiconductor region 3 side. In this case, the first
In the embodiment, since the end surface 9 including the pn junction 13 is formed in the positive bevel structure 10, the depletion layer has a small spread to the side of the p-type first semiconductor region 2 having a high impurity concentration, The spread toward the n-type second semiconductor region 3 side having a relatively low impurity concentration becomes large, and moreover, the pn junction 1
The expansion of the depletion layer in the area 3 is smaller on the end face 9 than on the inside on the p-type first semiconductor region 2 side, and conversely,
On the n-type second semiconductor region 3 side, the number of end faces 9 is considerably larger than that of the inside.

【0019】ここで、n型の第2の半導体領域3側に拡
がった空乏層は、n型の第2の半導体領域3の端面9に
沿ってn型の第3の半導体領域4側に向かって拡がるよ
うになる。この場合、第1の実施例においては、n型の
第2の半導体領域3の端面9は、半導体基体1の厚み方
向に、pn接合部13より一定の厚さだけ離れたベベル
構造の転換点12で、正ベベル構造10から負ベベル構
造11に変更されるので、n型の第2の半導体領域3の
端面9に沿ってn型の第3の半導体領域4側に向かって
拡がる空乏層は、ベベル構造の転換点12から先の負ベ
ベル構造11の存在により端面9に沿う方向の拡がりが
抑制される。
Here, the depletion layer extending toward the n-type second semiconductor region 3 side extends toward the n-type third semiconductor region 4 side along the end face 9 of the n-type second semiconductor region 3. It will spread out. In this case, in the first embodiment, the end face 9 of the n-type second semiconductor region 3 has a bevel structure turning point which is separated from the pn junction 13 by a certain thickness in the thickness direction of the semiconductor substrate 1. At 12, the positive bevel structure 10 is changed to the negative bevel structure 11, so that the depletion layer extending along the end face 9 of the n-type second semiconductor region 3 toward the n-type third semiconductor region 4 side is The presence of the negative bevel structure 11 ahead of the turning point 12 of the bevel structure suppresses the spread in the direction along the end surface 9.

【0020】また、第1の実施例においては、カソ−ド
電極8は、両端部がn型の第3の半導体領域4の露出し
た端面9よりも外方に突出しており、その突出した部分
を含んだ長さがp型の第1の半導体領域2における端面
9間の最長幅に等しいかそれより僅かに長くなるように
構成されているので、ベベル構造の転換点12から先の
負ベベル構造11方向に、即ち、n型の第2の半導体領
域3の端面9に沿ってn型の第3の半導体領域4側に向
かって拡がる空乏層は、カソ−ド電極8の外方に突出し
た部分によって、さらに端面9に沿っての拡がりが抑制
される。
Further, in the first embodiment, the cathode electrode 8 has both ends projecting outward from the exposed end surface 9 of the n-type third semiconductor region 4, and the projecting portion thereof. Is equal to or slightly longer than the longest width between the end faces 9 in the p-type first semiconductor region 2, so that the negative bevel from the turning point 12 of the bevel structure to the negative bevel. The depletion layer extending in the direction of the structure 11, that is, along the end face 9 of the n-type second semiconductor region 3 toward the n-type third semiconductor region 4 side, protrudes to the outside of the cathode electrode 8. The extended portion further suppresses the spread along the end surface 9.

【0021】ちなみに、第1の実施例において、カソ−
ド電極8の両端部がp型の第1の半導体領域2における
端面9間の最長幅よりも短く形成されている、とりわ
け、カソ−ド電極8の両端部がn型の第3の半導体領域
4における端面9間の最長幅に等しいかその幅よりも短
く形成されているような場合には、アノ−ド電極7とカ
ソ−ド電極8との間に印加された電圧によって生じる電
気力線が、n型の第2の半導体領域3とn型の高不純物
濃度の第3の半導体領域4との境界にあるnn+接合部
14に集中し、その結果、nn+接合部14に近い端面
9の電界強度が極端に高くなるという事態になることも
あって、高信頼性を有する高耐圧半導体装置を得ること
が難しくなる。
By the way, in the first embodiment,
Both ends of the cathode electrode 8 are formed to be shorter than the longest width between the end faces 9 in the p-type first semiconductor region 2. In particular, both ends of the cathode electrode 8 are n-type third semiconductor regions. 4 is formed to be equal to or shorter than the longest width between the end faces 9 in FIG. 4, the lines of electric force generated by the voltage applied between the anode electrode 7 and the cathode electrode 8 Are concentrated at the nn + junction 14 at the boundary between the n-type second semiconductor region 3 and the n-type high impurity concentration third semiconductor region 4, and as a result, the end face 9 near the nn + junction 14 is formed. Since the electric field strength becomes extremely high, it becomes difficult to obtain a highly reliable high breakdown voltage semiconductor device.

【0022】これに対し、第1の実施例においては、半
導体基体1の端面9が正ベベル構造10及び負ベベル構
造11を有するように形成し、しかも、カソ−ド電極8
の両端部がp型の第1の半導体領域2における端面9間
の最長幅に等しいかその幅よりも僅かに長くなるように
突出形成しているので、pn接合部13からn型の第2
の半導体領域3の端面9に沿って拡がる空乏層は、負ベ
ベル構造11及びカソ−ド電極8の突出部分の双方によ
って有効的に拡がりが抑制され、これによってnn+接
合部14に近い端面9における電界強度の極端な上昇が
なくなり、高信頼性と高耐圧特性を両立させた半導体装
置を得ることができる。
On the other hand, in the first embodiment, the end face 9 of the semiconductor substrate 1 is formed so as to have the positive bevel structure 10 and the negative bevel structure 11, and moreover, the cathode electrode 8 is formed.
Are formed so as to be equal to or slightly longer than the longest width between the end faces 9 in the p-type first semiconductor region 2, so that the n-type second portion is formed from the pn junction portion 13.
The depletion layer extending along the end face 9 of the semiconductor region 3 is effectively suppressed by both the negative bevel structure 11 and the projecting portion of the cathode electrode 8, whereby the end face 9 near the nn + junction 14 is suppressed. It is possible to obtain a semiconductor device having both high reliability and high withstand voltage characteristics, because the electric field strength does not rise extremely.

【0023】ここにおいて、図2は、半導体基体1の端
面9の各部分の電界強度の分布を示す特性図であって、
第1の実施例の高耐圧半導体装置の特性を既知の高耐圧
半導体装置及び参照高耐圧半導体装置の各特性とを対比
して示すものである。
Here, FIG. 2 is a characteristic diagram showing the distribution of the electric field intensity at each part of the end surface 9 of the semiconductor substrate 1.
The characteristics of the high breakdown voltage semiconductor device of the first embodiment are shown in comparison with the characteristics of a known high breakdown voltage semiconductor device and a known high breakdown voltage semiconductor device.

【0024】図2において、縦軸はkV/cmで表わし
た電界強度であり、横軸は任意単位で表わした第2の主
表面6からの距離である。また、曲線は第1の実施例
の高耐圧半導体装置の特性、曲線は既知の高耐圧半導
体装置の特性、曲線は参照高耐圧半導体装置の特性で
ある。なお、図1に示された構成要素と同じ構成要素に
ついては同じ符号を付けている。
In FIG. 2, the vertical axis represents the electric field strength expressed in kV / cm, and the horizontal axis represents the distance from the second main surface 6 expressed in arbitrary units. The curve is the characteristic of the high breakdown voltage semiconductor device of the first embodiment, the curve is the characteristic of the known high breakdown voltage semiconductor device, and the curve is the characteristic of the reference high breakdown voltage semiconductor device. The same components as those shown in FIG. 1 are designated by the same reference numerals.

【0025】この場合、既知の高耐圧半導体装置は、半
導体基体1の端面9に負ベベル構造11がなく、正ベベ
ル構造10だけが設けられ、かつ、カソード電極8の両
端部がn型の高不純物濃度の第3の半導体領域4の端面
間の幅に等しいかその幅よりも短く構成されているもの
であり、一方、参照高耐圧半導体装置は、第1の実施例
の高耐圧半導体装置において、カソード電極8の両端部
がn型の高不純物濃度の第3の半導体領域4の端面間の
幅に等しいかその幅よりも短く構成されているものであ
る。
In this case, the known high breakdown voltage semiconductor device is provided with only the positive bevel structure 10 on the end surface 9 of the semiconductor substrate 1 without the negative bevel structure 11, and both ends of the cathode electrode 8 are n-type high. The reference high withstand voltage semiconductor device is configured to be equal to or shorter than the width between the end faces of the third semiconductor region 4 having an impurity concentration, while the reference high withstand voltage semiconductor device is the same as the high withstand voltage semiconductor device of the first embodiment. Both ends of the cathode electrode 8 are configured to be equal to or shorter than the width between the end faces of the n-type high impurity concentration third semiconductor region 4.

【0026】図2の曲線に示されるように、既知の高
耐圧半導体装置によれば、アノ−ド電極7とカソ−ド電
極8との間に印加された電圧によって生じる電気力線
が、n型の第2の半導体領域3とn型の高不純物濃度の
第3の半導体領域4との境界にあるnn+接合部14付
近に集中し、このnn+接合部14に近い端面9の電界
強度が極端に増大するため、高信頼性と高耐圧特性を両
立させた高耐圧半導体装置を得ることが極めて困難であ
った。また、図2の曲線に示されるように、参照高耐
圧半導体装置によれば、半導体基体1の端面9、具体的
には、n型の第2の半導体領域3の端面9に、正ベベル
構造10から負ベベル構造11に変更されるベベル構造
の転換点12が存在するので、既知の高耐圧半導体装置
において生じていたnn+接合部14に近い端面9の電
界強度の増大はかなり緩和されるものの、ベベル構造の
転換点12に近い端面9の電界強度が増大するようにな
るので、やはり高信頼性と高耐圧特性を両立させた高耐
圧半導体装置を得ることが難しい。これに対して、図2
の曲線に示されるように、第1の実施例の高耐圧半導
体装置によれば、nn+接合部14に近い端面9の電界
強度の増大及びベベル構造の転換点12に近い端面9の
電界強度の増大の双方を緩和させることができ、それに
よって高信頼性と高耐圧特性を両立させた高耐圧半導体
装置を得ることが可能になる。
As shown in the curve of FIG. 2, according to the known high breakdown voltage semiconductor device, the line of electric force generated by the voltage applied between the anode electrode 7 and the cathode electrode 8 is n. -Type second semiconductor region 3 and n-type third semiconductor region 4 having a high impurity concentration are concentrated near the nn + junction 14, and the electric field strength of the end face 9 near the nn + junction 14 is extremely high. Therefore, it has been extremely difficult to obtain a high breakdown voltage semiconductor device having both high reliability and high breakdown voltage characteristics. Further, as shown by the curve in FIG. 2, according to the reference high breakdown voltage semiconductor device, a positive bevel structure is formed on the end surface 9 of the semiconductor substrate 1, specifically, the end surface 9 of the n-type second semiconductor region 3. Since there is a bevel structure inversion point 12 that is changed from 10 to the negative bevel structure 11, the increase in the electric field strength of the end face 9 near the nn + junction 14 which occurs in the known high breakdown voltage semiconductor device is considerably alleviated. Since the electric field strength of the end face 9 near the turning point 12 of the bevel structure is increased, it is also difficult to obtain a high breakdown voltage semiconductor device having both high reliability and high breakdown voltage characteristics. On the other hand, FIG.
As shown by the curve, the high withstand voltage semiconductor device of the first embodiment increases the electric field strength of the end surface 9 near the nn + junction 14 and the electric field strength of the end surface 9 near the turning point 12 of the bevel structure. Both increases can be mitigated, which makes it possible to obtain a high breakdown voltage semiconductor device having both high reliability and high breakdown voltage characteristics.

【0027】なお、前記第1の実施例の説明では、n型
の第2の半導体領域3とカソ−ド電極8との間に、n型
の高不純物濃度の第3の半導体領域4を設けた例につい
て述べているが、本発明において、このn型の高不純物
濃度の第3の半導体領域4は省略してもよく、省略した
場合の機能及び動作は、前記第1の実施例の機能及び動
作とほぼ同じである。
In the description of the first embodiment, the n-type third semiconductor region 4 having a high impurity concentration is provided between the n-type second semiconductor region 3 and the cathode electrode 8. However, in the present invention, the third semiconductor region 4 of the n-type high impurity concentration may be omitted, and the function and operation when omitted are the same as those of the first embodiment. And the operation is almost the same.

【0028】続く、図3は、本発明に係わる高耐圧半導
体装置の第2の実施例の構成を示す横断面図であって、
図1に図示された第1の実施例をゲ−トタ−ンオフ(G
TO)サイリスタに適用した例を示すものである。
Continuing, FIG. 3 is a cross sectional view showing the structure of a second embodiment of the high breakdown voltage semiconductor device according to the present invention.
The gate turn-off (G) of the first embodiment shown in FIG.
It shows an example applied to a TO) thyristor.

【0029】図3において、15はp型の半導体エミッ
タ領域、16はn型の半導体エミッタ領域、17はゲ−
ト電極であり、その他、図1に示された構成要素と同じ
構成要素には同じ符号を付けている。
In FIG. 3, 15 is a p-type semiconductor emitter region, 16 is an n-type semiconductor emitter region, and 17 is a gate.
The same components as those shown in FIG. 1 are denoted by the same reference numerals.

【0030】そして、前記第1の実施例の構成と第2の
実施例の構成が異なっている点は、第1に、p型の第1
の半導体領域2がp型のベ−ス領域(pB )であり、n
型の第2の半導体領域3がn型のnベース領域(nB
である点、第2に、n型の高不純物濃度の第3の半導体
領域4の内部に、n型のnベース領域(nB )にまで達
する複数のp型の半導体エミッタ領域15が設けられる
点、第3に、p型の第1の半導体領域2の表面に複数の
n型の半導体エミッタ領域16と複数のゲート電極17
が設けられ、各複数のn型の半導体エミッタ領域16上
に分割されたアノード電極7が設けられる点であって、
その他の点については、第1の実施例と第2の実施例と
の間に構成上の違いはない。
The difference between the structure of the first embodiment and the structure of the second embodiment is firstly that the p-type first structure is used.
Semiconductor region 2 is a p-type base region (p B ), and n
-Type second semiconductor region 3 is an n-type n-base region (n B ).
Second, a plurality of p-type semiconductor emitter regions 15 reaching the n-type n base region (n B ) are provided inside the n-type high impurity concentration third semiconductor region 4. Third, a plurality of n-type semiconductor emitter regions 16 and a plurality of gate electrodes 17 are formed on the surface of the p-type first semiconductor region 2.
And a divided anode electrode 7 is provided on each of the plurality of n-type semiconductor emitter regions 16.
In other respects, there is no difference in structure between the first embodiment and the second embodiment.

【0031】前記構成に係わる第2の実施例のGTOサ
イリスタにおける基本的な動作態様は、通常のGTOサ
イリスタの動作態様と変わりがなく、その動作態様は当
該技術分野においてよく知られているところであるの
で、第2の実施例のGTOサイリスタにおける動作態様
の説明は、省略する。
The basic operation mode of the GTO thyristor according to the second embodiment having the above-mentioned structure is the same as that of a normal GTO thyristor, and the operation mode is well known in the art. Therefore, the description of the operation mode in the GTO thyristor of the second embodiment is omitted.

【0032】この第2の実施例においても、前記第1の
実施例と同様に、アノード電極7とカソ−ド電極8間
に、アノード電極7側が負でカソ−ド電極8側が正にな
る電圧を印加すると、p型のベ−ス領域(pB )とn型
のnベース領域(nB )との間のpn接合部13に逆バ
イアス電圧が印加され、そのとき半導体基体1内に発生
した空乏層、pn接合部13からp型のベ−ス領域(p
B )とn型のnベース領域(nB )の内部に拡がる。こ
の場合、第2の実施例も、pn接合部13を含む端面9
が正ベベル構造10になっているので、空乏層は、高不
純物濃度のp型のベ−ス領域(pB )への拡がりに比
べ、比較的不純物濃度の小さいn型のnベース領域(n
B )への拡がりが大きくなり、しかも、pn接合部13
の空乏層の拡がりは、n型のnベース領域(nB )では
内部よりも端面9の方が多くなる。また、この第2の実
施例も、n型のnベース領域(nB )の端面9は、ベベ
ル構造の転換点12で正ベベル構造10から負ベベル構
造11に変更されるので、n型のnベース領域(nB
の端面9に沿ってn型の第3の半導体領域4側に向かっ
て拡がる空乏層は、ベベル構造の転換点12から先の負
ベベル構造11により端面9に沿っての拡がりが抑制さ
れる。
Also in the second embodiment, as in the first embodiment, a voltage between the anode electrode 7 and the cathode electrode 8 is negative on the anode electrode 7 side and positive on the cathode electrode 8 side. Is applied, a reverse bias voltage is applied to the pn junction 13 between the p-type base region (p B ) and the n-type n base region (n B ) and is generated in the semiconductor substrate 1 at that time. From the depletion layer and the pn junction 13 to the p-type base region (p
B ) and the n-type n base region (n B ). In this case, the end face 9 including the pn junction 13 is also used in the second embodiment.
Since There has been a positive bevel structure 10, the depletion layer, p-type base having a high impurity concentration - than the spread of the source region (p B), a relatively impurity concentration smaller n-type n base region (n
B ) and the pn junction 13
In the n-type n base region (n B ), the spread of the depletion layer in the end face 9 is larger in the end face 9 than in the inside. Also in this second embodiment, the end surface 9 of the n-type n base region (n B ) is changed from the positive bevel structure 10 to the negative bevel structure 11 at the turning point 12 of the bevel structure, so that the n-type n base region (n B )
The depletion layer expanding toward the n-type third semiconductor region 4 side along the end face 9 is suppressed from spreading along the end face 9 by the negative bevel structure 11 ahead of the turning point 12 of the bevel structure.

【0033】さらに、第2の実施例においても、カソ−
ド電極8は、両端部がn型の第3の半導体領域4の露出
した端面9よりも外方に突出し、その突出部分を含む長
さがp型のベ−ス領域(pB )における端面9間の最長
幅に等しいかそれより僅かに長くなるように構成されて
いるので、ベベル構造の転換点12から端面9に沿って
n型の第3の半導体領域4側に向かって拡がる空乏層
は、カソ−ド電極8の外方への突出部分により端面9に
沿っての拡がりが抑制される。
Furthermore, in the second embodiment as well,
The both ends of the electrode 8 project outward from the exposed end surface 9 of the n-type third semiconductor region 4, and the end surface in the base region (p B ) having a length of p-type including the projecting portion. The depletion layer extending from the turning point 12 of the bevel structure toward the n-type third semiconductor region 4 side along the end face 9 is equal to or slightly longer than the longest width between the two. Of the cathode electrode 8 is prevented from spreading along the end surface 9 by the outwardly projecting portion.

【0034】このように、第2の実施例によれば、pn
接合部13からn型のnベース領域(nB )の端面9に
沿って拡がる空乏層は、負ベベル構造11及びカソ−ド
電極8の突出部分の双方によって有効的に拡がりが抑制
され、これによってnn+接合部14に近い端面9にお
ける電界強度の極端な上昇が抑えられ、高信頼性と高耐
圧特性を両立させた高耐圧半導体装置GTOサイリス
タ)を得ることができる。
As described above, according to the second embodiment, pn
The depletion layer extending from the junction 13 along the end face 9 of the n-type n base region (n B ) is effectively suppressed by both the negative bevel structure 11 and the protruding portion of the cathode electrode 8. As a result, it is possible to obtain a high breakdown voltage semiconductor device GTO thyristor) that suppresses an extreme increase in the electric field strength at the end face 9 close to the nn + junction 14 and achieves both high reliability and high breakdown voltage characteristics.

【0035】続いて、図4は、本発明に係わる高耐圧半
導体装置の第3の実施例の構成を示す横断面図である。
Next, FIG. 4 is a cross sectional view showing the structure of a third embodiment of the high breakdown voltage semiconductor device according to the present invention.

【0036】図4において、18はn型の第4の半導体
領域、19はnn−接合部であり、その他、図1に示さ
れた構成要素と同じ構成要素については同じ符号を付け
ている。
In FIG. 4, 18 is an n-type fourth semiconductor region, 19 is an nn-junction portion, and other same components as those shown in FIG. 1 are designated by the same reference numerals.

【0037】そして、前記第1の実施例の構成と第3の
実施例の構成が異なっている点は、第1に、n型の第2
の半導体領域3がn型の低不純物濃度(n−)の第2の
半導体領域3からなっている点、第2に、このn型の低
不純物濃度(n−)の第2の半導体領域3とn型の高不
純物濃度の第3の半導体領域4との間に、n型の第4の
半導体領域18が設けられている点であって、その他の
点については、第1の実施例と第3の実施例との間に構
成上の違いはない。
The difference between the structure of the first embodiment and the structure of the third embodiment is that, firstly, the n-type second structure is used.
Second semiconductor region 3 of n-type low impurity concentration (n-). Second, the second semiconductor region 3 of n-type low impurity concentration (n-) is formed. Between the n-type third semiconductor region 4 having a high impurity concentration and the n-type fourth semiconductor region 18, and other points are the same as those of the first embodiment. There is no difference in structure from the third embodiment.

【0038】前記構成による第3の実施例の高耐圧半導
体装置においても、アノード電極7とカソ−ド電極8間
に、アノード電極7側が負でカソ−ド電極8側が正にな
る電圧を印加した際の動作態様は、前述の第1の実施例
の高耐圧半導体装置の動作態様と殆んど同じであるが、
この第3の実施例においては、n型の低不純物濃度の第
2の半導体領域3とn型の高不純物濃度の第3の半導体
領域4との間に、n型の第4の半導体領域18を介在配
置しているので、n型の低不純物濃度の第2の半導体領
域3とn型の第4の半導体領域18の境界に1つのnn
−接合部19、n型の第4の半導体領域18とn型の高
不純物濃度の第3の半導体領域4との境界にもう1つの
nn+接合部14が形成され、これらnn−接合部19
とnn+接合部の間で電界が分散されるので、第1の実
施例におけるnn+接合部14に近い端面9に生じる電
界強度に比べ、電界強度の増大をさらに緩和させること
ができる。このため、第1の実施例の高耐圧半導体装置
よりも、一層高信頼性と高耐圧特性とを両立させた高耐
圧半導体装置が得られる。
Also in the high withstand voltage semiconductor device of the third embodiment having the above structure, a voltage is applied between the anode electrode 7 and the cathode electrode 8 so that the anode electrode 7 side is negative and the cathode electrode 8 side is positive. The operation mode at this time is almost the same as the operation mode of the high breakdown voltage semiconductor device of the first embodiment,
In the third embodiment, an n-type fourth semiconductor region 18 is provided between the n-type low impurity concentration second semiconductor region 3 and the n-type high impurity concentration third semiconductor region 4. Is interposed, one nn is formed at the boundary between the n-type low impurity concentration second semiconductor region 3 and the n-type fourth semiconductor region 18.
-A junction 19, another nn + junction 14 is formed at the boundary between the n-type fourth semiconductor region 18 and the n-type high impurity concentration third semiconductor region 4, and these nn- junctions 19 are formed.
Since the electric field is dispersed between the nn + junction and the nn + junction, the increase in the electric field strength can be further alleviated as compared with the electric field intensity generated on the end face 9 near the nn + junction 14 in the first embodiment. Therefore, it is possible to obtain a high breakdown voltage semiconductor device having both higher reliability and higher breakdown voltage characteristics than those of the high breakdown voltage semiconductor device of the first embodiment.

【0039】次いで、図5は、本発明に係わる高耐圧半
導体装置の第4の実施例の構成を示す横断面図であっ
て、図4に図示された第3の実施例をゲ−トタ−ンオフ
(GTO)サイリスタに適用した例を示すものである。
Next, FIG. 5 is a cross-sectional view showing the structure of the fourth embodiment of the high breakdown voltage semiconductor device according to the present invention, and the gate gate of the third embodiment shown in FIG. It shows an example applied to a turn-off (GTO) thyristor.

【0040】図5において、図3及び図4に示された構
成要素と同じ構成要素については同じ符号を付けてい
る。
In FIG. 5, the same components as those shown in FIGS. 3 and 4 are designated by the same reference numerals.

【0041】そして、前記第2の実施例の構成と第4の
実施例の構成が異なっている点は、第1に、n型のnベ
ース領域(nB )がn型の低不純物濃度(n−)のnベ
ース領域(nB )からなっている点、第2に、このn型
の低不純物濃度(n−)のnベース領域(nB )とn型
の高不純物濃度の第3の半導体領域4との間に、n型の
第4の半導体領域18が設けられている点であって、そ
の他の点については、第2の実施例と第4の実施例との
間に構成上の違いは見出せない。
The difference between the structure of the second embodiment and the structure of the fourth embodiment is firstly that the n-type n base region (n B ) has a low n-type impurity concentration ( that consist n base region of the n-) (n B), the second, third n base region (n B) and n-type high impurity concentration of the low impurity concentration of the n-type (n-) The fourth semiconductor region 18 of the n-type is provided between the second and fourth semiconductor regions 4, and the other points are the same as those of the second and fourth embodiments. I can't find the difference above.

【0042】前記構成に係わる第4の実施例のGTOサ
イリスタにおける基本的な動作態様も、通常のGTOサ
イリスタの動作態様と変わりがなく、その動作態様は当
該技術分野においてよく知られているところであるの
で、この第4の実施例のGTOサイリスタにおける動作
態様の説明は、省略する。
The basic operation mode of the GTO thyristor according to the fourth embodiment having the above structure is the same as that of a normal GTO thyristor, and the operation mode is well known in the art. Therefore, the description of the operation mode in the GTO thyristor of the fourth embodiment will be omitted.

【0043】この第4の実施例においても、前記第3の
実施例と同様に、n型の低不純物濃度(n−)のnベー
ス領域(nB )とn型の高不純物濃度の第3の半導体領
域4との間に、n型の第4の半導体領域18を介在配置
しているので、n型の低不純物濃度(n−)のnベース
領域(nB )とn型の第4の半導体領域18の境界にn
n−接合部19、n型の第4の半導体領域18とn型の
高不純物濃度の第3の半導体領域4との境界にnn+接
合部14が形成され、nn−接合部19とnn+接合部
の間で電界が分散されるので、第2の実施例におけるn
n+接合部14に近い端面9に生じる電界強度に比べ、
電界強度の増大をさらに緩和させることができ、第2の
実施例の高耐圧半導体装置(GTOサイリスタ)に比べ
て、一層高信頼性と高耐圧特性とを両立させた高耐圧半
導体装置(GTOサイリスタ)を得ることができる。
Also in the fourth embodiment, as in the third embodiment, the n-type low impurity concentration (n-) n base region (n B ) and the n-type high impurity concentration of the third embodiment are used. Since the n-type fourth semiconductor region 18 is interposed between the n-type semiconductor region 4 and the n-type semiconductor region 4, the n-type low impurity concentration (n-) n-base region (n B ) and the n-type fourth region 18 are formed. N on the boundary of the semiconductor region 18 of
The nn + junction 14 is formed at the boundary between the n− junction 19, the n-type fourth semiconductor region 18 and the n-type high impurity concentration third semiconductor region 4, and the nn− junction 19 and the nn + junction are formed. Since the electric field is dispersed between n and n in the second embodiment
Compared with the electric field strength generated on the end face 9 near the n + junction 14,
A high breakdown voltage semiconductor device (GTO thyristor) that can further alleviate the increase in electric field strength and has both higher reliability and higher breakdown voltage characteristics than the high breakdown voltage semiconductor device (GTO thyristor) of the second embodiment. ) Can be obtained.

【0044】続く、図6は、本発明に係わる高耐圧半導
体装置の第5の実施例の構成を示す横断面図である。
Next, FIG. 6 is a transverse sectional view showing the structure of the fifth embodiment of the high breakdown voltage semiconductor device according to the present invention.

【0045】図6において、20は付属電極であり、そ
の他、図1に示された構成要素と同じ構成要素について
は同じ符号を付けている。
In FIG. 6, reference numeral 20 is an accessory electrode, and other components that are the same as those shown in FIG. 1 are designated by the same reference numerals.

【0046】そして、前記第1の実施例の構成と第5の
実施例の構成が異なっている点は、第1に、カソード電
極8の両端部がn型の高不純物濃度の第3の半導体領域
4の端面間の幅にほぼ等しい長さになっている点、第2
に、このカソード電極8の表面に付属電極20が設けら
れ、この付属電極20は、カソード電極8の両端部より
も外方に突出し、その突出部分を含む長さがp型の第1
の半導体領域2の端面間の最長幅に等しいかそれより僅
かに長くなるように構成されている点であって、その他
の点については、第1の実施例と第5の実施例との間に
構成上の違いはない。
The difference between the structure of the first embodiment and the structure of the fifth embodiment is that, firstly, both ends of the cathode electrode 8 are n-type third semiconductors of high impurity concentration. The point that the length is almost equal to the width between the end faces of the region 4, the second
An auxiliary electrode 20 is provided on the surface of the cathode electrode 8. The auxiliary electrode 20 projects outward from both ends of the cathode electrode 8 and has a p-type first length including the projecting portion.
Is equal to or slightly longer than the longest width between the end faces of the semiconductor region 2, and the other points are between the first embodiment and the fifth embodiment. There is no structural difference.

【0047】前記構成による第5の実施例の高耐圧半導
体装置は、実質的に、第1の実施例のカソ−ド電極8が
第5の実施例の付属電極20に取替えられたものに等価
であるので、アノード電極7とカソ−ド電極8間に、ア
ノード電極7側が負でカソ−ド電極8側が正になる電圧
を印加した際の動作態様は、前述の第1の実施例の高耐
圧半導体装置の動作態様と殆んど同じであって、第1の
実施例と同様に、第5の実施例においても、高信頼性と
高耐圧特性とを両立させた高耐圧半導体装置が得られる
ものである。
The high breakdown voltage semiconductor device of the fifth embodiment having the above structure is substantially equivalent to the high voltage semiconductor device of the first embodiment in which the cathode electrode 8 of the first embodiment is replaced with the auxiliary electrode 20 of the fifth embodiment. Therefore, the operation mode when a voltage that the anode electrode 7 side is negative and the cathode electrode 8 side is positive is applied between the anode electrode 7 and the cathode electrode 8 is the same as that of the first embodiment described above. The operation mode of the withstand voltage semiconductor device is almost the same, and similarly to the first embodiment, the fifth embodiment also provides a high withstand voltage semiconductor device having both high reliability and high withstand voltage characteristics. It is what is done.

【0048】次いで、図7は、本発明に係わる高耐圧半
導体装置の第6の実施例の構成を示す横断面図であっ
て、図5に図示された第5の実施例をゲ−トタ−ンオフ
(GTO)サイリスタに適用した例を示すものである。
Next, FIG. 7 is a cross-sectional view showing the structure of a sixth embodiment of the high breakdown voltage semiconductor device according to the present invention, and the gate gate of the fifth embodiment shown in FIG. It shows an example applied to a turn-off (GTO) thyristor.

【0049】図7において、図2及び図5に示された構
成要素と同じ構成要素については同じ符号を付けてい
る。
In FIG. 7, the same components as those shown in FIGS. 2 and 5 are designated by the same reference numerals.

【0050】そして、前記第2の実施例の構成と第6の
実施例の構成が異なっている点は、第1に、カソード電
極8の両端部がn型の高不純物濃度の第3の半導体領域
4の端面間の幅にほぼ等しい長さになっている点、第2
に、このカソード電極8の表面に付属電極20が設けら
れ、この付属電極20は、カソード電極8の両端部より
も外方に突出し、その突出部分を含む長さがp導電型の
第1の半導体領域2の端面間の最長幅に等しいかそれよ
り僅かに長くなるように構成されている点であって、そ
の他の点については、第1の実施例と第5の実施例との
間に構成上の違いはない。
The difference between the structure of the second embodiment and the structure of the sixth embodiment is, firstly, that both ends of the cathode electrode 8 are n-type third semiconductors of high impurity concentration. The point that the length is almost equal to the width between the end faces of the region 4, the second
In addition, an auxiliary electrode 20 is provided on the surface of the cathode electrode 8. The auxiliary electrode 20 projects outward from both ends of the cathode electrode 8, and the length including the projecting portion is a p-conduction type first electrode. It is configured such that it is equal to or slightly longer than the longest width between the end faces of the semiconductor region 2, and other points are between the first embodiment and the fifth embodiment. There is no structural difference.

【0051】前記構成に係わる第6の実施例のGTOサ
イリスタにおける基本的な動作態様も、通常のGTOサ
イリスタの動作態様と変わりがなく、その動作態様は当
該技術分野においてよく知られているところであるの
で、この第6の実施例のGTOサイリスタにおける動作
態様の説明は、省略する。
The basic operation mode of the GTO thyristor according to the sixth embodiment having the above-mentioned structure is the same as that of the normal GTO thyristor, and the operation mode is well known in the art. Therefore, the description of the operation mode in the GTO thyristor of the sixth embodiment will be omitted.

【0052】前記構成による第6の実施例の高耐圧半導
体装置も、実質的には、第2の実施例のカソ−ド電極8
が第6の実施例の付属電極20に取替えられたものに等
価であるので、アノード電極7とカソ−ド電極8間に、
アノード電極7側が負でカソ−ド電極8側が正になる電
圧を印加した際の動作態様は、前述の第2の実施例の高
耐圧半導体装置の動作態様と殆んど同じであって、第2
の実施例と同様に、第6の実施例においても、高信頼性
と高耐圧特性とを両立させた高耐圧半導体装置が得られ
る。
The high breakdown voltage semiconductor device of the sixth embodiment having the above structure is also substantially the same as the cathode electrode 8 of the second embodiment.
Is equivalent to the electrode of the sixth embodiment replaced by the accessory electrode 20, so that between the anode electrode 7 and the cathode electrode 8,
The operation mode when a voltage is applied such that the anode electrode 7 side is negative and the cathode electrode 8 side is positive is almost the same as the operation mode of the high breakdown voltage semiconductor device of the second embodiment described above. Two
Similar to the embodiment described above, also in the sixth embodiment, a high breakdown voltage semiconductor device having both high reliability and high breakdown voltage characteristics can be obtained.

【0053】なお、前述の各実施例において、カソード
電極8または付属電極20の突出部分の長さは、勿論、
半導体装置を構成する各部分の寸法に依存するので、一
律に決めることができないが、カソード電極8の場合
に、その厚さが10乃至20μmであるとき、例えば、
突出部分の長さは1乃至5mm程度に選ばれる。
In each of the above embodiments, the length of the protruding portion of the cathode electrode 8 or the auxiliary electrode 20 is, of course,
It cannot be uniformly determined because it depends on the size of each part constituting the semiconductor device, but in the case of the cathode electrode 8, when the thickness is 10 to 20 μm, for example,
The length of the protruding portion is selected to be about 1 to 5 mm.

【0054】[0054]

【発明の効果】以上説明したように、本発明によれば、
半導体基体1の露出した端面9は、その厚み方向に、p
n接合部13を含む一定の厚みの部分が正ベベル構造1
0を有するように形成されるので、半導体基体1内に形
成される空乏層は、第2の導電型の第2の半導体領域3
側に大きく拡がり、半導体装置の高耐圧化を計ることが
できるという効果がある。
As described above, according to the present invention,
The exposed end surface 9 of the semiconductor substrate 1 has p
The part of constant thickness including the n-junction 13 is a positive bevel structure 1
Therefore, the depletion layer formed in the semiconductor substrate 1 is the second semiconductor region 3 of the second conductivity type.
There is an effect that it can be widely spread to the side and the breakdown voltage of the semiconductor device can be increased.

【0055】また、本発明によれば、半導体基体1の露
出した端面9は、その厚み方向に、前記一定の厚みの部
分の残りの厚みの部分が負ベベル構造11を有するよう
に形成され、かつ、第2の電極8は、それが設けられて
いる半導体領域の露出した端面よりも外方に突出し、そ
の突出部分を含む長さが第1の導電型の第1の半導体領
域2の端面間の最長幅に等しいかそれより僅かに長くな
るように形成されるので、負ベベル構造11と第2の電
極8の突出部分との併用により、空乏層の第2の導電型
の第2の半導体領域3側への拡がりが抑制され、特定部
分、例えば、nn+接合部14における電界強度が極端
に上昇することがなく、高信頼性と高耐圧特性とを両立
させた高耐圧半導体装置を得ることができるという効果
がある。
Further, according to the present invention, the exposed end surface 9 of the semiconductor substrate 1 is formed in the thickness direction so that the remaining thickness portion of the constant thickness portion has the negative bevel structure 11. Moreover, the second electrode 8 projects outward from the exposed end surface of the semiconductor region in which the second electrode 8 is provided, and the length including the projecting portion is the end surface of the first semiconductor region 2 of the first conductivity type. Since the negative bevel structure 11 and the protruding portion of the second electrode 8 are used together, the depletion layer of the second conductivity type of the second conductivity type is formed. It is possible to obtain a high breakdown voltage semiconductor device in which the spread to the semiconductor region 3 side is suppressed, the electric field strength at a specific portion, for example, the nn + junction portion 14 does not rise extremely, and high reliability and high breakdown voltage characteristics are compatible with each other. The effect is that you can.

【0056】さらに、半導体基体1の表面の安定化膜の
電荷に偏りがあったとしても、第2の導電型の第2の半
導体領域3の端面の表面部分の電界強度が局所的に高く
なることはなくなり、半導体装置の高耐圧特性を低下さ
せることがないという効果もある。
Further, even if the electric charge of the stabilizing film on the surface of the semiconductor substrate 1 is uneven, the electric field strength locally increases at the surface portion of the end face of the second semiconductor region 3 of the second conductivity type. This also has the effect of not deteriorating the high breakdown voltage characteristics of the semiconductor device.

【0057】なお、半導体装置が、第2の導電型の第2
の半導体領域3と第2の電極8との間に、第2の導電型
の第2の半導体領域3と同導電型の高不純物濃度の第3
の半導体領域4を有する構成のものであるとき、第2の
導電型の第3の半導体領域4の露出した端面9を、第2
の導電型の第2の半導体領域3の露出した端面9に連続
した負ベベル構造11を有するように形成すれば、第2
の導電型の第2の半導体領域3と第2の導電型の第3の
半導体領域4とのnn+接合部14の近傍の端面9の電
界強度が極端に高くなるのを有効に抑圧できるという効
果もある。
The semiconductor device is the second conductivity type second
Between the second semiconductor region 3 of the second conductivity type and the second semiconductor region 3 of the second conductivity type.
Of the second conductivity type, the exposed end face 9 of the third semiconductor region 4 is
Of the second semiconductor region 3 of the conductivity type is formed so as to have a continuous negative bevel structure 11 on the exposed end face 9.
That the electric field strength of the end face 9 in the vicinity of the nn + junction 14 between the second semiconductor region 3 of the second conductivity type and the third semiconductor region 4 of the second conductivity type can be effectively suppressed. There is also.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による高耐圧半導体装置の第1の実施例
の構成を示す横断面図である。
FIG. 1 is a cross-sectional view showing the configuration of a first embodiment of a high breakdown voltage semiconductor device according to the present invention.

【図2】半導体基体1の端面9の各部分の電界強度の分
布を示す特性図である。
FIG. 2 is a characteristic diagram showing a distribution of electric field intensity in each part of the end surface 9 of the semiconductor substrate 1.

【図3】本発明による高耐圧半導体装置の第2の実施例
の構成を示す横断面図である。
FIG. 3 is a cross-sectional view showing the configuration of a second embodiment of the high breakdown voltage semiconductor device according to the present invention.

【図4】本発明による高耐圧半導体装置の第3の実施例
の構成を示す横断面図である。
FIG. 4 is a transverse sectional view showing the configuration of a third embodiment of the high breakdown voltage semiconductor device according to the present invention.

【図5】本発明による高耐圧半導体装置の第4の実施例
の構成を示す横断面図である。
FIG. 5 is a transverse sectional view showing the configuration of a fourth embodiment of the high breakdown voltage semiconductor device according to the present invention.

【図6】本発明による高耐圧半導体装置の第5の実施例
の構成を示す横断面図である。
FIG. 6 is a cross-sectional view showing the configuration of a fifth embodiment of the high breakdown voltage semiconductor device according to the present invention.

【図7】本発明による高耐圧半導体装置の第6の実施例
の構成を示す横断面図である。
FIG. 7 is a cross-sectional view showing the configuration of a sixth embodiment of the high breakdown voltage semiconductor device according to the present invention.

【符号の説明】[Explanation of symbols]

1 半導体基体 2 p型(第1の導電型)の高不純物濃度の第1の半導
体領域 3 n型(第2の導電型)の第2の半導体領域 4 n型(第2の導電型)の高不純物濃度の第3の半導
体領域 5 半導体基体1の第1の主表面 6 半導体基体1の第2の主表面 7 アノード電極 8 カソ−ド電極 9 半導体基体1の端面 10 端面9の正ベベル構造部分 11 端面9の負ベベル構造部分 12 ベベル構造の転換点 13 pn接合部 14 nn+接合部 15 p導電型の半導体エミッタ領域 16 n型の半導体エミッタ領域 17 ゲ−ト電極 18 n型の第4の半導体領域 19 nn−接合部 20 付属電極
1 semiconductor substrate 2 p-type (first conductivity type) high impurity concentration first semiconductor region 3 n-type (second conductivity type) second semiconductor region 4 n-type (second conductivity type) High impurity concentration third semiconductor region 5 First major surface of semiconductor substrate 1 Second major surface of semiconductor substrate 1 Anode electrode 8 Cathode electrode 9 End face 10 of semiconductor substrate 1 Positive bevel structure of end face 9 Part 11 Negative bevel structure part of end face 9 12 Turning point of bevel structure 13 pn junction 14 nn + junction 15 p conductive type semiconductor emitter region 16 n type semiconductor emitter region 17 gate electrode 18 n type fourth Semiconductor region 19 nn-junction 20 Attached electrode

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 9171−4M H01L 29/80 V (72)発明者 望月 康弘 茨城県日立市大みか町七丁目1番1号 株 式会社日立製作所日立研究所内─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification number Reference number within the agency FI Technical indication location 9171-4M H01L 29/80 V (72) Inventor Yasuhiro Mochizuki 7-1 Omika-cho, Hitachi-shi, Ibaraki No. 1 Hitachi, Ltd. Hitachi Research Laboratory

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも第1の導電型の高不純物濃度
の第1の半導体領域と第2の導電型の第2の半導体領域
とからなり、前記第1の半導体領域及び前記第2の半導
体領域によってpn接合部が形成され、かつ、端面が露
出した半導体基体と、前記第1の半導体領域の表面に設
けられた第1の電極と、前記第2の半導体領域の表面に
設けられた第2の電極とを有する高耐圧半導体装置にお
いて、前記半導体基体の露出した端面は、その厚み方向
に、前記pn接合部を含む一定の厚みの部分が正ベベル
構造を有し、かつ、残りの厚みの部分が負ベベル構造を
有するように構成され、前記第2の電極は、設けられて
いる部分の半導体領域の露出した端面よりも外方に突出
し、その突出部分を含む長さが前記第1の半導体領域の
端面間の最長幅に等しいかそれより僅かに長く構成され
ていることを特徴とする高耐圧半導体装置。
1. A high-impurity concentration first semiconductor region of at least a first conductivity type and a second semiconductor region of a second conductivity type, the first semiconductor region and the second semiconductor region. Form a pn junction and have an exposed end face, a first electrode provided on the surface of the first semiconductor region, and a second electrode provided on the surface of the second semiconductor region. In the high breakdown voltage semiconductor device having the electrode of, the exposed end surface of the semiconductor substrate has a positive bevel structure in the thickness direction including the pn junction, and has a remaining thickness of The portion is configured to have a negative bevel structure, the second electrode protrudes outward from the exposed end surface of the semiconductor region of the portion where the second electrode is provided, and the length including the protruding portion is the first electrode. Equal to the longest width between the end faces of the semiconductor region A high breakdown voltage semiconductor device characterized in that it is configured to be slightly longer than that.
【請求項2】 前記第2の半導体領域と前記第2の電極
との間に、前記第2の半導体領域よりも高不純物濃度の
第2の導電型の第3の半導体領域が設けられ、前記第3
の半導体領域の露出した端面は、前記第2の半導体領域
の露出した端面に連続した負ベベル構造を有しているこ
とを特徴とする請求項1に記載の高耐圧半導体装置。
2. A third semiconductor region of the second conductivity type having a higher impurity concentration than the second semiconductor region is provided between the second semiconductor region and the second electrode, and Third
2. The high breakdown voltage semiconductor device according to claim 1, wherein the exposed end face of the semiconductor region has a negative bevel structure continuous with the exposed end face of the second semiconductor region.
【請求項3】 前記第2の半導体領域と前記第3の半導
体領域との間に、前記第2の半導体領域よりも高不純物
濃度で、前記第3の半導体領域よりも低不純物濃度の第
2の導電型の第4の半導体領域が設けられ、前記第4の
半導体領域の露出した端面は、前記第2の半導体領域の
露出した端面及び前記第3の半導体領域の露出した端面
とともに負ベベル構造を有していることを特徴とする請
求項2に記載の高耐圧半導体装置。
3. A second impurity region between the second semiconductor region and the third semiconductor region, the impurity concentration being higher than that of the second semiconductor region and lower than that of the third semiconductor region. A fourth semiconductor region of conductivity type is provided, and the exposed end face of the fourth semiconductor region is a negative bevel structure together with the exposed end face of the second semiconductor region and the exposed end face of the third semiconductor region. The high breakdown voltage semiconductor device according to claim 2, further comprising:
【請求項4】 前記第2の電極上に付属電極が形成さ
れ、前記付属電極は、前記露出した端面よりも外側方向
に突出し、その突出した長さが前記第1の半導体の端面
間の最長幅に等しいかそれより僅かに長くなるように構
成されていることを特徴とする請求項1乃至3のいずれ
かに記載の高耐圧半導体装置。
4. An auxiliary electrode is formed on the second electrode, the auxiliary electrode protruding outward from the exposed end face, and the protruding length is the longest between the end faces of the first semiconductor. 4. The high breakdown voltage semiconductor device according to claim 1, wherein the high breakdown voltage semiconductor device is configured to be equal to or slightly longer than the width.
【請求項5】 前記半導体基体の端面に設けられた正ベ
ベル構造から負ベベル構造へ転換される位置は、半導体
基体における負ベベル構造に偏った部分であることを特
徴とする請求項1乃至4のいずれかに記載の高耐圧半導
体装置。
5. The position where the positive bevel structure provided on the end surface of the semiconductor substrate is converted to the negative bevel structure is a portion of the semiconductor substrate which is biased to the negative bevel structure. A high breakdown voltage semiconductor device according to any one of 1.
JP6325194A 1994-03-31 1994-03-31 High breakdown strength semiconductor device Pending JPH07273307A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6325194A JPH07273307A (en) 1994-03-31 1994-03-31 High breakdown strength semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6325194A JPH07273307A (en) 1994-03-31 1994-03-31 High breakdown strength semiconductor device

Publications (1)

Publication Number Publication Date
JPH07273307A true JPH07273307A (en) 1995-10-20

Family

ID=13223853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6325194A Pending JPH07273307A (en) 1994-03-31 1994-03-31 High breakdown strength semiconductor device

Country Status (1)

Country Link
JP (1) JPH07273307A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013544022A (en) * 2010-10-20 2013-12-09 ナショナル セミコンダクター コーポレーション HEMT with floating and grounded substrate area

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013544022A (en) * 2010-10-20 2013-12-09 ナショナル セミコンダクター コーポレーション HEMT with floating and grounded substrate area

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