JPH07263824A - Interconnection board - Google Patents

Abstract

PURPOSE:To facilitate the repair of broken pins by increasing the pins for input/output signals on an LSI mounting board. CONSTITUTION:Bumps 11, 12 and 13 for a signal, ground, and power source are formed at a pitch of 1.27mm on a ceramic board 18. On the back face of the board 18 signal pins 19 are formed at a pitch of 2.54mm. In the board 18 a power source layer 15 and grounding layer 14 are provided. On side faces of the board 18, a power source and grounding end face electrodes 16 and 17 are formed. The power source bump 13 and grounding bump 12 are electrically connected to the electrodes 16 and 17, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board on which an LSI is mounted.

[0002]

2. Description of the Related Art Japanese Patent Application Laid-Open Nos. 62-111456 and 4-142766 disclose examples in which input / output pins are brazed to the lower surface of a ceramic multilayer wiring board. For example, in FIG. 1 of Japanese Patent Application Laid-Open No. 4-142766, a plurality of input / output bumps 4 are provided in the central portion of the lower surface of the substrate 1, and a plurality of input / output pins 5 are provided outside the lower surface.
A plurality of input / output leads 6 are provided on the side surface. Board 1
A plurality of pads are provided on the upper surface of and are connected to the input / output bumps 4, the input / output pins and the input / output leads 6 by the internal wiring 2.

[0003]

The structure of the wiring board as described above has the following drawbacks. First, the structure in which the pins are directly attached to the wiring board has a drawback that it is difficult to repair the pins if they are removed due to an accident.

Further, the plurality of pads shown in the prior art may be connected to the outside by a pressure contact type connector. In the case of this pressure contact type connector, pressure is applied to each connection pad due to the spring property of the connector, but when the number of connections is large, the pressure received by the entire substrate is large, and there is a problem that the substrate warps.

When connecting the wiring board to the outside, it is necessary to realize a connection through which at least three kinds of potentials of signal, power supply and ground are passed. When connecting via pins, a large number of pins are assigned to the power and ground connections, and only 30% to 50% of the total number of pins can be assigned due to signal connections.

An object of the present invention is to provide a wiring board having a structure capable of connecting more signals of the wiring board to the outside.

Another object of the present invention is to provide a wiring board having a structure that facilitates repair.

Still another object of the present invention is to provide a wiring board which can connect more signals on the wiring board to the outside and which can stop crosstalk between signals.

Another object of the present invention is to provide a wiring board having a power supply bus with reduced electric resistance.

[0010]

A first wiring board of the present invention is provided with signal pins arranged as pins of only one kind on one of the front surface and the back surface of the board and on the side surface of the board. And an end surface electrode for power supply and an end surface electrode for grounding arranged on the side surface of the substrate.

In addition to the first wiring board, the second wiring board of the present invention is arranged on a surface different from the mounting surface of the first wiring board and electrically connected to the signal pins of the first wiring board. Signal protrusions (hereinafter referred to as signal solder bumps).

A third wiring board of the present invention is provided with a power supply protrusion (hereinafter referred to as a power supply solder bump) arranged on either one of the front surface and the back surface of the board, and is formed inside the board. A power supply layer electrically connected to the power supply solder bump and a power supply end face electrode disposed on a side surface of the substrate and electrically connected to the power supply layer are included.

A fourth wiring board of the present invention is formed inside a grounding protrusion (hereinafter, a soldering bump for grounding) arranged on either one of the front surface and the back surface of the board. The grounding layer includes a grounding layer electrically connected to the grounding solder bump, and a grounding end surface electrode disposed on a side surface of the substrate and electrically connected to the grounding layer.

A fifth wiring board of the present invention is such that a power supply solder bump disposed on either one of the front surface and the back surface of the board and a power supply solder bump formed inside the board are electrically connected to each other. Electrically connected to the power source layer, a power source end face electrode disposed on the side surface of the substrate and electrically connected to the power source layer, and disposed on the same surface as the power source solder bump placement surface of the substrate. Grounding solder bumps, a ground layer formed inside the substrate and electrically connected to the grounding solder bumps, and a grounding layer disposed on a side surface of the substrate and electrically connected to the ground layer. And an end face electrode.

A sixth wiring board of the present invention is a board having a power supply layer and a ground layer, a power supply end surface electrode which is installed on a side surface of the board and electrically connected to the power supply layer, and a side surface of the board. And a grounding end surface electrode electrically connected to the ground layer, a power supply solder bump disposed on the surface of the substrate and electrically connected to the power supply layer, and disposed on the surface of the substrate. Soldering bumps for grounding electrically connected to the grounding layer, soldering bumps for signals arranged on the front surface of the substrate, and signal pins arranged on the back surface of the substrate and connected to the protruding portions for signals. including.

A seventh wiring board of the present invention is a board on which the first wiring board is mounted on either one of the front surface and the back surface, and the same surface as the mounting surface of the first wiring board on this board. And a power supply bus electrically connected to the power source end surface electrode of the first wiring board, and the first wiring mounted on the same surface of the board as the mounting surface of the first wiring board. A ground bus electrically connected to the grounding end surface electrode of the substrate.

An eighth wiring board of the present invention has a board on which the second wiring board is mounted on either the front surface or the back surface, and a board on which the second wiring board is mounted on the same surface. And a power supply bus electrically connected to the power supply end face electrode of the second wiring board and the same surface as the mounting surface of the second wiring board of the board, A ground bus electrically connected to the grounding end electrode is included.

A ninth wiring board of the present invention has a power supply bus mounted on the back surface of the board and a power supply end surface electrode mounted on the back surface of the board and electrically connected to the power supply bus. A fifth or sixth wiring board, a power supply layer electrically connected to the power supply solder bumps of the third, fifth or sixth wiring board, and the power supply layer mounted on the surface of the board. And a semiconductor circuit or LSI electrically connected to.

A tenth wiring board of the present invention is a fourth wiring board having a ground bus mounted on the back surface of the board and the grounding end surface electrode mounted on the back surface of the board and electrically connected to the power supply bus. , The fifth or sixth wiring board, and the fourth,
A ground layer electrically connected to the grounding solder bumps of the fifth or sixth wiring board, and a semiconductor circuit or LSI mounted on the surface of the board and electrically connected to the ground layer
Including and

An eleventh wiring board of the present invention is a board having a second or sixth wiring board mounted on the back surface thereof, and a signal soldering of the second or sixth wiring board formed inside the board. It includes a wiring layer electrically connected to the bump and a semiconductor circuit or LSI electrically connected to the wiring layer and mounted on the surface of the substrate.

A twelfth wiring board of the present invention is a board including a plurality of signal pins arranged on either one of a front surface and a back surface of the board, a grounding pin arranged between the plurality of signal pins, and the board. Power source end face electrodes disposed on both side faces of the.

A thirteenth wiring board of the present invention is arranged on a surface different from the mounting surface of the twelfth wiring board and is electrically connected to the plurality of signal pins of the twelfth wiring board. Of the signal soldering bump and the soldering pad for grounding, which is arranged on the same surface as the mounting surface of the plurality of signal soldering bumps of the substrate, and is electrically connected to the grounding pin of the twelfth wiring substrate. Including bumps.

A fourteenth wiring board of the present invention is a power supply solder bump arranged on the surface of the board, a power supply layer formed inside the board, and at least one of the boards connected to the power supply layer. End face electrodes for power supply arranged on the side surface of the
Signal solder bumps arranged on the surface of the board, a plurality of signal pins electrically connected to the signal solder bumps and arranged on the back surface of the board, and grounding solder arranged on the surface of the board Bumps and grounding pins electrically connected to the grounding solder bumps and arranged on the back surface of the substrate.

A fifteenth wiring board of the present invention is a board on which a twelfth or fourteenth wiring board is mounted on either one of the front surface and the back surface, and the twelfth or fourteenth board of this board.
And a power supply bus mounted on the same surface as the mounting surface of the wiring board and electrically connected to the power source end surface electrode of the twelfth or fourteenth wiring board.

A sixteenth wiring board of the present invention has a power supply bus disposed on the back surface of the board and a thirteenth power supply end surface electrode mounted on the back surface of the board and electrically connected to the power supply bus. Alternatively, the fourteenth wiring board, the power supply layer electrically connected to the power supply solder bumps of the thirteenth or fourteenth wiring board, and the grounding solder bumps of the thirteenth or fourteenth wiring board. An electrically connected ground layer, a signal layer electrically connected to the signal solder bumps of the thirteenth or fourteenth wiring board, the power supply layer, the ground layer, and And a semiconductor circuit or LSI electrically connected to the signal layer.

[0026]

An embodiment of the present invention will now be described in detail with reference to the drawings.

Referring to FIG. 1, a first embodiment of the present invention is directed to a ceramic substrate 18, a signal solder bump 11 formed on the surface of the ceramic substrate 18 at a pitch of 1.27 mm, and a ground solder bump. 12, solder bumps 13 for power supply, 2.54 mm on the back surface of ceramic substrate 18
Input / output signal pins 19 and substrate 1 formed at a pitch
8 includes a power source end face electrode 16 and a ground end face electrode 17. Inside the ceramic substrate 18, a ground layer 14 and a power supply layer 15 are formed.
The signal solder bumps 11 formed on the front surface of the ceramic substrate 18 and the input / output signal pins 19 formed on the rear surface of the ceramic substrate 18 are electrically connected. Also,
The power source end face electrode 16 formed on the side surface of the ceramic substrate 18 is electrically connected to the power source layer 15 inside the substrate and the power source solder bumps 13 formed on the surface of the substrate 18. Grounding end surface electrode 17 formed on the side surface of the substrate 18.
Are electrically connected to the ground layer formed inside the substrate and the bumps 12 for soldering for grounding. In the first embodiment of the present invention, not only the power source end electrode 16 but also the ground end electrode 17 is provided as the end electrode. Therefore, the first embodiment of the present invention has an effect that the number of signal pins 19 can be maximized.

Next, a modification of the first embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 2, a modification of the first embodiment of the present invention is a mounting structure using the pin carrier 24 according to the first embodiment of the present invention.

Inside the ceramic substrate 28, the power supply layer 2
1, a ground layer 22 and a wiring layer 23. On the surface of the ceramic substrate 28, soldering signal pads for LSI mounting, soldering power supply pads, and soldering ground pads (both not shown) are formed. Further, a large scale integrated circuit (hereinafter referred to as LSI) 20 is mounted on the surface of the ceramic substrate 28. A pad (not shown) for mounting the carrier with pin 24 is formed on the back surface of the ceramic substrate 28, and the carrier with pin 24 is further mounted. A ground bus 26 and a power supply bus 27 are installed between a certain pinned carrier 24 and another pinned carrier 24. The grounding bus 26 is the grounding end face electrode 1 of the carrier 24 with a pin.
7, the power source bus 27 is connected to the power source end face electrode 16 of the pin carrier 24.

In the modified example of the first embodiment, each LSI is
20 connected to the wiring layer 23 inside the ceramic substrate 28. Input / output signals are soldered signal pads (not shown) formed on the surface of the ceramic substrate 28 between the LSI 20 and the outside, and signal solder bumps (formed on the surface of the wiring layer 23 pin carrier 24). 1) in FIG. 1, the signal is transferred via the input / output signal pin 19 formed on the back surface of the pin carrier 24.

The power supply potential is supplied from the power supply bus 27 to the LSI 20.
On the other hand, the power source end face electrode (16 in FIG. 1) formed on the side surface of the pinned carrier 24, the power supply layer (15 in FIG. 1) formed inside the pinned carrier 24, and the surface of the pinned carrier 24 Solder bump for power supply (13 in Fig. 1),
It is supplied via the power supply layer 21 inside the ceramic substrate 28 and the soldering power supply pad (not shown) formed on the surface of the ceramic substrate 28.

The ground potential is a soldering ground pad (not shown) formed on the surface of the ceramic substrate 28 between the LSI 20 and the ground bus 26, the ground layer 22 formed inside the ceramic substrate 28, and a carrier with pins. Solder bumps for grounding (12 in FIG. 1) formed on the surface of 24, a ground layer (14 in FIG. 1) formed inside the carrier with pins 24, and grounding formed on the side surfaces of the carrier with pins 24 It is sent through the end face electrode (17 in FIG. 1).

In a modification of the first embodiment of the present invention, the LS
Input / output signals to / from the I20 are performed via the signal pin 25 of the pinned carrier 24, and the power supply potential and the ground potential to the LSI 20 are end face electrodes (16 and 17 in FIG. 1) formed on the side surface of the pinned carrier 24. Since it is supplied via the, there is an effect that the pin allocation for input / output signals increases. This modification also has an effect that if the signal pin 19 is damaged due to an unexpected accident, the pin carrier 24 can be replaced for repair.

Next, a second embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 3, the second embodiment of the present invention is directed to a ceramic substrate 18, signal solder bumps 11 formed on the surface of the ceramic substrate 18 at a pitch of 1.27 mm, and grounding solder bumps. 12, the power supply solder bumps 13, the input / output signal pins 19 formed on the back surface of the ceramic substrate 18, and the input / output signal pins 19
And a grounding pin 30 disposed between and a power source end face electrode 36 formed on the side surface of the ceramic substrate 18. The arrangement interval between the input / output signal pin 19 and the ground pin 30 formed on the back surface of the ceramic substrate 18 is preferably 2.54 mm pitch. A ground layer 14 and a power supply layer 15 are formed inside the ceramic substrate 18. The signal solder bumps 11 formed on the front surface of the ceramic substrate 18 and the input / output signal pins 19 formed on the rear surface of the ceramic substrate 18 are electrically connected. The grounding solder bumps 12 formed on the front surface of the ceramic substrate 18 and the grounding pins 30 formed on the back surface of the ceramic substrate 18 are electrically connected via the grounding layer 14.
The pin 30 and the bump 12 may be directly connected without the ground layer 14. The power source end face electrodes 36 formed on the side surfaces of the ceramic substrate 18 are electrically connected to the power source solder bumps 13 formed on the surface of the substrate 18 via the power source layer 15 inside the substrate. In the second embodiment of the present invention, by arranging the grounding pin 30 between the signal pins 19, it is possible to prevent so-called crosstalk between adjacent signal pins 19. .

Next, a modification of the second embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 4, a modification of the second embodiment of the present invention is a mounting structure using the pin carrier 44 according to the second embodiment of the present invention.

Inside the ceramic substrate 28, the power supply layer 2
1, a ground layer 22, and a wiring layer 23. On the surface of the ceramic substrate 28, soldering signal pads for LSI mounting, soldering power supply pads, and soldering ground pads (both not shown) are formed. Further, the LSI 20 is mounted on the surface of the ceramic substrate 28. On the back surface of the ceramic substrate 28, a pin-equipped carrier 44 mounting pad (not shown) is formed, and the pin-equipped carrier 44 is further mounted. Only the power supply bus 47 is installed between a certain pinned carrier 44 and another pinned carrier 44. The power supply bus 47, which is one of the features of the modification of the second embodiment, is connected to the power supply end face electrodes 36 at both ends of the pinned carrier 44. This power bus 47
The cross-sectional area of the power supply bus 2 in the modification of the first embodiment is
It is desirable that the cross section area of the power bus 7 is more than twice as large as that of the power bus 4.
The cross-sectional area of 7 is at least larger than that of the power bus 27.

In the modification of the second embodiment, each LSI is
20 is connected to the wiring layer 23 inside the ceramic substrate 28. Input / output signals are soldered signal pins (not shown) formed on the surface of the ceramic substrate 28 between the LSI 20 and the outside, and signal solder bumps (11 in FIG. 3) formed on the surface of the carrier 44 with pins. ), And is transmitted and received through the input / output signal pin 19 formed on the back surface of the pin carrier 44.

The power supply potential is from the power supply bus 47 to the LSI 20. The power supply end face electrode 36 is formed on the side surface of the pinned carrier 44, the power supply layer (15 in FIG. 3) formed inside the pinned carrier 44, and the pinned carrier. Power supply solder bumps (13 in FIG. 3) formed on the surface of the carrier 44, the power supply layer 21 inside the ceramic substrate 28, and the ceramic substrate 28.
Is provided via a soldering power supply pad (not shown) formed on the surface of the.

The ground potential is a soldering ground pad (not shown) formed on the surface of the ceramic substrate 28 between the LSI 20 and the ground pin 30, the ground layer 22 inside the ceramic substrate 28, and the surface of the pin carrier 44. The solder bumps for grounding (12 in FIG. 3) formed on the surface, the grounding layer (14 in FIG. 3) formed inside the pinned carrier 44, and the grounding pin 30 formed on the back surface of the pinned carrier 44. Sent through.

In the modification of the second embodiment of the present invention, since the cross-sectional area of the power supply bus 47 is made large, the electric resistance can be small, and it is possible to prevent the power supply voltage from decreasing.
Further, compared with the bus structure of the modification of the first embodiment, the structure is simple and the structure is easy. further,
In the modification of the second embodiment, power is supplied to the LSI 20 via the power supply end surface electrode 36 on the side surface of the pinned carrier 44, so that there is an effect that the number of input / output signal pins can be increased. . In this modified example, if the signal pin 19 is damaged due to an unexpected accident, the pin-equipped carrier 44 can be replaced for repair.

[0044]

According to the present invention, since the power supply and / or the ground connection is made by the end surface electrodes on the side surface of the carrier with pins, there is an effect that the signal allocation to the pins can be increased more than before. Further, there is an effect that the pin can be easily repaired by exchanging the pin carrier of the present invention.

[Brief description of drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a modification of the first embodiment of the present invention.

FIG. 3 is a diagram showing a second embodiment of the present invention.

FIG. 4 is a diagram showing a modification of the second embodiment of the present invention.

[Explanation of symbols]

 11 Signal Soldering Bump 12 Grounding Solder Bump 13 Power Supply Soldering Bump 14,22 Ground Layer 15,21 Power Supply Layer 16,36 Power Supply End Face Electrode 17 Grounding End Face Electrode 18,28 Ceramic Substrate 19 Input / Output Signal Pin 20 LSI 23 Wiring Layer 24 Carrier with Pin 26 Ground Bus 27, 47 Power Bus 30 Ground Pin

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 23/12 NL

Claims (4)

[Claims] 1. A signal pin arranged as a pin of only one kind on either one of the front surface and the back surface of a substrate, a power source end surface electrode arranged on a side surface of the substrate, and a signal pin arranged on a side surface of the substrate. And a grounding end face electrode. 2. A board on which the wiring board according to claim 1 is mounted on either one of a front surface and a back surface, and the board is mounted on the same surface as the mounting surface of the wiring board according to claim 1.
The power supply bus electrically connected to the power supply end surface electrode of the wiring board according to claim 1, and the same mounting surface of the wiring board according to claim 1 of the board, And a ground bus electrically connected to a grounding end face electrode of the wiring board. 3. A plurality of signal pins arranged on either one of the front surface and the back surface of the board, a grounding pin arranged between the plurality of signal pins, and a power supply arranged on both side surfaces of the board. A wiring substrate including an end face electrode for use. 4. A board on which the wiring board according to claim 3 is mounted on either one of a front surface and a back surface, and the board is mounted on the same surface as the mounting surface of the wiring board according to claim 3. 4. The wiring board according to claim 3, further comprising: a power supply bus electrically connected to the power supply end face electrode of the wiring board.