JPH07250334A - Digital convergence device - Google Patents

Abstract

PURPOSE:To obtain a digital convergence device in which highly accurate correction is applicable to an input signal with a high horizontal scanning frequency in the device correcting convergence of a color television receiver. CONSTITUTION:Even when a signal with a high horizontal scanning frequency is received, a frequency detection section 23 detects the horizontal scanning frequency and a D/A converter control section 24 controls a reference voltage of a D/A converter 11. Thus, the amplitude of corrected data is increased to keep a current outputted from an output amplifier section 16 constant.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for correcting the convergence of a color television receiver, and more particularly to a digital convergence apparatus which can cope with various signal sources.

[0002]

2. Description of the Related Art Generally, in a projection type color image receiver for magnifying and projecting on a screen by using three projection tubes which emit three primary colors, the incident angles of the projection tubes with respect to the screen are different for each projection tube. Therefore, color shift occurs on the screen. The superposition of these three primary colors, or so-called convergence, takes a method in which a convergence correction waveform is created in an analog manner in synchronization with the horizontal and vertical scanning periods, and the size and shape of this waveform are adjusted for adjustment. However, there is a problem in terms of convergence accuracy. Therefore, as a method capable of handling various signals and having high convergence accuracy, for example, Japanese Patent Laid-Open No.
A digital convergence device of 0-130288 is proposed.

The conventional digital convergence device will be described below. FIG. 8 shows a block diagram of a conventional digital convergence device. This displays a convergence correction pattern such as a crosshatch pattern as shown in FIG. 9 on the screen, and digitally writes the convergence correction amount data for each adjustment point A, B, C, D to the frame memory. , Read this data D / A
The conversion is performed to perform convergence correction.

In FIG. 8, 1 is a read address control unit, 2 is a crosshatch generator, 3 is a video circuit, 4 is a write address control unit, 5 is a control panel, 6 is a reversible counter, 7 is a multiplexer, and 8 is a frame. Memory, 9 is a register, 10 is a vertical adjustment point processing unit, 1
1 is a D / A converter, 12 is an LPF, 13 is a scanning line number detection unit, 14 is an adjustment point number setting unit, 15 is a coefficient calculation unit, 16
Is an output amplifier, and 17 is a deflection circuit.

The operation of the digital convergence circuit configured as described above will be described below. In FIG. 8, a horizontal / vertical cycle pulse synchronized with the deflection current cycle is added as a sync signal 20 to drive the read address controller 1. Read address control unit 1
The crosshatch generator 2 is driven by using the pulse from, and the crosshatch pattern is displayed on the projection screen by the video circuit 3. On the other hand, the address key of the control panel 5 is used to specify a cross point (for example, point A in FIG. 9) at a position where convergence correction is required, and the position address is set in the write address control unit 4. Next, the correction amount is written in the frame memory 8 through the reversible counter 6 while looking at the screen with a data writing key of a color to be corrected, for example, a red data writing key provided on the control panel 5. Normally, the multiplexer 7 controls the switching so that the writing to the frame memory 8 is performed during the blanking period of the video signal. Therefore, reading is not impaired.

In this way, the same operation is performed at each of the adjustment points B, C and D. Next, the reading of the frame memory 8 is performed by the read address control unit 1 for each adjustment point position on the screen, and through the register 9 driven by the read address control unit 1, the vertical adjustment point processing unit. At 10, the correction amount process in the vertical scanning direction between the adjustment points is performed. In order to deal with various signal sources, it is necessary to perform the inter-adjustment point processing according to the number of scanning lines. Therefore, the synchronization signal 20 is transmitted to the scanning line number detection unit 13
The number of scanning lines in one field is detected and added to the adjustment point number setting unit 14. In the number-of-adjustment-points setting unit 14, the number M of scanning lines in one field and the number L of adjustment points in the vertical direction are set.
From N = M / (L + 1) number of scanning lines between the adjustment points
Is calculated and added to the coefficient calculation unit 15. In addition to the write address control unit 4 and the read address control unit 1, N
The operation is switched to each book.

The output of the vertical adjustment point processing unit 10 operating as described above is input to the D / A converter 11, where a signal converted into an analog amount is obtained. The signal between the adjustment points in the horizontal direction is smoothed by a low-pass filter (hereinafter referred to as LPF) 12 for the correction amount of the adjustment points in each row, amplified by an output amplification section 16, and then supplied to a convergence yoke 18. . Further, the detection signal from the scanning line number detection unit 13 is applied to the deflection circuit 17 as a system switching signal to switch the deflection amplitude and frequency. In this way, since it is possible to independently correct each signal source for each adjustment point, it is possible to accurately perform convergence correction.

[0008]

However, in the above-mentioned conventional configuration, the convergence adjustment can be accurately adjusted for each signal source with a low horizontal scanning frequency, but with the signal source with a high horizontal scanning frequency. Since the output amplifier is a large current amplifier circuit, the gain cannot be obtained and the correction amount of digital convergence becomes insufficient.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned conventional problems, and an object thereof is to provide a digital convergence apparatus capable of supporting various signal sources from a low horizontal scanning frequency signal to a high horizontal scanning frequency signal.

[0010]

In order to solve the above-mentioned problems, the digital convergence apparatus according to the first means of the present invention is a D / A converter based on the means for detecting the horizontal scanning frequency and the detected data. And a means for controlling the reference potential and the gain.

In order to solve the above-mentioned problems, the digital convergence apparatus according to the second means of the present invention reads out from the frame memory in synchronization with the input signal by means for detecting the horizontal scanning frequency and the detected data. Means for converting the correction data are provided.

[0012]

According to the present invention, the input horizontal scanning frequency is increased and the input horizontal scanning frequency is increased by discriminating the input horizontal scanning frequency and controlling the reference voltage and the gain of the D / A converter. Even if the gain becomes low, the correction amount of the output digital convergence can be secured, and stable and highly accurate correction can be realized.

Further, according to the present invention, the horizontal scanning frequency to be inputted is discriminated by the above-mentioned constitution, the correction data read from the frame memory in synchronization with the synchronizing signal is converted, and D
By controlling the amplitude of the output signal of the A / A converter, even if the input horizontal scanning frequency becomes high and the gain of the output amplifier becomes low, the correction amount of the digital convergence output can be secured, and stable and highly accurate correction can be performed. Can be realized.

[0014]

【Example】

(Embodiment 1) Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. 1 to 3 are block diagrams of a digital convergence device according to a first embodiment of the present invention. FIG. 1 is a diagram showing a configuration of a digital convergence device according to an embodiment.

In FIG. 1, reference numeral 21 is an address control unit for controlling the reading and writing of the memory, 22 is a vertical operation circuit for performing an operation between adjustment points in the vertical direction, and 23.
Is a frequency detector for detecting the horizontal scanning frequency, and 24 is D /
It is a D / A control unit that controls the reference voltage of the A converter.

FIG. 2 is a diagram showing a gain control device 24 for controlling the reference voltage value of the D / A converter 11 in the digital convergence device. In FIG. 2, 22 is a calculation between adjustment points in the vertical direction. Vertical arithmetic circuit for performing
Reference numeral 23 is a frequency detection unit that detects the horizontal scanning frequency, 25 is a reference voltage calculation unit that calculates a reference voltage based on the horizontal scanning frequency data, and 26 is a reference voltage generation unit that outputs the reference voltage of the D / A converter. is there.

FIG. 3 is a diagram showing, as another configuration example, a gain control device 24 for controlling the gain of an analog correction signal in a digital convergence device by a lower gain amplifier. In FIG. 3, 22 is a vertical adjustment. A vertical operation circuit for performing point-to-point operation, 23 a frequency detection unit for detecting a horizontal scanning frequency, 27 a gain determination unit for determining the gain of an amplifier based on horizontal scanning frequency data, and 28 controls a multiplexer. Switching control unit, 29 is a multiplexer, 30 is an operational amplifier, 31,
32 is a resistance.

FIG. 4 shows an operation waveform diagram of the digital convergence device according to the first embodiment of the present invention, and FIGS. 5 and 6 show characteristic diagrams thereof. In FIGS. 1 to 3, components operating in the same manner as in the conventional example shown in FIG.

The operation of the digital convergence device of the present embodiment constructed as above will be described below. In FIG. 1, the synchronizing signal 20 is input, and the address control unit 21 generates a read address signal of the frame memory 8 synchronized with the synchronizing signal 20 and also generates a crosshatch generator address signal of the crosshatch generator 2. A crosshatch pattern (not shown) having 13 rows in the horizontal direction and 9 columns in the vertical direction is generated and displayed on the screen.

The frame memory 8 stores data at the intersections of the crosshatch signals. The data from the frame memory 8 is supplied to the vertical operation circuit 22 to create correction data corresponding to each scanning line between adjustment points which is not stored in the frame memory 8. The D / A converter 11 converts the calculated data from the vertical calculation circuit 22 into an analog amount to create a corrected waveform. The D / A converted correction waveform is a low-pass filter (hereinafter referred to as LPF) 12
And is subjected to horizontal correction data smoothing. The smoothed correction data from the LPF 12 is supplied to the output amplification section 16 for driving the convergence yoke 18, and the current is amplified.

The frequency detector 23 detects the horizontal scanning frequency of the synchronizing signal, and the D / A controller 24 determines the reference voltage of the D / A converter 11 according to the horizontal scanning frequency detected by the frequency detector 23. And control the gain. By increasing the amplitude of the correction waveform output from the D / A converter 11 by this control, the amplitude of the output current generated in the convergence yoke 18 is increased even if the horizontal scanning frequency is increased and the gain of the output amplifier 16 is decreased. Is kept constant and the correction amount of the output digital convergence is kept constant.

Next, the operation waveform diagram of FIG. 4 will be used to describe in detail the D / A control method in the D / A control section 24. In the following, the horizontal scanning frequency is 33.75 KHz (hereinafter referred to as f _H1 ) and 67.50 KHz to make the explanation easier to understand.
The description will be made with two frequencies (hereinafter referred to as f _H2 ).

In FIG. 4, (a) is a horizontal crosshatch signal, and (b) is D when the horizontal scanning frequency is f _H1.
Voltage waveform of the signal output from the / A converter 11, (c)
Is a current waveform generated in the convergence yoke by the signal, (d) is a voltage waveform of the signal output from the D / A converter 11 when the horizontal scanning frequency is f _H2 , and (e) is a voltage waveform in the convergence yoke by the signal. The generated current waveform is shown.

Here, an example of the D / A control means shown in claim 2 will be described below. In FIG. 2, when the horizontal scanning frequency f _H1 is input to the synchronizing signal 20, the frequency detecting unit 23 detects the horizontal scanning frequency f _H1, and from this detection result, the reference voltage calculating unit 25 causes the D / A converter 11 to detect the horizontal scanning frequency f _H1 . The reference voltage value Ref1 of the D / A converter is calculated so that the output signal has the amplitude shown in the characteristic diagram of FIG. The reference voltage value Ref ₁ is generated by the reference voltage generator 26 and supplied to the D / A converter 11 to obtain a correction waveform having the amplitude Y of V1 in FIG. 4B. This correction waveform is used for LPF12
Then, the output amplification section 16 drives the convergence yoke 18 to obtain an output current waveform (I1) shown in FIG. 4C.

Next, the horizontal scanning frequency f _{H1 is applied} to the synchronizing signal 20.
When the frequency f _{H2 that} is twice the frequency f _H2 is input, the horizontal scanning frequency is detected as f _H2 by the frequency detection unit 23, and based on this detection result, the reference voltage calculation unit 25 outputs the output signal of the D / A converter 11 as shown in FIG. Ref2 having a higher voltage than Ref1 is calculated as the reference voltage value of the D / A converter 11 so as to have the amplitude X shown in the figure. This reference voltage value Ref ₂ is generated by the reference voltage generator 26 and is supplied to the D / A converter 11, so that the correction waveform when the horizontal scanning frequency is f _H1 is (Ref2 / Ref1) times that in FIG.
A correction waveform having the amplitude of V2 in (d) is obtained. This correction waveform is smoothed in the horizontal direction by the LPF 12, the convergence yoke 18 is driven by the output amplifier 16, and the output current waveform (I2 = I1) having the same amplitude as that of FIG. ) Get. As described above, the reference voltage value of the D / A converter 11 is controlled so that the amplitude of the output current waveform becomes constant even if the horizontal scanning frequency changes.

Further, another example of the D / A control means shown in claim 3 will be described. The difference from the D / A control means is that the D / A control is configured to control the gain for amplifying the output of the D / A converter 11 according to the horizontal scanning frequency. In FIG. 3, the frequency detection unit 23 detects the horizontal scanning frequency, and the gain determination unit 27 detects the horizontal scanning frequency.
The gain to be amplified by the operational amplifier 30 is calculated so that the output amplitude of 1 becomes the amplitude of FIG. 5 according to the horizontal scanning frequency. Based on this calculation result, the multiplexer 29 is switched via the switching control unit 28, the gain of the operational amplifier 30 is changed by changing the resistance value of the resistor 31, the horizontal scanning frequency becomes high, and the gain of the convergence output increasing circuit 16 becomes low. Also, the amplitude of the output current waveform generated in the convergence yoke 18 is kept constant by increasing the amplitude of the D / A converted signal. As described above, the amplitude of the output of the D / A converter 11 is controlled so that the amplitude of the output current waveform becomes constant even if the horizontal scanning frequency changes.

Next, the relationship between the frequency characteristic of the output amplifier 16, the frequency characteristic of the smoothing LPF of the horizontal correction data, and the reference voltage value of the D / A converter will be described. The solid line in FIG. 6 shows the frequency characteristic of the output amplifier 16, the dashed line indicates the horizontal scanning frequency f _H2 (67.50 KHz), and the dashed line indicates the horizontal scanning frequency f _H1 (3
The frequency characteristic of the LPF 12 for band limitation for smoothing the correction data at the time of 3.75 KHz) is shown. As can be seen from the characteristics of FIG. 6, the output amplifying section 16 has a convergence yoke 18
Since it drives the inductance load of, the frequency characteristic of the low pass filter is obtained.

Further, in a state having such an output characteristic,
The horizontal scanning frequency becomes high like f _H2 , and the cutoff point (f of the frequency of the LPF for band limitation for smoothing the correction data (f
2) becomes higher than the cut-off point (fx) of the output amplifier circuit 16, the amplitude of the output current becomes low, so that FIG.
As shown in, the amplitude of the output of the D / A converter 11 is increased to keep the amplitude of the current output to the convergence yoke 18 constant.

As described above, according to the present embodiment, even if the horizontal scanning frequency of the input signal becomes high and the gain of the output amplifier 16 is lowered, the reference potential and the gain of the D / A converter 11 are controlled. By doing so, it is possible to secure a correction amount for the digital convergence, and it is possible to realize highly accurate correction with stable operation.

Although an amplifier in which the gain by the operational amplifier and the resistance changes stepwise has been described as an embodiment of claim 3, the present invention can be realized even if an analog type gain variable amplifier in which the gain continuously changes is adopted. Needless to say, the same effect cannot be obtained without changing the gist of.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings. FIG. 7 is a block diagram of a dynamic convergence device according to the second embodiment of the present invention. The first difference from the configuration of the embodiment is that the amplitude control of correction data for digital convergence is realized by converting digital data.

In FIG. 7, 33 is a conversion coefficient calculation unit for calculating a coefficient for converting the correction data by k times, 34 is a conversion coefficient generation unit for outputting the calculated conversion coefficient, and 35 is read from the frame memory 8. It is a data conversion unit that multiplies the corrected data by a conversion coefficient. In FIG. 7, components performing the same operations as those in FIG. 1 showing the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

The operation of the digital convergence device of the present embodiment constructed as above will be described below. In FIG. 7, a synchronizing signal 20 is input, and the address control unit 21 generates a read address signal of the frame memory 8 synchronized with the synchronizing signal 20 and also generates a crosshatch generator address signal of the crosshatch generator 2. For example, a cross hatch pattern (not shown) having 13 rows in the horizontal direction and 9 columns in the vertical direction is generated and displayed on the screen. The frame memory 8 stores data at the intersections of the crosshatch signals.

Here, the frequency detecting section 23 detects the horizontal scanning frequency and supplies it to the conversion coefficient calculating section 33 to calculate the multiplication coefficient of the correction data. The calculated multiplication coefficient k is supplied from the conversion coefficient generator 34 to the data conversion circuit 35, and is multiplied by the correction data read from the frame memory 8. The multiplied data is supplied to the vertical arithmetic circuit 22 to create correction data corresponding to each scanning line between adjustment points which is not stored in the frame memory 8.

The D / A converter 11 converts the calculated data from the vertical calculation circuit 22 into an analog amount to create a corrected waveform. This D / A converted correction waveform is LPF1.
2 and the correction data in the horizontal direction are smoothed. Output amplifier circuit 16 for driving the convergence yoke 18 with the smoothed correction data from the LPF 12.
Is supplied to and is amplified in current.

Here, when the horizontal scanning frequency of the synchronizing signal becomes high, the multiplication coefficient for converting the correction data from the frame memory 8 becomes large, and the amplitude of the correction waveform outputted from the D / A converter 11 becomes large. To control. By this control, even if the horizontal scanning frequency of the synchronizing signal becomes high and the gain of the output amplifying section 16 becomes low, the correction amount of the output digital convergence can be secured, and the amplitude of the current generated in the convergence yoke 18 can be kept constant.

As described above, according to this embodiment, the horizontal scanning frequency of the input signal is increased and the output amplifier 16
Even if the gain of P is decreased, by controlling the multiplication coefficient for converting the correction data from the frame memory 8 by the horizontal scanning frequency, it is possible to secure the correction amount of the digital convergence, and the stable operation can be performed with high accuracy. realizable.

In the first and second embodiments,
Although the projection type color image receiver has been described for easy understanding, it goes without saying that the shadow mask type direct view image receiver is also effective.

In the first and second embodiments,
When the horizontal scanning frequency becomes high, the output amplitude of the D / A converter 11 is increased. However, when the horizontal scanning frequency becomes low, the output amplitude of the D / A converter 11 may be decreased. .

Further, in the first embodiment, the amplitude control of data is performed by the output of the D / A converter 11, but it may be performed by the output amplifying section 16.

Although the correction data output from the frame memory 8 is converted in the second embodiment, the correction data input to the frame memory 8 may be converted.

[0042]

As described above, according to the present invention, the amplitude of the output from the D / A converter is increased by controlling the reference voltage and the gain of the D / A converter according to the input horizontal scanning frequency. As a result, even if the input horizontal scanning frequency becomes high and the gain of the output amplifier becomes low, the correction amount of the output digital convergence can be secured, and stable and highly accurate correction can be realized.

The amplitude of the output signal of the D / A converter is increased by controlling the conversion coefficient of the correction data read from the frame memory in synchronization with the input signal according to the input horizontal scanning frequency. Even if the horizontal scanning frequency becomes high and the gain of the output amplifying unit becomes low, the correction amount of the output digital convergence can be secured, and stable and highly accurate correction can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital convergence device according to a first embodiment of the present invention.

FIG. 2 shows D / in the digital convergence device.
Block diagram of a gain control device for controlling the reference voltage value of the A converter

FIG. 3 is a block diagram of a gain control device that controls the gain of an analog correction signal in the digital convergence device by a variable gain amplifier.

In [4] the digital convergence apparatus, (a) a current waveform diagram of the convergence yoke when cross waveform diagram of the hatch signal (b) the voltage waveform of the D / A converter when the f _H1 (c) f _H1 (d) D / a converter voltage waveform diagram when the f _H2 (e) f _H2 current waveform diagram of a convergence yoke when the

FIG. 5 is an output gain characteristic diagram of the D / A converter of the digital convergence device.

FIG. 6 is a frequency characteristic diagram of an output amplifier of the digital convergence device.

FIG. 7 is a block diagram of a digital convergence device according to a second embodiment of the present invention.

FIG. 8 is a block diagram of a conventional digital convergence device.

FIG. 9 is a diagram of a display screen for explaining the operation of the device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 read address control unit 2 cross hatch generator 3 video circuit 4 write address control unit 5 control panel 6 reversible counter 7 multiplexer 8 frame memory 9 register 10 vertical adjustment point processing unit 11 D / A converter 12 LPF 13 scanning line Number detection unit 14 Number of adjustment points setting unit 15 Coefficient calculation unit 16 Output amplification unit 17 Deflection circuit 18 Convergence yoke 19 Deflection coil 20 Synchronous signal 21 Address control unit 22 Vertical operation circuit 23 Frequency detection unit 24 D / A control unit 25 Reference Voltage calculation unit 26 Reference voltage generation unit 27 Gain determination unit 28 Switching control unit 29 Multiplexer 30 Operational amplifiers 31, 32 Resistance 33 Conversion coefficient calculation unit 34 Conversion coefficient generation unit 35 Data conversion unit

Claims (4)

[Claims] 1. A means for generating a plurality of convergence adjustment points in a horizontal and vertical direction on a screen of a color television receiver to display a cursor, and correction data for each adjustment point in the screen are input to make each adjustment. Storage means for digitally storing the convergence correction amount of the point, reading means for reading the correction data from the storage means in synchronization with a synchronizing signal input to the receiver, and correction data read by the reading means Digital-analog conversion means for converting the digital signal into an analog signal, frequency detection means for detecting the frequency of the synchronizing signal, and control means for controlling the amplitude of the output of the digital-analog conversion means by the frequency detection means. Amplifies the correction data converted from the digital data to the analog signal under the control of the control means And a digital convergence device having means for supplying the correction coil. 2. The digital convergence device according to claim 1, wherein the control means controls the reference potential of the digital-analog conversion means. 3. The digital convergence device according to claim 1, wherein the control means controls the gain for amplifying the analog signal which has been digital-analog converted. 4. A means for generating a plurality of convergence adjustment points in the horizontal and vertical directions on a screen of a color television receiver and displaying the cursor, and inputting correction data of each adjustment point in the screen and inputting each adjustment point. Means for digitally storing the convergence correction amount, means for reading the correction data from the storage means in synchronization with a synchronizing signal input to the receiver, means for detecting the frequency of the input signal, and the frequency Means for converting the correction data read by the detecting means, means for vertically interpolating the converted correction data, means for converting the calculated data from digital to an analog signal, and the analog A digital convergence device comprising means for amplifying correction data converted into a signal and supplying the amplified correction data to a correction coil.