JPH0723423A - Digital video signal recording and reproducing device - Google Patents

Abstract

PURPOSE:To record/reproduce a video signal with high picture quality at a high recording efficiency by revising a compression block size for each compressed block. CONSTITUTION:A shuffling pattern generating circuit 40 switches a shuffling pattern designating the sequential extraction of a macro block from any of pattern positions in response to the inputted recording operation mode signal, picture data outputted from a shuffling circuit 33 in the unit of macro blocks are stored in a compressed block memory 34 by the predetermined number of macro blocks. The compressed block size differs from each operating mode and varies with the compression block even in the same operating mode. Then a compression block size generating circuit 41 switches the compression block size in response to a recording operation mode signal inputted from an input terminal 39 and a compression block number outputted from the shuffling circuit 33 to control the compression block memory 34 and a quantization parameter generating circuit 43.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital video signal recording / reproducing apparatus, and more particularly to a digital video signal recording / reproducing apparatus having a plurality of recording / reproducing modes.

[0002]

2. Description of the Related Art Conventionally, as a digital video signal recording / reproducing apparatus for compressing a video signal and recording it on a magnetic tape,
For example I E E Transactions
On Consumer Electronics Volume 35 Volume 3
Issue (August 1989) pp. 450-457 (IEEE Tra
nsactions on Consumer Electronics, Vol. 35, No.3
(August 1989), pp. 450-457), a digital VTR is known. The conventional digital VTR described above magnetically compresses a video signal of the current TV (1 frame total vertical lines = 525 lines, frame frequency = 29.97 frames / sec., Hereinafter referred to as 525/60 system). The recording is performed on a tape, and the recording signal is reproduced from the magnetic tape and the data is expanded to restore the video signal.

When a video signal is recorded using the above-mentioned conventional digital VTR, the input video signal is converted from an analog signal into digital image data by A / D conversion, and the image data is divided into 8 ×. Basic block consisting of 8 pixels (corresponding to DCT block described later)
To generate. Data is compressed by image coding processing including processing such as discrete cosine transform (DCT), quantization, and variable length coding using a basic block as a processing unit, and then data is modulated after adding an error correction code. Then, it is converted into a recording signal and recorded on the magnetic tape.
The recording signal is recorded along a track obliquely formed on the magnetic tape by the rotary head helically scanning the magnetic tape.

When the video signal recorded on the magnetic tape is reproduced as described above, the reproduced signal reproduced from the magnetic tape is demodulated to restore the recorded data, and the error correction code added at the time of recording is used. Then, the error is detected and the error is corrected when the error occurs. And further, variable length decoding,
Inverse quantization and inverse discrete cosine transform (ID
Data is expanded by image decoding processing including processing such as CT) to generate image data, and then the digital image data is converted to an analog video signal by D / A conversion and output.

In this case, the amount of data that can be recorded on the tape per unit time is constant, whereas the amount of information contained in the image data changes in accordance with the variation of the pattern for each frame or each partial area in the frame. To do. Therefore, in order to improve the recording efficiency of the image data on the tape,
For each compressed block (corresponding to a segment described later) composed of a fixed number of basic blocks, the amount of information is controlled to control the fineness of the quantization in the image encoding process to keep the amount of compressed data constant, The compressed data of one compressed block is recorded in one synchronization block. Here, the sync block is a basic input / output unit when recording / reproducing data to / from a magnetic tape, and error detection and error correction processing is performed in sync block units.

In the above description, the smaller the compressed block size, the easier the information amount control process in the image encoding process becomes, but the more easily the information amount control of the original image data is affected, the result of the information amount control becomes. In some cases, the image quality locally deteriorates significantly. Further, as the compression block size is increased, the influence of the fluctuation of the original information amount of the image data can be sufficiently eliminated and stable image quality can be obtained, but the information amount control processing becomes difficult. Therefore, the compressed block size is determined by a trade-off between the processing amount of information amount control and the image quality of the reproduced image.

By the way, in the above-mentioned conventional technique, only a video signal of the 525/60 system is data-compressed and recorded / reproduced on a magnetic tape. In addition to this, a digital VTR capable of supporting a plurality of kinds of video signals having different resolutions As a video recording system, there is a system described in European Patent Publication No. EP469861 (published on February 5, 1992). In this method, one frame is divided into an integer multiple of 27 (corresponding to the compression block described above) for a plurality of types of video signals, and then the compressed data amount is made constant in segment units. Then, after adding an error correction code to the compressed data of each segment, 27 segments are recorded per track for any type of video signal. The segment size is different depending on each video signal.

For example, in the case of recording a video signal of the 525/60 system, one frame composed of 720 pixels of effective area × 480 lines is divided into 10 × 27 segments and recorded in 10 tracks. . In this case, one segment is an aggregate of 30 basic blocks, 20 of which are basic blocks showing luminance signal data,
0 is a basic block showing the data of the color difference signal. Also, a high-definition TV = HDTV video signal (1 frame total vertical lines = 1125 lines, frame frequency = 30 frames / sec., Hereinafter referred to as 1125/60 system).
When recording is performed, effective area 1152 pixels × 108
One frame composed of 0 lines is divided into 20 × 27 segments and recorded on 20 tracks. One segment in this case is an aggregate of 45 basic blocks.

[0009]

However, in the above-mentioned conventional digital video signal recording / reproducing apparatus, 11
When recording a video signal of 25/60 system, although the number of effective display lines is originally 1035 lines, 1080 lines are recorded, so that the recording efficiency is lowered. was there.

Further, in the above case, the number of basic blocks showing the luminance signal and the number of basic blocks showing the color difference signal which constitute one unit of the compressed block are not constant. That is, since the basic blocks indicating the luminance signal and the color difference signals at the same position on the screen are divided into different compressed blocks and recorded, the generation of the encoding distortion for the luminance signal and the color difference signals becomes unbalanced. There is a problem that the image quality may be deteriorated in a part.

In order to suppress the deterioration of the image quality due to the above, by forming a compressed block in units of macro blocks, which is a set of basic blocks indicating a luminance signal and a color difference signal at the same position on the screen, the same position on the screen is formed. It is sufficient that the basic blocks indicating the luminance signal and the color difference signal in are included in the same compressed block without fail. However, although the image quality is improved by doing so, the compression block size becomes three times as large as that described above, and the processing amount of information amount control increases, so that the circuit scale is correspondingly larger than the conventional one. There was a problem that it had to be large.

Further, in the above-mentioned prior art, by making the data compression rate higher than usual, long-time recording for the purpose of lengthening the video recording time on the tape even if the quality of the reproduced video is somewhat sacrificed. There was a problem that the mode was not prepared.

Therefore, an object of the present invention is to solve the above problems and to have a plurality of recording modes exceeding the number of types of video signals, and a plurality of video modes and long-time modes with different resolutions. It is an object of the present invention to provide a digital video signal recording / reproducing apparatus having a relatively small circuit scale capable of recording / reproducing a video signal and recording / reproducing a high quality video signal with high recording efficiency.

[0014]

In order to achieve the above object, the digital video signal recording / reproducing apparatus of the present invention is arranged such that the amount of data after compression is substantially equal to the target amount of data.
In a digital video signal recording / reproducing apparatus for data compression of image data obtained by digitizing a video signal and recording on a recording medium, a compression which is a data compression unit according to a type of the video signal and a recording mode for the recording medium. A compression block size setting means for variably setting a compression block size representing a block size for each compression block, and a plurality of color pixels at the same position in the frame (one of these is a luminance signal The number of macroblocks each including a predetermined number of pixels including that of the compressed block memory is set to a compressed block memory for generating the compressed block, and the target data amount is set. Target data amount setting means, the compressed block size and the A quantization parameter generating means for generating a quantization parameter for quantizing the corresponding compressed block so that the data amount after compression becomes substantially equal to the target data amount according to the standard data amount. The number of the compressed blocks included in the recording track on the recording medium is always constant regardless of the type of the video signal and the recording mode.

[0015]

The operation based on the above configuration will be described.

In the digital video signal recording / reproducing apparatus of the present invention, the image data obtained by digitizing the video signal is compressed and recorded on the recording medium so that the data amount after compression becomes substantially equal to the target data amount. In a digital video signal recording / reproducing apparatus, a compression block size representing a size of a compression block which is a data compression unit is variable for each compression block according to a type of the video signal and a recording mode for the recording medium. The compressed block size setting means for setting the macroblock, and the macroblock composed of a predetermined number of pixels including pixels of a plurality of colors (one of which may be a luminance signal) at the same position in the frame, The compressed blocks are generated by grouping the compressed blocks in a number corresponding to the size. A compression block memory, the target data amount setting means for setting the target amount of data, in response to the compression block size and the target data amount,
And a quantization parameter generating means for generating a quantization parameter for quantizing the corresponding compressed block so that the data amount after compression becomes substantially equal to the target data amount. Regardless of the type of video signal and the recording mode, the number of compressed blocks included in a recording track on the recording medium is always constant.

Therefore, in accordance with the type of the video signal and the recording mode, pixels of a plurality of colors at the same position in the frame (for example, a predetermined number of pixels representing luminance and another predetermined number of pixels representing color difference). ) Is used as a unit for processing a macro block consisting of a specified number of pixels, and the compression block size is changed for each compression block, so that the amount of processing required to control the amount of information in units of compression blocks is increased. It is possible to reduce the circuit scale as compared with the conventional case, and it is possible to record and reproduce a high-quality video signal with high recording efficiency regardless of the type of the video signal and the recording mode.

[0018]

Embodiments of the digital video signal recording / reproducing apparatus of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is an overall configuration diagram of a digital video signal recording / reproducing apparatus (hereinafter referred to as a digital VTR) of the present invention. In the figure, 1 is an input terminal of an input video signal,
2 is an input terminal for a recording operation mode signal, 3 is a recording system circuit,
4 is a recording head, 5 is a magnetic tape, 6 is a reproducing head, and 7
Is a reproduction system circuit, 8 is an output video signal output terminal, and 9 is a reproduction operation mode signal output terminal. Also, the recording system circuit 3
Is composed of an A / D conversion circuit 10, an image coding circuit 11, a correction code addition circuit 12, a modulation circuit 13, a recording amplifier 14 and a recording operation timing control circuit 15, and the reproduction system circuit 7 is composed of a reproduction amplifier 16 and Demodulation circuit 17, error correction circuit 18, image decoding circuit 19, D / A conversion circuit 20,
And a reproduction operation timing control circuit 21.

Table 1 is a table showing recording modes in the apparatus of FIG. 1, and shows specifications of three types of recording modes, respectively.

[0021]

[Table 1]

In Table 1, the first recording mode is the standard mode, which is the current TV system in Japan, 525.
A / 60 type video signal is sampled at a sampling frequency of 13.5 MHz and one frame of compressed data is recorded on 10 tracks on a magnetic tape. The second recording mode is a long time mode, in which a video signal of 525/60 system is sampled at a sampling frequency of 9.0 MHz (2/3 times the standard mode), and one frame of compressed data is recorded on a magnetic tape. Record on 5 tracks (1/2 times the standard mode). Since the image data compression rate in the long-time mode is higher than that in the standard mode, the image quality is inferior to that in the standard mode, but when recording on the same length of tape, twice as much as in the standard mode. The recording time can be realized. Third
Is a high-definition mode, and a 1125/60 type video signal is sampled at a sampling frequency of 44.55 MHz and one frame of compressed data is recorded on 20 tracks (twice the standard mode) on a magnetic tape. . In high-definition mode, when recording on the same length of tape, the recording time is half that in standard mode, but it is possible to record high-definition HDTV video signals, which is the next-generation TV system in Japan. it can.

Next, referring to FIG. 1, an outline of the operation in the case of video recording will be described. The recording operation mode signal set by the operation panel of the digital VTR is always supplied to the input terminal 2. Recording operation timing control circuit 15
Indicates the operation clock and the operation timing of the A / D conversion circuit 10, the image encoding circuit 11, the correction code addition circuit 12, the modulation circuit 13, and the recording amplifier 14 which configure the recording system circuit 3 in accordance with the recording operation mode signal. Performs switching control.
That is, first, a set of three types of video signals composed of a luminance signal (Y) and two types of color difference signals (RY, BY) is input from the input terminal 1. A / D conversion circuit 1
0 samples an analog video signal at a sampling frequency according to the recording operation mode to generate digital image data. The image encoding circuit 11 is the A / D conversion circuit 1
The image data generated by 0 is data-compressed to generate compressed data. This data compression processing is performed for each basic block of a predetermined size. Then, the compressed data amount is controlled to be constant for each compressed block composed of a predetermined number of basic blocks determined according to each operation mode. The image encoding circuit 11 switches the compression block size determined for each recording mode according to the recording operation mode signal input from the input terminal 2.

The correction code adding circuit 12 adds a parity code based on the Reed-Solomon product code to the compressed data that has been data-compressed by the image coding circuit 11 and outputs the data to be recorded on the magnetic tape. That is, first, compressed data to be recorded on one track is divided into predetermined sizes and vertically stacked to generate a two-dimensional array structure. Next, the outer code parity is added by Reed-Solomon coding in the vertical direction, and the inner code parity is added by Reed-Solomon coding in the horizontal direction. A sync block is formed by adding SYNC data and ID data to the head of the compressed data (or outer code parity) thus generated and the inner code parity added thereto (sync block = magnetic tape). The basic unit of data recording / reproduction for SYNC data: SYNC data = a special bit pattern for synchronizing reproduction in synchronous block units when reading data from a magnetic tape, ID data = attribute data indicating the number of a synchronous block, etc.).

The modulation circuit 13 converts the compressed data to which the error correction code is added into a recording signal in a signal format suitable for recording / reproduction on the magnetic tape. The recording amplifier 14 amplifies this recording signal and supplies it to the magnetic head 4. By the processing of the recording system circuit 3 described above, the video signals sequentially input to the input terminal 1 are sequentially recorded on the magnetic tape 5 that runs opposite the magnetic head 4. That is, similar to the current analog VTR, the magnetic head 4 embedded in the rotary cylinder disposed so as to be inclined with respect to the tape running direction causes the magnetic head 4 to move with respect to the magnetic tape 5 wound around the rotary cylinder. The recording signal converted from the video signal is recorded on the magnetic tape 5 by performing the helical scan. Therefore, the recording signal is recorded on the magnetic tape 5 in units of tracks having a predetermined inclination with respect to the tape running direction. In this case, the synchronization blocks generated by the correction code adding circuit 12 are recorded on each track by an integer number.

Next, referring to FIG. 1, the outline of the operation for video reproduction will be described. First, the magnetic head 6 is replaced by the magnetic tape 5.
The recorded signals recorded in are sequentially reproduced, and the reproduction amplifier 1
6 amplifies this reproduction signal. The demodulation circuit 17 performs waveform equalization processing for compensating the recording / reproducing characteristics of the magnetic tape, and then demodulates the reproduced signal into digital signals of 0 and 1. The error correction circuit 18 detects the SYNC data, which is a special bit pattern added to the head of the synchronization block, from the demodulated digital signal, reproduces the data in units of the synchronization block, and the internal code parity of the data is reproduced. Error detection and random error correction are performed using the data and output as compressed data. At this time, if a burst error or a large number of random errors occur, the data of the synchronization block including the outer code parity is reproduced, and then the outer code parity is used to perform error correction and output as compressed data. . If there is still an uncorrectable error, the error position information is sent to the image decoding circuit 19 as error position data.

By the above processing, when the video reproduction is started, the synchronous block is reproduced at the operation clock and the operation timing of the standard mode, and the compressed data is output. Then, the image decoding circuit 19 reproduces the operation mode signal multiplexed on the compressed data and recorded on the magnetic tape, and outputs it as a reproduction operation mode signal. The reproduction operation timing control circuit 21 responds to the reproduction operation mode signal by forming a reproduction amplifier 16, a demodulation circuit 17, an error correction circuit 18, an image decoding circuit 19, D /
Switching control of the operation clock and operation timing in the A conversion circuit 20 is performed. Further, the reproduction operation mode signal is output from the output terminal 9 to the operation panel of the digital VTR to display in which operation mode the video reproduction is currently performed.

The image decoding circuit 19 expands the reproduced compressed data to reproduce the image data. However, when an uncorrectable error is detected in the error correction circuit 18, the basic block corresponding to the erroneous compressed data is determined based on the error position data sent from the error correction circuit 18, and the basic block is decoded. The image data of the basic block at the same position one frame before is replaced without being converted (conceal processing). By performing this concealment processing, even if the error of the reproduced compressed data cannot be corrected, the image quality of the reproduced video can be prevented from being extremely deteriorated. The digital image data reproduced in this manner is converted into an analog video signal by the D / A conversion circuit 20, and the output terminal 8
Is output as an output video signal.

Next, the image coding circuit 11 shown in FIG.
The operation of the image decoding circuit 19 will be described in detail.

FIG. 2 is a diagram showing in detail the first embodiment of the image coding circuit in FIG. In the figure, 31 is an input terminal for image data, 32 is a frame memory, 33 is a shuffling circuit (corresponding to shuffling means in claims), 3
4 is a compressed block memory, 35 is a DCT circuit, 36 is a quantization circuit, 37 is a variable length coding circuit, 38 is a buffer memory, 39 is a recording operation mode signal input terminal, 40 is a shuffling pattern generation circuit, and 41 is Compressed block size generation circuit (corresponding to compressed block size setting means in claims), 42 is a compressed block target data amount generation circuit (corresponding to target data amount setting means in claims), 43
Is a quantization parameter generation circuit (corresponding to the quantization parameter generation means in the claims), and 44 is an output terminal for compressed data.

In FIG. 2, an input image has about 30 screens per second lined up in the time axis direction, and each screen is called a frame. The actual video signal is one in which each frame is horizontally scanned from left to right and then sequentially scanned twice from top to bottom every other line (interlaced scanning). If the recording mode is standard mode,
The luminance signal (Y) is horizontal 720 pixels per frame ×
It is composed of 480 vertical pixels. Since the color difference signals (RY, BY) are sampled at a sampling frequency that is ½ the luminance signal, the number of pixels in the horizontal direction is 360 pixels, which is half the luminance signal. In 32, since the decimation process of 1/2 in the vertical direction is performed on the color difference signal, the number of vertical pixels is also 240 pixels, which is half the luminance signal. Therefore, the color difference signal is composed of horizontal 360 pixels × vertical 240 pixels.

The frame is divided into macroblocks, which are the basic units of image coding, and the image data compression processing is performed. The size of the macro block is common in all operation modes, and the luminance signal (Y) is 16 horizontal pixels × 16 vertical pixels and the color difference signals (RY, BY).
Is horizontal 8 pixels × 8 pixels. Then, blocks of these three types of signals are combined to form a macro block. Since the DCT processing is performed in units of horizontal 8 pixel × 8 pixel DCT block (corresponding to the basic block described above), one macro block is composed of 6 DCT blocks in total. That is, the luminance signal is 4DC
Each of the T block and the two types of color difference signals is composed of one DCT block.

The image data input from the input terminal 31 is first stored in the frame memory 32 for one frame. However, the input image data is a luminance signal and two kinds of color difference signals, and as described above, the frame memory 32 performs decimation processing in the vertical direction on the color difference signals. The shuffling circuit 33 reads the image data for one frame held in the frame memory 32 in macro block units, and outputs the image data of the macro block to the compression block memory 34 and the quantization parameter generation circuit 43. At this time, the macroblocks are read from the screen positions which are not continuous but are sequentially output from the screen positions. This is because when controlling the compressed data amount to be constant in units of compressed blocks composed of a predetermined number of macroblocks, if the compressed blocks are composed of macroblocks at consecutive screen positions, the image at that part will be displayed. If the content is a fine pattern, that is, if the amount of information in the image data is large, compressing the data to the specified target data amount causes a large deterioration in image quality, and conversely, the pattern in which the image content is flat is flat. This is because when the information amount of the image data is small, it is possible to prevent waste from being generated only by compressing to the determined target data amount. That is,
The shuffling circuit 33 performs a shuffling process for extracting macroblocks at discrete screen positions in order to average the information amount of image data per compressed block as much as possible. At this time, since the size of one frame is different in each operation mode, the shuffling pattern generation circuit 40 determines which screen position macroblock is to be taken out in order according to the recording operation mode signal input from the input terminal 39. The shuffling circuit 33 is controlled by switching the designated shuffling pattern.

The image data output from the shuffling circuit 33 in units of macro blocks is the compressed block memory 3
A predetermined number of macroblocks are stored in No. 4. The compressed block size (the number of macroblocks forming the compressed block) is different in each operation mode, and also varies in each compressed block even in the same operation mode, as described later. The compressed block size generation circuit 41 switches the compressed block size in accordance with the recording operation mode signal input from the input terminal 39 and the compressed block number output from the shuffling circuit 33, thereby compressing the compressed block memory 34 and the quantization parameter. The generation circuit 43 is controlled.

That is, in the standard mode, the frame size is 45 macroblocks in the horizontal direction × 30 macroblocks in the vertical direction (= 1350), and the compressed block size is always 5 macroblocks, so that one frame is 270. It is composed of compressed blocks (= 1350/5). In the long time mode, the frame size is 30 macroblocks horizontal × 30 macroblocks vertical (=
900) and the compressed block size is 7,6,7,7,6,7,
Since it changes like this, one frame is composed of 135 compressed blocks (= 900 ÷ ((7 + 6 + 7) / 3)). In the high definition mode, the frame size is horizontal 7.
2 macro blocks x vertical 65 macro blocks (= 4680)
Since the compression block size changes like 9,8,9,9,8,9, ..., 1 frame is 540 compression blocks (= 4680 ÷ ((9 + 8 + 9) / 3)) Composed of.

The quantization parameter generation circuit 43 calculates the activity of each macro block which constitutes one input compressed block, and takes the sum as the activity of that compressed block. Then, the compressed block target data amount given from the compressed block target data amount generation circuit 42 is assigned to each macroblock according to the ratio of the activity of each macroblock to the activity of the compressed block. Further, the quantization parameter of the macroblock is determined from the target data amount to be allocated to each macroblock and the activity of the macroblock, and the quantization parameter is output to the quantization circuit 36.

Here, the activity of the macroblock is an index indicating whether the image content of the macroblock is fine and has a large amount of information, or whether the pattern is flat and has a small amount of information, and constitutes a macroblock. It is calculated as the sum of the pixel variance values of the six DCT blocks (sum of squares of pixel values obtained by subtracting the pixel average value in the DCT block). When a specific quantization parameter is set, there is a strong statistical correlation between the activity value and the amount of compressed data after data compression, and for a specific activity value, the quantization parameter and data compression Since it is known that the amount of compressed data after statistical processing has a strong statistical correlation, the quantization required to control the amount of compressed data to a target value for a macroblock having a certain activity value. The parameters can be estimated. The quantization parameter is a parameter indicating the fineness of quantization. In this embodiment, the value of the compressed block target data amount is the same for all operation modes and compressed blocks.

The image data of one compressed block once stored in the compressed block memory 34 is sequentially compressed block memory after the quantization parameter for each macro block forming the compressed block is generated by the quantization parameter generation circuit 43. It is output from 34. And DCT
The circuit 35 performs a two-dimensional discrete cosine transform (DCT) on the image data in units of DCT blocks composed of horizontal 8 pixels × vertical 8 pixels. DCT is an algorithm for performing frequency analysis similar to the Fourier transform, and the 64 transform coefficients after DCT are the DC coefficients corresponding to the pixel average value in the DCT block and the spatial frequency from low frequency to high frequency. Can be classified into different AC coefficients.

The quantizing circuit 36 quantizes six DCT blocks in one macroblock with the same quantizing parameter according to the quantizing parameter set for each macroblock. At this time, in consideration of the human visual characteristic that the detection sensitivity of high-frequency information is lower than that of low-frequency information, when a certain quantization parameter is given, DCT after DCT is performed. The low-frequency AC coefficient of the conversion coefficient is relatively fine, and the high-frequency AC coefficient is relatively coarse. Further, the fineness of the quantization of the DC coefficient is always constant.

The variable length coding circuit 37 is a quantization circuit 36.
Scans the quantized AC coefficient from low frequency to high frequency, and generates a pair of the number of consecutive coefficients (run length) having a value of 0 and that value (level) of a coefficient having a value other than 0. After that, the pair is Huffman-coded into a variable length code according to a predetermined Huffman coding table. In this case, the shorter the run length and the smaller the level, the higher the probability of occurrence of the pair, and therefore the corresponding code length becomes shorter, and conversely, the longer the run length and the higher the level, the longer the code length becomes. However, DC coefficients are handled separately from AC coefficients, and fixed-length codes are assigned. Then, the compressed data of the variable-length coded macroblock is the highest frequency AC coefficient such as the DC coefficient of all 6 DCT blocks and the lowest frequency AC coefficient of all 6 DCT blocks that are variable-length coded. The data is rearranged in order, and the compressed data is rearranged in descending order of importance.

By the way, the quantization parameter generating circuit 43
Then, the quantization parameter is determined so that the compressed data amount of one compressed block becomes equal to the target data amount, but some error occurs in the actually generated compressed data amount. Therefore, the variable-length coding circuit 37 discards the compressed data in excess of the target data amount in each compression block, and conversely adds a dummy bit if insufficient. . The variable-length coded compressed data is stored in the buffer memory 38 for one compressed block and then output from the output terminal 44. At this time, the operation mode information and the quantization parameter of each macroblock are input to the buffer memory 38 together with the compressed data, and the multiplexing process is performed on the compressed data.

As described above, although the compressed block size varies in the high definition mode and the long time mode, the compressed data amount per compressed block is the same in all operation modes, and the compressed block size is the same. Is set to be relatively small, it is possible to reduce the amount of processing required for controlling the amount of information in units of compressed blocks, and to reduce the circuit scale as compared with the related art.

FIG. 3 is a diagram showing the image decoding circuit in FIG. 1 in detail. In the figure, 51 is an input terminal for compressed data,
52 is a buffer memory, 53 is a variable length decoding circuit, 54
Is an inverse quantization circuit, 55 is an IDCT circuit, 56 is a deshuffling circuit, 57 is a frame memory, 58 is an output terminal of a reproduction operation mode signal, 59 is a deshuffling pattern generation circuit, 60 is an input terminal of error position data, and 61. Is a concealment instruction generation circuit, and 62 is an output terminal for image data.

In FIG. 3, the compressed data input from the input terminal 51 is stored in the buffer memory 52 for one compressed block. Then, the operation mode information multiplexed with the compressed data is extracted, outputted from the output terminal 58 as a reproduction operation mode signal, and given to the deshuffling pattern generation circuit 59. Further, the quantization parameter multiplexed in macroblock units is extracted and given to the inverse quantization circuit 54. The variable length decoding circuit 53 rearranges the compressed data output from the buffer memory 52 in the original order from the macro block unit to the DCT block unit, and then sequentially decodes the compressed data according to the Huffman coding table to determine the run length and the level. Generate a pair and restore the value of the quantized transform coefficient. Inverse quantization circuit 54
Performs inverse quantization according to the quantization parameter corresponding to each macroblock and restores the value of the transform coefficient. However, since the combination of the quantization processing and the inverse quantization processing is not reversible, it does not completely return to the value before quantization, and some error (distortion) occurs.

The IDCT circuit 55 reproduces image data by sequentially performing an inverse discrete cosine transform (IDCT) on the DCT block unit basis for the transform coefficient whose value has been restored. Then, the deshuffling circuit 56
Uses the deshuffling pattern provided from the deshuffling pattern generation circuit 59 to store the image data in a predetermined screen position in the frame memory 57 in macroblock units. The deshuffling pattern is switched and output by the deshuffling pattern generation circuit 59 according to the reproduction operation mode signal, and is shuffled by the shuffling pattern generation circuit 40 in the image encoding circuit 11 according to the recording operation mode signal. This is the same as the shuffling pattern that is switched and output. Then, the image data for one frame stored in the frame memory 57 is sequentially output from the output terminal 62 as image data.

When the error position data generated by the error correction circuit 18 is input from the input terminal 60 to the concealment instruction generation circuit 61 and it is detected that an error exists in the compressed data, the error is detected. Concealment instruction information indicating that the reproduced image data is invalid is transmitted to the deshuffling circuit 56 for the macro block including the macro block. The deshuffling circuit 56 simply discards the reproduced image data of the macroblock which is indicated to be invalid by the concealment instruction information. Therefore, the image data of the macro block is not written in the frame memory 57, and as a result, the image data of the previous frame remains. As a result, even if an error occurs, it is possible to avoid a significant deterioration in image quality.

FIG. 4 is a diagram showing macroblocks forming a compressed block in the standard mode, which is composed of horizontal 45 macroblocks × vertical 30 macroblocks.
From the frame, 270 fixed size compressed blocks composed of 5 macroblocks are generated. Since 1 track stores compressed data of 27 compressed blocks,
The compressed data of the frame is recorded on 10 tracks.

FIG. 5 is a diagram showing macroblocks constituting a compressed block in the long time mode, which is horizontal 30.
From one frame composed of macro blocks × 30 vertical macro blocks, 135 variable size compressed blocks composed of 6 or 7 macro blocks are generated. 1
Since 27 tracks of compressed data are recorded on the tracks, 1 frame of compressed data is recorded on 5 tracks.

FIG. 6 is a diagram showing macroblocks forming a compressed block in the high definition mode, which is horizontal 72.
From one frame composed of macroblocks × vertical 65 macroblocks, 540 variable size compressed blocks composed of 8 or 9 macroblocks are generated. 1
Since 27 tracks of compressed data are recorded on the track, 1 frame of compressed data is recorded on 20 tracks. However, in the long time mode and the high definition mode, each compressed block size is determined such that the total number of macro blocks forming three consecutive compressed blocks indicated by A, B, and C is constant. .

In any of the above recording modes, 9 macroblocks are treated as a set of macroblocks, and the macroblock sets are regularly arranged as shown in these figures, and then a common rule is applied to all operation modes. Based on the shuffling pattern defined by, a predetermined number of macroblocks are selected to form a compressed block, as indicated by A, B, or C. This has the feature that the processing of shuffling and deshuffling becomes simple. That is, which macroblock set is selected according to which track in the plurality of tracks assigned to record one frame is the compressed block recorded and which compressed block is recorded in one track. However, which macroblock in each macroblock set is selected is determined.

FIG. 7 is a diagram showing in detail the second and third embodiments of the image coding circuit in FIG. 2 is different from FIG. 2 only in the compressed block target data amount generation circuit 72 in the image coding circuit 11 of the recording system circuit 3. In the first embodiment, (compressed block size for each compressed block However, the target data amount, which has been set to a constant value, is set in accordance with the variation of the compressed block size in the second and third embodiments. Other parts of the recording system circuit 3 and the reproducing system circuit 7 are the same as those in the first embodiment.

That is, in the second embodiment (FIG. 7),
The compressed block target data amount generation circuit 72 generates a compressed block target data amount proportional to the compressed block size according to the operation mode and the compressed block number. For example,
When the target data amount assigned to one compressed block consisting of 5 macroblocks in the standard mode is the reference data amount, the compressed block size is 9 in the high definition mode.
In the case of a macroblock, the same target data amount as the reference data amount is used. Similarly, when the compressed block size is 8 macroblocks, the target data amount is 8/9 times the reference data amount. Generation circuit 7
2 sets. FIG. 8 shows a second part of the image coding circuit in FIG.
It is a figure explaining the concept of the change of the amount of target data in an example. In FIG. 8, five sync blocks are generated from the compressed data having the reference data amount, and the sync blocks are recorded / reproduced on / from the magnetic tape. As a result, the amount of data assigned to one macroblock becomes the same for all macroblocks. It should be noted that additional data other than the video signal data is recorded in the empty data area (the data amount which is 1/9 times the reference data amount) shown in FIG.

Also in the third embodiment (there is no difference in structure from FIG. 7 and FIG. 2), the compressed block target data amount generation circuit 72 sets the compressed block size according to the operation mode and the compressed block number. Generate a compressed block target data amount. That is, a total of 15 in standard mode
If the target data amount assigned to the three compressed blocks composed of macro blocks is the extended reference data amount,
For example, in the high definition mode, when the compression block size is 9 macroblocks, it is 9/2 of the extended reference data amount.
The target data amount of 6 times is set, and the target data amount of 8/26 times the extended reference data amount is set when the compressed block size is 8 macroblocks (difference from the second embodiment). Figure 9
FIG. 9 is a diagram illustrating the concept of fluctuations in target data amount in the third embodiment of the image encoding circuit in FIG. 1. In FIG. 9, fifteen sync blocks are generated from the compressed data of the extended reference data amount, and are recorded / reproduced on the magnetic tape in sync block units. As a result, the amount of data assigned to one macroblock is the same for all macroblocks, and no empty data area is created on the track. The buffer memory 38 has three
The compressed data for the compressed blocks is stored, the data is rearranged as necessary, and the compressed data is sequentially output from the output terminal 44.

The image coding circuit has been described above in detail with respect to the three embodiments of the present invention. In the above embodiment, the amount of data recorded on one track (depending on the recording density of the magnetic tape or the like) is the same in all operation modes, but the amount of data is different for each operation mode. Thus, for example, the same 10 tracks / frame can be recorded on a magnetic tape having a normal recording density in the standard mode and on a magnetic tape having a recording density twice the normal recording density in the high definition mode. . Further, since the number of pixels of the color difference signal is 1/2 times that of the luminance signal in the horizontal direction and 1/2 times that of the luminance signal, the number of pixels forming the macroblock is 16 × 1.
Although 6 pixels are used, the size of the macro block in each operation mode may be different from this. Further, in the above embodiment, the case where the pixel is represented by the luminance signal and the color difference signal has been described, but the recording and reproduction can be similarly performed even when the pixel is represented by the RGB signal. In addition, the image encoding method for performing data compression may be different from the above-described encoding method using DCT.

Further, not only the standard mode, the long time mode and the high definition mode but also various other operation modes are conceivable. What kind of operation mode does the digital VT have?
The present invention can be easily applied to R. For example,
Even if the resolution of the video signal to be recorded and the recording time are the same, the present invention can be applied to operation modes having different image encoding methods for data compression. The same applies to a video signal recording medium as long as it is a data recording medium having a track structure (for example, an optical disk or a magnetic disk).

[0056]

As described in detail above, according to the digital video signal recording / reproducing apparatus of the present invention, an image obtained by digitizing a video signal so that the amount of data after compression becomes almost equal to the target amount of data. In a digital video signal recording / reproducing apparatus for performing data compression of data and recording on a recording medium, a compression block size indicating a size of a compression block which is a data compression unit, according to a type of the video signal and a recording mode for the recording medium. Is variably set for each of the compression blocks, and a plurality of color pixels at the same position in the frame (one of which may be a luminance signal) are defined. Groups of macroblocks each having a different number of pixels are grouped by the number corresponding to the compressed block size. The compressed block memory for generating the compressed block, the target data amount setting means for setting the target data amount, and the compressed data amount according to the compressed block size and the target data amount And a quantization parameter generating means for generating a quantization parameter for quantizing the corresponding compressed block so as to be substantially equal to the quantity. Regardless, the number of the compressed blocks included in the recording track on the recording medium is always constant.

Therefore, in accordance with the type of the video signal and the recording mode, a plurality of color pixels (for example, a predetermined number of pixels representing luminance and another predetermined number of pixels representing color difference) at the same position in the frame. ) Is used as a unit for processing a macro block consisting of a specified number of pixels, and the compression block size is changed for each compression block, so that the amount of processing required to control the amount of information in units of compression blocks is increased. It is possible to obtain the effects of reducing the circuit scale and reducing the circuit scale as compared with the related art, and recording / reproducing a high-quality video signal with high recording efficiency regardless of the type of the video signal and the recording mode.

[Brief description of drawings]

FIG. 1 is an overall configuration diagram of a digital video signal recording / reproducing apparatus of the present invention.

FIG. 2 is a diagram showing in detail a first embodiment of the image coding circuit in FIG.

FIG. 3 is a diagram showing the image decoding circuit in FIG. 1 in detail.

FIG. 4 is a diagram showing macroblocks forming a compressed block in a standard mode.

FIG. 5 is a diagram showing macroblocks forming a compressed block in a long time mode.

FIG. 6 is a diagram showing macroblocks forming a compressed block in a high definition mode.

FIG. 7 is a diagram showing in detail second and third embodiments of the image encoding circuit in FIG.

FIG. 8 is a diagram for explaining the concept of fluctuations in the target data amount in the second embodiment of the image coding circuit in FIG.

9 is a diagram illustrating the concept of fluctuations in target data amount in the third embodiment of the image encoding circuit in FIG.

[Explanation of symbols]

 3 recording system circuit 4 recording head 5 magnetic tape 6 reproducing head 7 reproducing system circuit 11 image coding circuit 12 correction code adding circuit 15 recording operation timing control circuit 18 error correction circuit 19 image decoding circuit 33 shuffling circuit 34 compression block memory 35 DCT circuit 36 Quantization circuit 37 Variable length coding circuit 41 Compressed block size generation circuit 42, 72 Compressed block target data amount generation circuit 53 Variable length decoding circuit 54 Inverse quantization circuit 55 IDCT circuit 56 Deshuffling circuit 61 Concealment instruction generation circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI Technical indication location H04N 7/30 9/808 11/04 Z 7337-5C H04N 7/133 A (72) Inventor Fujii Yukio 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa, Ltd.Inside Hitachi, Ltd. Visual Media Laboratory (72) Inventor Takeshi Ichige 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside Hitachi, Ltd. Visual Media Institute (72) Inventor Nobuyoshi Tsukiji, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture

Claims (4)

[Claims] 1. A digital video signal recording / reproducing apparatus which performs data compression of image data obtained by digitizing a video signal and recording on a recording medium so that the data amount after compression becomes substantially equal to a target data amount. Compression block size setting means for variably setting, for each of the compression blocks, a compression block size representing the size of a compression block, which is a data compression unit, in accordance with the type of video signal and the recording mode for the recording medium. A compressed block memory for generating the compressed block by grouping macro blocks each including a predetermined number of pixels including pixels of a plurality of colors at the same position in a frame, the compressed block size being generated. Target data amount setting means for setting the target data amount; Quantization parameter generation means for generating a quantization parameter for quantizing the corresponding compressed block so that the amount of data after compression becomes substantially equal to the target data amount according to the block size and the target data amount. And is configured to include, regardless of the type of the video signal and the recording mode,
A digital video signal recording / reproducing apparatus, wherein the number of the compressed blocks included in a recording track on the recording medium is always constant. 2. The digital video signal recording / reproducing apparatus according to claim 1, wherein the target data amount setting means always sets the value of the target data amount to a predetermined value. 3. The target data amount setting means sets the value of the target data amount for each of the compressed blocks in accordance with the type of the video signal, the recording mode and the compressed block size. The digital video signal recording / reproducing apparatus according to claim 1, characterized in that: 4. A configuration comprising shuffling means for rearranging the order of the macroblocks and writing the rearranged macroblocks in the compressed block memory so that the adjacent macroblocks in the frame are not included in the same compressed block. 4. The digital video signal recording / reproducing apparatus according to claim 1, wherein