JPH07221452A - Ceramic multilayer substrate - Google Patents
Ceramic multilayer substrateInfo
- Publication number
- JPH07221452A JPH07221452A JP6009224A JP922494A JPH07221452A JP H07221452 A JPH07221452 A JP H07221452A JP 6009224 A JP6009224 A JP 6009224A JP 922494 A JP922494 A JP 922494A JP H07221452 A JPH07221452 A JP H07221452A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- layer
- green sheet
- paste
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、コンデンサが内蔵され
たセラミック多層基板に関するものであり、特に、コン
デンサ層を内蔵しても基板表面の凹凸がなく、高容量化
を可能にするものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic multi-layer substrate having a built-in capacitor, and more particularly to a capacitor having a built-in capacitor layer which has no irregularities on the surface of the substrate and enables high capacity. .
【0002】[0002]
【従来の技術】従来、セラミック多層基板にコンデンサ
を内蔵したものには、図3に示すように複数枚の絶縁層
用グリーンシート1で、複数枚のコンデンサ層用グリー
ンシート2を挟持してなるものがある。また図4に示す
ように絶縁層用グリーンシート1の所定の部分に、スク
リーン印刷にてコンデンサ用電極3とコンデンサ層2と
を形成し、その上部に絶縁層用グリーンシート1を積層
し焼成したものもある。2. Description of the Related Art Conventionally, a ceramic multilayer substrate having a built-in capacitor is formed by sandwiching a plurality of capacitor layer green sheets 2 with a plurality of insulating layer green sheets 1 as shown in FIG. There is something. Further, as shown in FIG. 4, a capacitor electrode 3 and a capacitor layer 2 are formed on a predetermined portion of the insulating layer green sheet 1 by screen printing, and the insulating layer green sheet 1 is laminated and fired on the electrode 3. There are also things.
【0003】[0003]
【発明が解決しようとする課題】しかしながら上記図3
に示すものでは、基板表面の凹凸がなく大容量の内蔵コ
ンデンサを実現できる反面、コンデンサ層2の誘電率が
非常に高いために、コンデンサ層2に形成されたビア導
体5間での電気的クロストークが大きな問題となってい
た。However, the above-mentioned FIG.
In the structure shown in Fig. 1, a large-capacity built-in capacitor can be realized without the unevenness of the substrate surface, but the dielectric constant of the capacitor layer 2 is very high, so that an electrical cross between the via conductors 5 formed in the capacitor layer 2 Talk was a big problem.
【0004】また図4のものでは、ビア導体5が絶縁層
用グリーンシート1に形成されているので電気的クロス
トークの問題はないが、部分的に形成されたコンデンサ
層2上に絶縁層用グリーンシート1を重ねているために
基板表面に凹凸ができてしまい、コンデンサ層の層数を
増して高容量化を図れないという問題があった。Further, in the structure shown in FIG. 4, since the via conductor 5 is formed on the insulating layer green sheet 1, there is no problem of electrical crosstalk, but the insulating layer is formed on the partially formed capacitor layer 2. Since the green sheets 1 are piled up, unevenness is formed on the substrate surface, and there is a problem that the number of capacitor layers cannot be increased to achieve high capacity.
【0005】本発明は上記従来の問題点を解決するもの
であり、ビア導体間のクロストークがなく、基板表面が
平坦で大容量のコンデンサを内蔵したセラミック多層基
板を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a ceramic multi-layer substrate having a flat surface and a large-capacity capacitor, which is free from crosstalk between via conductors. .
【0006】[0006]
【課題を解決するための手段】上記課題を解決するため
本発明のセラミック多層基板は、絶縁層用のグリーンシ
ート表面の所定の部分にコンデンサ用電極ペーストとコ
ンデンサペーストとを交互に印刷、乾燥を繰り返してコ
ンデンサ層を形成し、前記コンデンサ層が形成された前
記グリーンシート表面に、前記コンデンサ層と同じ厚み
になるように、前記コンデンサペーストより誘電率の低
い絶縁ペーストを印刷して絶縁層を形成し、前記コンデ
ンサ層及び前記絶縁層上に絶縁層用のグリーンシートを
積層してなることを特徴とするものである。In order to solve the above-mentioned problems, the ceramic multilayer substrate of the present invention is designed such that the capacitor electrode paste and the capacitor paste are alternately printed and dried on a predetermined portion of the surface of the green sheet for the insulating layer. A capacitor layer is repeatedly formed, and an insulating paste having a dielectric constant lower than that of the capacitor paste is printed on the surface of the green sheet on which the capacitor layer is formed so as to have the same thickness as the capacitor layer to form an insulating layer. However, a green sheet for an insulating layer is laminated on the capacitor layer and the insulating layer.
【0007】[0007]
【作用】上記構成によれば、コンデンサ層を絶縁層に部
分的に形成しており、電気的クロストークの影響を受け
る事はない。またコンデンサ層とほぼ同一厚みになるよ
うに絶縁ペーストを印刷しているため、焼成後の基板表
面を平坦にすることができ、コンデンサ層の層数を増や
して大容量をできる。According to the above construction, the capacitor layer is partially formed on the insulating layer and is not affected by electrical crosstalk. Further, since the insulating paste is printed so as to have almost the same thickness as the capacitor layer, the substrate surface after firing can be made flat, and the number of capacitor layers can be increased to achieve a large capacity.
【0008】[0008]
【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。図1に示すように、セラミック成分
がホウケイ酸鉛ガラスとアルミナの混合物によりなる絶
縁層用グリーンシート1の所定部分に、Ag/Pdを主
成分とするコンデンサ用電極ペーストを印刷し乾燥させ
る。その後、鉛ペロブスカイト化合物を主成分とするコ
ンデンサ層用ペーストを印刷し乾燥させる。この工程を
繰り返し、さらにコンデンサ用電極ペーストを印刷、乾
燥させて、コンデンサ用電極3を備えたコンデンサ層2
を2層に構成する。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. As shown in FIG. 1, a capacitor electrode paste containing Ag / Pd as a main component is printed and dried on a predetermined portion of an insulating layer green sheet 1 whose ceramic component is a mixture of lead borosilicate glass and alumina. Then, a capacitor layer paste containing a lead perovskite compound as a main component is printed and dried. This process is repeated, and the capacitor electrode paste is further printed and dried to provide the capacitor layer 2 including the capacitor electrode 3.
Is composed of two layers.
【0009】コンデンサ層2が部分的に形成されたグリ
ーンシート1の表面に、グリーンシート1中のセラミッ
ク成分と同一組成を有する絶縁層ペーストを、コンデン
サ層2と同一厚みになるよう印刷して絶縁層4を形成す
る。絶縁層4のビア導体5は、スクリーン印刷により形
成することができる。On the surface of the green sheet 1 on which the capacitor layer 2 is partially formed, an insulating layer paste having the same composition as the ceramic component in the green sheet 1 is printed to have the same thickness as the capacitor layer 2 for insulation. Form layer 4. The via conductor 5 of the insulating layer 4 can be formed by screen printing.
【0010】そして図2に示すように、コンデンサ層2
と絶縁層4の形成された絶縁層グリーンシート1上に、
さらに他の絶縁層用グリーンシート1を熱圧着して積層
した後、450℃の空気中で十分に有機分を除去し、9
00℃の空気中で焼成を行い、内蔵コンデンサが形成さ
れたセラミック多層基板を得た。As shown in FIG. 2, the capacitor layer 2
And on the insulating layer green sheet 1 on which the insulating layer 4 is formed,
Further, another green sheet for insulating layers 1 was laminated by thermocompression bonding, and then the organic components were sufficiently removed in air at 450 ° C.
Firing was performed in air at 00 ° C. to obtain a ceramic multilayer substrate on which built-in capacitors were formed.
【0011】[0011]
【発明の効果】以上のように本発明のセラミック多層基
板は、部分的に形成したコンデンサ層の周囲を絶縁ペー
ストで印刷することにより、コンデンサ層の凹凸をなく
し基板表面を平坦にしたものであり、コンデンサを内蔵
していない基板表面と同程度の平坦さを実現できる。ま
たコンデンサ層を多層にしてコンデンサ層の厚みを増し
ても、基板表面の平坦さが失われることがなく、大容量
化が可能になる。As described above, in the ceramic multilayer substrate of the present invention, the periphery of the partially formed capacitor layer is printed with an insulating paste so that the unevenness of the capacitor layer is eliminated and the substrate surface is made flat. As a result, it is possible to achieve the same level of flatness as the surface of a board that does not have a built-in capacitor. Further, even if the thickness of the capacitor layer is increased by making the capacitor layer multi-layered, the flatness of the substrate surface is not lost, and the capacity can be increased.
【0012】また、本発明のセラミック多層基板は、コ
ンデンサ層の周囲に絶縁ペーストを印刷して形成してい
るので、コンデンサ層と絶縁層との密着がよく、焼成後
に隙間ができたりしないので、基板の性能や信頼性もよ
いものである。Further, since the ceramic multilayer substrate of the present invention is formed by printing the insulating paste around the capacitor layer, the capacitor layer and the insulating layer adhere well and no gap is formed after firing. The performance and reliability of the substrate are also good.
【図1】本発明の実施例におけるセラミック多層基板の
一製造工程での断面図FIG. 1 is a sectional view of a ceramic multilayer substrate in one manufacturing process according to an embodiment of the present invention.
【図2】同セラミック多層基板の断面図FIG. 2 is a sectional view of the same ceramic multilayer substrate.
【図3】従来のコンデンサ内蔵セラミック多層基板の断
面図FIG. 3 is a sectional view of a conventional ceramic multilayer substrate with a built-in capacitor.
【図4】従来のコンデンサ内蔵セラミック多層基板の断
面図FIG. 4 is a sectional view of a conventional ceramic multilayer substrate with a built-in capacitor.
【符号の説明】 1 絶縁層用グリーンシート 2 コンデンサ層 3 コンデンサ用電極 4 絶縁層 5 ビア導体[Explanation of reference symbols] 1 green sheet for insulating layer 2 capacitor layer 3 electrode for capacitor 4 insulating layer 5 via conductor
Claims (1)
分にコンデンサ用電極ペーストとコンデンサペーストと
を交互に印刷、乾燥を繰り返してコンデンサ層を形成
し、前記コンデンサ層が形成された前記グリーンシート
表面に、前記コンデンサ層と同じ厚みになるように、前
記コンデンサペーストより誘電率の低い絶縁ペーストを
印刷して絶縁層を形成し、前記コンデンサ層及び前記絶
縁層上に絶縁層用のグリーンシートを積層してなること
を特徴とするセラミック多層基板。1. A green sheet on which a capacitor layer is formed by alternately printing an electrode paste for a capacitor and a capacitor paste on a predetermined portion of the surface of a green sheet for an insulating layer and repeating drying to form the capacitor layer. An insulating layer having a dielectric constant lower than that of the capacitor paste is printed on the surface so as to have the same thickness as the capacitor layer to form an insulating layer, and a green sheet for the insulating layer is formed on the capacitor layer and the insulating layer. A ceramic multi-layer substrate characterized by being laminated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6009224A JPH07221452A (en) | 1994-01-31 | 1994-01-31 | Ceramic multilayer substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6009224A JPH07221452A (en) | 1994-01-31 | 1994-01-31 | Ceramic multilayer substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07221452A true JPH07221452A (en) | 1995-08-18 |
Family
ID=11714457
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6009224A Pending JPH07221452A (en) | 1994-01-31 | 1994-01-31 | Ceramic multilayer substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07221452A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1320846C (en) * | 2002-12-06 | 2007-06-06 | 松下电器产业株式会社 | Circuit board and its manufacturing method |
-
1994
- 1994-01-31 JP JP6009224A patent/JPH07221452A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1320846C (en) * | 2002-12-06 | 2007-06-06 | 松下电器产业株式会社 | Circuit board and its manufacturing method |
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