JPH07213062A - Gate-signal generation method of pwm cycloconverter - Google Patents

Abstract

PURPOSE:To provide a PWM cycloconverter which is operated smoothly even in a state that an output current is very small by a method wherein a commutation overlap period is provided between individual gate signals of four semiconductor switching elements constituting two sets of bidirectional switches and the dead time is provided in such a way that the PWM cycloconverter is operated normally without any troubles even when the detection delay of an HCT is generated. CONSTITUTION:In a PWM cycloconverter, a P-type IGBT 1 and a P-type IGBT 2 are connected in series, a P-type IGBT 3 and a P-type IGBT 4 are connected in series, and an arm which is composed of two bidirectional switches is constituted. At this time, gate signals Su, Su', SL, SL' drive the P-type IGBTs 1 to 4, a commutation overlap period ta for current commutation is provided between the gate signals Su, and SL', and the dead time td of the bidirectional switches is provided between the Su and the SL as well as the Su, and the SL. Thereby, even when an output current to is very small and the detection of a current polarity by an HCT is delayed, the bidirectional switches can be changed over reliably.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of generating a gate signal for driving a bidirectional switch composed of a plurality of semiconductor switching elements in a PWM cycloconverter which constitutes UPS, VVVF or the like.

[0002]

2. Description of the Related Art FIG. 2 shows an example of a circuit diagram in which one arm of a PWM cycloconverter according to the prior art is constituted by a semiconductor switching element IGBT.
In FIG. 2, the P-type IGBT 1 and the P-type IGBT 2 are connected in series, and the P-type IGBT 3 and the P-type IGBT 4 are connected in series to form an arm composed of two sets of bidirectional switches. In the case of the power supply commutation method, it is necessary to switch the control of the two sets of bidirectional switches depending on the polarity of the output current. For this reason, the HCT 5 for detecting the current polarity is provided in the output circuit of the PWM cycloconverter. This HCT5
When a change in the polarity of the output current i _O is detected by, the bidirectional switches are turned on / off. That is, the P-type IGBTs 1 and 3 and the P-type IG described above
When the gate signals for controlling ON / OFF of BT2 and 4 are S _U , S _L and S _U ′, S _L ′, respectively, when the output current i _O > 0, S _U ′ and S _L remain off. And S _U
And S _L ′ are controlled on / off. Next, the output current i _O
<In the case of 0 'remains off, S _U' S _U and S _L is S _L and is on-off controlled.

[0003]

As described above, the polarity of the output current is detected by the HCT, and the on / off control of the two sets of bidirectional switches is switched based on this detection signal, but the output current is very small. In some cases, the switching of the bidirectional switch may not operate normally. this is,
This phenomenon is an abnormal operation caused by detection delay due to the characteristics of the HCT and noise mixed in the output signal of the HCT, and this phenomenon will be described with reference to FIGS. 3, 4 and 5.

FIG. 5 is a circuit diagram of a high frequency link DC / AC converter, which includes semiconductor switching elements 25, 26,
The operation characteristics of the two sets of bidirectional switches of the PWM cycloconverter constituted by 27 and 28 are shown as an example in FIGS. 3 and 4. That is, the output voltage e _B and the output current i _O when the HCT18 provided on the output circuit accurately detects the polarity change of the output current i _O, was operated successfully the two sets of bidirectional switch shown in FIG. 5 Waveform diagram of Figure 3
As shown in (a), gate signals S _c3 , S _c3 ′, which drive the respective semiconductor switching elements 25 to 28,
The timing chart of S _c4 and S _c4 ′ is as shown in FIG. However, the output current i by HCT18
Output voltage e _B and output current i when switching of the bidirectional switch was not normal due to abnormal current polarity detection of _O
The waveform diagram of _{O is} as shown in FIG. 4A, and the timing chart of the gate signal is as shown in FIG. 4B. This corresponds to turning off the bidirectional switch, and the output voltage e _B is not output.

As a means for preventing the abnormal operation of the bidirectional switch due to the above-mentioned defect in the HCT characteristic according to the prior art, it has been considered to increase the detection speed of the HCT and to reduce noise, but it is possible to sufficiently cope with it. This has not been realized, and the method of controlling both of the bidirectional switches to be turned on and off cannot perform power commutation, resulting in a large surge voltage and surge current. The present invention has been made in order to solve the above-mentioned problems of the conventional technique, and drives a semiconductor switching element constituting a bidirectional switch while using the power supply commutation method by the commutation detection method of the conventional technique. It aims to overcome the drawbacks of the commutation detection method by adjusting the timing of the gate signal.

[0006]

A method for generating a gate signal for a PWM cycloconverter according to the present invention is a semiconductor switching element 1 or 2 which constitutes two sets of bidirectional switches in an arm of a PWM cycloconverter of a power supply commutation type. , 3, 4, a commutation overlap period for power commutation is provided between the gate signals of 1 and 4, and a dead time is provided between the gate signals of 1 and 3 and 2 and 4, respectively. .

[0007]

It is necessary to switch the bidirectional switch according to the change in the polarity of the output current. However, since the commutation overlap period is provided between the gate signals of the semiconductor switching elements 1 and 4 forming the two sets of bidirectional switches, It can be switched without disconnecting the output current. Further, since dead time is provided between the gate signals of the semiconductor switching elements 1 and 3 and 2 and 4 in response to the delay in polarity detection of the HCT, there is no possibility of arm short circuit.

[0008]

Embodiments of the present invention will be described below with reference to FIGS. FIG. 5 is a circuit diagram of a high frequency link DC / AC converter including a PWM cycloconverter in which an arm is configured by a bidirectional switch. In FIG. 5, an inverter 15 constituted by semiconductor switching elements 11, 12, 13, 14 provided with a parallel capacitor 10 in a DC input circuit, a high frequency transformer 16, semiconductor switching elements 21 and 22, 23 and 24, 25 and 26, and 27 and PWM cycloconverter 20 constituted by four pairs of bidirectional switches consisting of 28, it is constituted by HCT18 for detecting a current polarity of the smoothing reactor 17 and the smoothing capacitor 19 and the output current i _O provided in the output circuit.

FIG. 6 is a block diagram showing an example of a gate signal generating circuit according to the present invention for on / off controlling the twelve semiconductor switching elements 11-14 and 21-28 in FIG. In FIG. 6, the output signal of the oscillator 31 is the counter 32 and the dead time generation circuits 35 and 3.
5, gate signals S _i1 and S _i4 and S _i2 and S _{i1 for} controlling on / off of the semiconductor switching elements 11 and 14 and 12 and 13 of the inverter 15 in FIG.
Is output. The NOT gate 34 is provided to reverse the on / off control of the semiconductor switching elements 11 and 14 to the on / off control of 12 and 13.

The PWM cycloconverter 2 shown in FIG.
Of the four sets of bidirectional switches constituting 0, the semiconductor switching elements 21 and 27 and 22 and 28 are simultaneously on / off controlled. In addition, the semiconductor switching element 23
And 25 and 24 and 28 are turned on / off at the same time,
These gate signals are output from the signal distributor 53 in FIG. The oscillator 31, the counter 32, and the D / A converter 33 are carrier generation circuits. The output signal of the D / A converter 33 is input to the comparator 37 together with the reference signal, and the output signal thereof is the output signal Q _{n + 1 of the} counter 32.
At the same time, it is input to the EXOR gate 40 and becomes a square wave signal shown in FIG. The output current polarity detection signal detected from the HCT 18 in FIG. 5 is input to the comparator 38, and the output signal is input to the D input terminal of the D-FF 39. The Q _{n + 1} signal of the counter 32 is input to the CLK terminal of the D-FF as a clock signal and output as (l). The output signal (a) of the EXOR gate 40 is input to the ta 'generation circuit 43 and the ta' generation circuit 44 having the NOT gate 41 on the input side, and the square wave (b) and the square wave (c) shown in FIG. Is output. In addition, the ta ″ generation circuit 45 and the NOT gate 4
The output signal from the ta ″ generation circuit 46 having 2 on the input side becomes square waves shown in (e) and (f) of FIG.
The square waves (b) and (c) are input to the NAND gate 50, and the result shown in FIG.
Output square wave (d), while square waves (e) and (f) are t
d square wave (g) and
Output (h). Square wave (d) and (g) are AND gate 51
Becomes a square wave (i) via, and the output signal of the AND gate 52 equipped with the status display signal at one input terminal is a square wave (j).
Becomes The square waves (i), (j), (g), (h), (k), and (l) described above are input to the gate signal distributor 53, and the four sets of bidirectional switches that constitute the PWM cycloconverter 20 are used. It outputs gate signals S _c1 and S _c1 ′, S _c2 and S _c2 ′, S _C3 and S _C3 ′, and S _C4 and S _C4 ′ for on / off controlling certain semiconductor switching elements 21 to 28. FIG. 7 shows the above-mentioned square wave (a)
(j) is a timing chart showing square wave (e) and
The dead time td is generated by (g) and the square waves (f) and (h), and the commutation overlap period ta is generated by (ta′−ta ″).

FIG. 2 shows a representative example of an arm constituting the above-mentioned PWM cycloconverter 20, and the respective gate signals for driving the two sets of bidirectional switches constituting this arm are gated according to the present invention. When generated based on the signal generation method, the timing chart shown in FIG. 1 is obtained. In FIG. 1, the gate signals for driving the semiconductor switching elements 1, 2, 3, 4 in FIG. 2 are S _U , S _U ′, S _L , S _L ′. A commutation overlap period ta for current commutation is provided between the gate signals S _U and S _L ′, and between S _U and S _L and between S _U ′ and S _L ′. Each of them is provided with a dead time td of a bidirectional switch. Therefore, even if the output current is very small and the detection of the current polarity by the HCT is delayed, the bidirectional switch can be reliably switched.

Embodiment of the Present Invention Although the gate signal generation circuit according to FIG. 6 is composed of various discrete elements, it is not limited to this example, and it can be easily composed of an LSI including a CPU. Is. Further, the two-way switch is configured by connecting two P-type semiconductor switching elements in series, but the present invention is also applicable to a two-way switch configured by connecting the same semiconductor switching element with an inverse blocking diode in anti-parallel. The method for generating a gate signal according to is applicable.

[0013]

As described above, the PW according to the present invention
The gate signal generation method of the M cycloconverter is PWM
A method for generating a gate signal of a power supply commutation type PWM cycloconverter, which switches ON / OFF control of a bidirectional switch based on a detection signal of a current polarity detector provided in an output circuit of the cycloconverter, in which two pairs are provided in an arm of the PWM cycloconverter. A commutation overlap period for power commutation is provided between the gate signals respectively driving the four semiconductor switching elements constituting the two-way switch, and the normal operation is performed without any trouble even if the detection delay of HCT occurs. It has a dead time. According to the gate signal generating method of the present invention, a normal HCT, which is apt to cause a delay in polarity detection, can be used, and smooth switching can be realized even when the output current is very small.

[Brief description of drawings]

FIG. 1 is a timing chart of a gate signal according to the present invention.

FIG. 2 is a circuit diagram showing a representative example of one arm in a PWM cycloconverter configured by a bidirectional switch.

FIG. 3 is a waveform chart of output current / voltage and a timing chart of a gate signal during normal operation.

FIG. 4 is a waveform diagram of output current / voltage and a timing chart of a gate signal during abnormal operation.

FIG. 5 is a circuit diagram of a high frequency link DC / AC converter.

FIG. 6 is a gate signal generation circuit showing an embodiment of the present invention.

FIG. 7 is a timing chart of a square wave for generating a gate signal according to the present invention.

[Explanation of symbols]

 1, 2, 3, 4 Semiconductor switching element 5 HCT

Claims (1)

[Claims] 1. A gate signal for ON / OFF controlling two sets of bidirectional switches each comprising semiconductor switching elements [1] and [2] and [3] and [4] constituting one arm in a PWM cycloconverter. A gate signal generation method for a power supply commutation type PWM cycloconverter in which switching control is performed based on a detection signal from a current polarity detector provided in an output circuit of the PWM cycloconverter, wherein a semiconductor forming the two sets of bidirectional switches A commutation overlap period for power commutation is provided between the gate signals of the switching elements [1] and [4], and the gate signals of the semiconductor switching elements [1] and [3] and [2] and [4] are provided. A method for generating a gate signal for a PWM cycloconverter, characterized in that a dead time is provided between them.