JPH07211847A - Semiconductor device, its manufacture, its mounting structure and mounting method - Google Patents

Semiconductor device, its manufacture, its mounting structure and mounting method

Info

Publication number
JPH07211847A
JPH07211847A JP514294A JP514294A JPH07211847A JP H07211847 A JPH07211847 A JP H07211847A JP 514294 A JP514294 A JP 514294A JP 514294 A JP514294 A JP 514294A JP H07211847 A JPH07211847 A JP H07211847A
Authority
JP
Japan
Prior art keywords
semiconductor device
sealing
semiconductor element
main surface
external electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP514294A
Other languages
Japanese (ja)
Inventor
Masanobu Obara
雅信 小原
Yoichi Kitamura
洋一 北村
Masaaki Namatame
雅章 生田目
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP514294A priority Critical patent/JPH07211847A/en
Publication of JPH07211847A publication Critical patent/JPH07211847A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Abstract

PURPOSE:To provide a semiconductor device wherein semiconductor devices can be arranged most densely on a circuit board, by the dimension as approximate as possible to the dimension of a semiconductor element, and the manufacturing method, the mounting structure, and a method of mounting the semiconductor device. CONSTITUTION:A semiconductor element 8, a plurality of metal thin wires 51, and a sealing part 1 of insulative resin which seals the semiconductor element 8, the metal thin wires 51, and connection parts of them are formed. One end portion of the metal thin wire 51 is exposed on the main surface 2 of the sealing part 1, and the exposed part is turned into an external electrode.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、プリント回路配線板
等の回路基板上に最大限密に搭載するのに用いて好適な
半導体装置とその製造方法及びその搭載構造とその搭載
方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device suitable for being mounted on a circuit board such as a printed circuit wiring board as densely as possible, a method for manufacturing the same, a structure for mounting the same, and a method for mounting the same. is there.

【0002】[0002]

【従来の技術】図15は従来の半導体装置を示す斜視図
であり、図において、1はトランスファーモールドによ
り絶縁性の樹脂が封止された封止部であり、この封止部
1には図16に示すように一主面(下面)2と他の主面
(上面)3と側面4が形成されている。5は側面4から
外方に突き出している外部電極リードであり、側面4中
央部から下方に向かって折曲され、その一端部6は半円
状に曲げられてその先端が一主面2の周縁部に接してい
る。この外部電極リード5の他端部7は封止部1中に伸
び、その先端7aは半導体素子8の電極(図示せず)に
金等からなる金属細線9により電気的に接続されてい
る。この構造はLOC(Lead on Chip)構
造と呼ばれ、半導体素子8の表面上に外部電極リード5
の先端7aを伸展し、金属細線9で接続する構造で、半
導体素子8の側面の樹脂封止の厚みを小さくでき、該封
止部1の寸法を小さくできる特徴を有する。
2. Description of the Related Art FIG. 15 is a perspective view showing a conventional semiconductor device. In FIG. 15, reference numeral 1 denotes a sealing portion in which an insulating resin is sealed by transfer molding. As shown in FIG. 16, one main surface (lower surface) 2, another main surface (upper surface) 3 and a side surface 4 are formed. Reference numeral 5 denotes an external electrode lead projecting outward from the side surface 4, which is bent downward from the central portion of the side surface 4, one end portion 6 of which is bent in a semicircular shape and the tip of which is the main surface 2. It touches the periphery. The other end portion 7 of the external electrode lead 5 extends into the sealing portion 1, and its tip 7a is electrically connected to an electrode (not shown) of the semiconductor element 8 by a thin metal wire 9 made of gold or the like. This structure is called a LOC (Lead on Chip) structure, and the external electrode lead 5 is formed on the surface of the semiconductor element 8.
In the structure in which the tip 7a is extended and connected by the thin metal wire 9, the thickness of the resin encapsulation on the side surface of the semiconductor element 8 can be reduced, and the dimension of the encapsulation portion 1 can be reduced.

【0003】この半導体装置は、図17に示すように、
一般にプリント回路配線板(回路基板)11に搭載して
使用される。この半導体装置をプリント回路配線板11
に搭載するには、まず、プリント回路配線板11の表面
に設けられた電極パッド12に外部電極リード5の一端
部6を位置合わせして載置し、はんだ等の接着材料13
を用いて一端部6を電極パッド12に固定し、機械的、
電気的に接続する。
This semiconductor device, as shown in FIG.
Generally, it is mounted on a printed circuit wiring board (circuit board) 11 and used. This semiconductor device is printed circuit board 11
In order to mount it on the printed circuit wiring board 11, one end portion 6 of the external electrode lead 5 is aligned and placed on the electrode pad 12 provided on the surface of the printed circuit wiring board 11, and an adhesive material 13 such as solder is used.
Is used to fix the one end 6 to the electrode pad 12, mechanically,
Connect electrically.

【0004】ところで、上述した半導体装置では、外部
電極リード5が側面4から突出した状態で形成されてい
るので、該半導体装置を多数並べてプリント回路配線板
11上に配置する際には、プリント回路配線板11上の
半導体装置の占有幅は、図16に示すようにW’とな
り、半導体装置の封止部1の幅Wより広くする必要があ
る。さらに、プリント回路配線板11の表面の電極パッ
ド12の寸法W”(図17)は、該装置の外部電極リー
ド5の一端部6の接続部分より大きくする必要があり、
該装置の必要幅W’よりさらに大きくする必要がある。
このため、該半導体装置を密にプリント回路配線板11
上に並べられない欠点があった。
By the way, in the above-described semiconductor device, the external electrode lead 5 is formed so as to project from the side surface 4. Therefore, when a large number of the semiconductor devices are arranged side by side on the printed circuit wiring board 11, the printed circuit is arranged. The occupied width of the semiconductor device on the wiring board 11 is W ′ as shown in FIG. 16, which needs to be wider than the width W of the sealing portion 1 of the semiconductor device. Further, the dimension W ″ (FIG. 17) of the electrode pad 12 on the surface of the printed circuit wiring board 11 needs to be larger than the connecting portion of the one end portion 6 of the external electrode lead 5 of the device,
The width W'needed for the device must be further increased.
Therefore, the semiconductor devices are closely arranged in the printed circuit wiring board 11
There was a drawback that I could not line up.

【0005】そこで、この欠点を解消する半導体装置と
して、図18及び第19に示すような半導体装置が提案
されている。この半導体装置は、一主面2に突起状の外
部電極20が形成されたベース部21とベース部21の
他の主面を被覆する封止樹脂22とからなる。該ベース
部21は積層ガラスエポキシ樹脂製回路基板等からな
り、一主面(下面)2に形成された外部電極20からベ
ース部21の内部に形成されたバイアホール23や、内
部配線24を通してベース部分の他の主面に設けられた
電極パッド25に電気的に接続されている。該ベース部
21に半導体素子8を固着し、金属細線9により該半導
体素子8の電極(図示せず)と該ベース部21の電極パ
ッド25を電気的に接続することにより半導体装置の外
部電極20と接続される。この半導体装置では、外部電
極リードが該半導体装置の側面から突き出していないた
め、該装置の幅寸法より大きくする必要はなく、プリン
ト回路配線板11へ密に配置できる利点を有する。
Therefore, a semiconductor device as shown in FIGS. 18 and 19 has been proposed as a semiconductor device which solves this drawback. This semiconductor device is composed of a base portion 21 having a protrusion-shaped external electrode 20 formed on one main surface 2 and a sealing resin 22 covering the other main surface of the base portion 21. The base portion 21 is made of a laminated glass epoxy resin circuit board or the like, and is formed from the external electrode 20 formed on the one main surface (lower surface) 2 to a via hole 23 formed inside the base portion 21 and an internal wiring 24. It is electrically connected to the electrode pad 25 provided on the other main surface of the portion. The semiconductor element 8 is fixed to the base portion 21, and an electrode (not shown) of the semiconductor element 8 and an electrode pad 25 of the base portion 21 are electrically connected to each other by a thin metal wire 9 to form an external electrode 20 of the semiconductor device. Connected with. In this semiconductor device, since the external electrode leads do not protrude from the side surface of the semiconductor device, it is not necessary to make it larger than the width dimension of the device, and there is an advantage that it can be densely arranged on the printed circuit wiring board 11.

【0006】[0006]

【発明が解決しようとする課題】従来の改良された半導
体装置は以上のように構成されているので、半導体素子
8と電極パッド25とを金属細線9で接続しなければな
らず、封止部1の寸法が半導体素子8の寸法より大きく
なるなどの問題点があった。また、この半導体装置では
該装置の一主面2に突起状に外部電極20が形成されて
いるため、該半導体装置のテストに当たり、テスト装置
の接触端子を位置合わせする際に接触させ難い問題点が
あった。このテストの様子を図により説明する。図20
は該半導体装置のテストの様子を示す側面図である。図
中、30は半導体装置をテストするテスト装置の半導体
装置への接触端子である。該接触端子30は尖った先端
部で半導体装置の一主面2上に配列された外部電極20
に接触する。この時、外部電極20が半導体装置の一主
面2より突出していると接触端子30の先端部が外部電
極20の表面を滑べってしまい該外部電極20からはず
れ易くなり、該外部電極20に接触しないという問題が
生じるなどの問題点があった。
Since the conventional improved semiconductor device is constructed as described above, it is necessary to connect the semiconductor element 8 and the electrode pad 25 with the thin metal wire 9 and the sealing portion. There is a problem that the size of 1 is larger than the size of the semiconductor element 8. Further, in this semiconductor device, since the external electrodes 20 are formed in a protruding shape on the one main surface 2 of the device, it is difficult to make contact when the contact terminals of the test device are aligned when testing the semiconductor device. was there. The state of this test will be described with reference to the drawings. Figure 20
FIG. 4 is a side view showing how the semiconductor device is tested. In the figure, 30 is a contact terminal to the semiconductor device of the test device for testing the semiconductor device. The contact terminals 30 have sharp tips and are arranged on the main surface 2 of the semiconductor device.
To contact. At this time, if the external electrode 20 projects from the main surface 2 of the semiconductor device, the tip of the contact terminal 30 slips on the surface of the external electrode 20 and is easily disengaged from the external electrode 20. There was a problem such as the problem of not contacting with.

【0007】更に、この半導体装置をプリント回路配線
板11上に搭載する場合、該外部電極20がプリント回
路配線板11上の電極パッド12の寸法より大きいた
め、搭載後にその接合部分の信頼性に問題が生じる等の
欠点があった。この様子を図により説明する。図21
は、一主面2に外部電極20が形成された半導体装置
(半導体装置内部の構造は図示されていない)をプリン
ト回路配線板11に搭載した状態を示す側断面図であ
る。図22は半導体装置の外部電極20がプリント回路
配線板11の電極パッド12に接続された状態を示す拡
大断面図である。一般的には外部電極20は電極パッド
12より小さいため、半導体装置とプリント回路配線板
11の構成材料の熱膨張係数の違いにより熱歪みが電極
接合部に生じる。この歪みは主に接着材料13の上下部
分で生じ、寸法が大きいプリント回路配線板11の電極
パッド12側よりも、小さい半導体装置の外部電極20
側に発生しやすい。このため外部電極20側に熱歪みが
蓄積されて最終的にクラック13aが生じ、接合部の破
壊をもたらすなどの問題点があった。
Furthermore, when this semiconductor device is mounted on the printed circuit wiring board 11, since the external electrodes 20 are larger than the size of the electrode pads 12 on the printed circuit wiring board 11, the reliability of the joint portion after mounting is improved. There were drawbacks such as problems. This situation will be described with reference to the drawings. Figure 21
FIG. 4 is a side sectional view showing a state in which a semiconductor device having an external electrode 20 formed on one main surface 2 (the internal structure of the semiconductor device is not shown) is mounted on printed circuit wiring board 11. FIG. 22 is an enlarged sectional view showing a state in which the external electrodes 20 of the semiconductor device are connected to the electrode pads 12 of the printed circuit wiring board 11. Since the external electrode 20 is generally smaller than the electrode pad 12, thermal strain occurs at the electrode bonding portion due to the difference in thermal expansion coefficient between the constituent materials of the semiconductor device and the printed circuit wiring board 11. This distortion mainly occurs in the upper and lower parts of the adhesive material 13, and is smaller than the external electrode 20 of the semiconductor device, which is smaller than the electrode pad 12 side of the large-sized printed circuit wiring board 11.
It tends to occur on the side. Therefore, there is a problem that thermal strain is accumulated on the side of the external electrode 20 and finally the crack 13a is generated, resulting in destruction of the joint portion.

【0008】前記半導体装置をプリント回路配線板11
に固定する場合、粘着性を有するフラックス等の保持材
料が用いられる。ここで、該半導体装置をプリント回路
配線板11に搭載する方法について説明する。図23は
一主面2に外部電極20,20,……が形成された半導
体装置をプリント回路配線板11に搭載する方法を示す
図であり、図において、41は該半導体装置をプリント
回路配線板11上で位置合わせしてはんだで固着するま
で該半導体装置を保持し、はんだを加熱し溶融させて固
着させる際にはんだを活性化する為のフラックス等の保
持材料である。また、半導体装置の外部電極20はプリ
ント回路配線板11に接続するのに十分な量のはんだで
被覆されている。
The semiconductor device is mounted on the printed circuit wiring board 11
In the case of fixing to, a holding material such as an adhesive flux is used. Here, a method of mounting the semiconductor device on the printed circuit wiring board 11 will be described. 23 is a diagram showing a method of mounting a semiconductor device having external electrodes 20, 20, ... Formed on one main surface 2 on a printed circuit wiring board 11. In the figure, reference numeral 41 denotes the printed circuit wiring. It is a holding material such as a flux for holding the semiconductor device until it is aligned on the plate 11 and fixed by solder, and activates the solder when the solder is heated and melted and fixed. Also, the external electrodes 20 of the semiconductor device are coated with a sufficient amount of solder to connect to the printed circuit wiring board 11.

【0009】この方法では、まず、プリント回路配線板
11の電極パッド12,12,……を覆うように保持材
料41を滴下する(同図(a))。この時、保持材料4
1は表面張力により略半球状になる。次いで、電極パッ
ド12,12,……上に半導体装置を移動させて位置合
わせを行ない、これらの電極パッド12,12,……上
に該半導体装置を載置する(同図(b))。この状態で
は、保持材料41はプリント回路配線板11と半導体装
置の隙間に充満し、その粘着性により半導体装置の一主
面2とプリント回路配線板11の表面とを動かないよう
に保持する。次いで、全体を加熱することにより半導体
装置の外部電極20のはんだが溶融し、プリント回路配
線板11の電極パッド12の表面を濡らす。この状態で
室温まで冷却することによりはんだを凝固させて半導体
装置をプリント回路配線板11に固着させる。
In this method, first, the holding material 41 is dropped so as to cover the electrode pads 12, 12, ... Of the printed circuit wiring board 11 (FIG. 1 (a)). At this time, the holding material 4
1 has a substantially hemispherical shape due to surface tension. Next, the semiconductor device is moved onto the electrode pads 12, 12, ... For alignment, and the semiconductor device is mounted on these electrode pads 12, 12 ,. In this state, the holding material 41 fills the gap between the printed circuit wiring board 11 and the semiconductor device, and its adhesiveness holds the one main surface 2 of the semiconductor device and the surface of the printed circuit wiring board 11 so as not to move. Then, by heating the whole, the solder of the external electrode 20 of the semiconductor device is melted and wets the surface of the electrode pad 12 of the printed circuit wiring board 11. By cooling to room temperature in this state, the solder is solidified and the semiconductor device is fixed to the printed circuit wiring board 11.

【0010】この方法では、プリント回路配線板11上
の半導体装置を搭載する位置に保持材料41を滴下する
工程が必要となり、はんだ接着後の残留の保持材料41
を洗浄して除去する必要があり、余分な工程が必要にな
るという欠点があった。また、半導体装置の外部電極2
0の高さのばらつきがあると高さの低い外部電極20は
電極パッド12と接合されず、接続不良が発生するとい
う欠点もあった。
This method requires a step of dropping the holding material 41 on the position where the semiconductor device is mounted on the printed circuit wiring board 11, and the holding material 41 remaining after solder bonding is used.
Had to be removed by washing, which had the drawback of requiring an extra step. In addition, the external electrode 2 of the semiconductor device
If there is a variation in height of 0, the external electrode 20 having a low height is not joined to the electrode pad 12 and there is a drawback that a connection failure occurs.

【0011】また、この半導体装置をプリント回路配線
板11に搭載する他の方法として、はんだや導電性の接
着樹脂等の接着材料をプリント回路配線板11上に塗布
して用いる方法が用いられている。図24は該半導体装
置をプリント回路配線板11に搭載する他の方法を示す
図であり、図において42は外部電極20を電極パッド
12上に機械的、電気的に固着させるもので、はんだ、
導電性の接着樹脂等からなる接着材料である。
As another method of mounting the semiconductor device on the printed circuit wiring board 11, a method of applying an adhesive material such as solder or conductive adhesive resin on the printed circuit wiring board 11 and using it is used. There is. FIG. 24 is a view showing another method of mounting the semiconductor device on the printed circuit wiring board 11, in which reference numeral 42 is a member for mechanically and electrically fixing the external electrode 20 onto the electrode pad 12 by soldering,
It is an adhesive material made of a conductive adhesive resin or the like.

【0012】この方法では、まず、スクリーン印刷等に
より、該半導体装置の外部電極20,20,……を接続
すべき電極パッド12,12,……上に接着材料42を
パターニングする(同図(a))。次いで、電極パッド
12,12,……上に半導体装置を移動させて位置合わ
せを行ない、これら電極パッド12,12,……上に該
半導体装置を載置する(同図(b))。この状態では、
パターンニングされた接着材料42は半導体装置の外部
電極20に付着し、該半導体装置を該プリント回路配線
板11上で動かないように保持する。電極パッド20の
間隔が小さい場合や、接着材料42の量が多すぎる場合
には、隣合わせる該接着材料42のパターンどうしが接
触しショート部分42aが生じる。この状態で加熱する
ことにより該半導体装置の外部電極20と該プリント回
路配線板11の電極パッド12間を接続する。
In this method, first, an adhesive material 42 is patterned on the electrode pads 12, 12, ... To which the external electrodes 20, 20, ... Of the semiconductor device are connected by screen printing or the like (see FIG. a)). Next, the semiconductor device is moved onto the electrode pads 12, 12, ... For alignment, and the semiconductor device is placed on these electrode pads 12, 12 ,. In this state,
The patterned adhesive material 42 adheres to the external electrodes 20 of the semiconductor device and holds the semiconductor device stationary on the printed circuit wiring board 11. When the distance between the electrode pads 20 is small or when the amount of the adhesive material 42 is too large, the adjacent patterns of the adhesive material 42 are brought into contact with each other to form a short portion 42a. By heating in this state, the external electrodes 20 of the semiconductor device and the electrode pads 12 of the printed circuit wiring board 11 are connected.

【0013】この方法では、外部電極20の高さに若干
のばらつきがあってもこのばらつきを吸収して旨く接合
できる長所があるが、外部電極20のピッチが狭くなる
と接着材料42のパターンニングや、半導体装置搭載の
際に、隣合わせの接着材料42のパターン同士が接触し
易くなり、加熱固着後も接触部分がそのまま残り、電気
的なショート不良が生じ易いなどの問題点があった。
This method has an advantage that even if there is a slight variation in the height of the external electrode 20, the variation can be absorbed and the bonding can be successfully performed. However, if the pitch of the external electrode 20 becomes narrow, patterning of the adhesive material 42 or However, when mounting the semiconductor device, the patterns of the adhesive material 42 adjacent to each other are likely to come into contact with each other, and the contact portion remains as it is even after heating and fixing, so that there is a problem in that an electrical short defect is likely to occur.

【0014】この発明は上記のような問題点を解消する
ためになされたもので、請求項1ないし10の発明は半
導体素子の寸法にできるだけ近い寸法で最大限密に回路
基板上に配置できる半導体装置を得ることを目的として
おり、また請求項11ないし15の発明はこの半導体装
置に適した製造方法を提供することを目的としており、
また請求項16の発明は構成全体の信頼性が向上した半
導体装置の搭載構造を得ることを目的としており、さら
に、請求項17の発明は半導体装置を回路基板上に信頼
性良く搭載する搭載方法を提供することを目的とする。
The present invention has been made to solve the above problems, and the inventions of claims 1 to 10 are semiconductors which can be arranged on a circuit board as close as possible to the size of a semiconductor element and on a circuit board as densely as possible. It is an object of the present invention to obtain a device, and the invention of claims 11 to 15 aims to provide a manufacturing method suitable for this semiconductor device,
Further, the invention of claim 16 aims at obtaining a mounting structure of a semiconductor device in which the reliability of the entire configuration is improved, and the invention of claim 17 further mounts the semiconductor device on a circuit board with high reliability. The purpose is to provide.

【0015】[0015]

【課題を解決するための手段】この請求項1の発明に係
る半導体装置は、電子回路が形成された半導体素子と、
該半導体素子に電気的に接続され、その一端部を外部電
極とした複数の金属細条と、前記一端部が封止面の一主
面上に露出するように、前記半導体素子、複数の金属細
条及び該半導体素子と金属細条との接続部を封止し、か
つ絶縁性を有する樹脂からなる封止部とを備えたもので
ある。
A semiconductor device according to the invention of claim 1 is a semiconductor device having an electronic circuit,
A plurality of metal strips that are electrically connected to the semiconductor element and have one end as an external electrode, and the semiconductor element and the plurality of metals so that the one end is exposed on one main surface of the sealing surface. It is provided with a strip and a sealing portion which seals a connecting portion between the semiconductor element and the metal strip and is made of a resin having an insulating property.

【0016】また、請求項2の発明に係る半導体装置
は、前記金属細条の少なくともその一部を階段状に折曲
したものである。
Further, in a semiconductor device according to a second aspect of the present invention, at least a part of the metal strip is bent stepwise.

【0017】また、請求項3の発明に係る半導体装置
は、複数の前記金属細条を、一端部が前記一主面上の周
辺部に配置された複数の長片細条と、一端部が前記周辺
部より内側の領域内の前記一主面上に配置され、前記長
片細条より短い複数の短片細条とから構成したものであ
る。
According to a third aspect of the present invention, in a semiconductor device, a plurality of metal strips are provided, and one end portion is provided with a plurality of long strip strips arranged at a peripheral portion on the one main surface. The plurality of short strips arranged on the one main surface in the region inside the peripheral portion and shorter than the long strips.

【0018】また、請求項4の発明に係る半導体装置
は、前記一端部の先端部分を前記一主面の面方向に折曲
し、該先端部分の外面を外部電極としたものである。
Further, in the semiconductor device according to the invention of claim 4, the tip portion of the one end portion is bent in the surface direction of the one main surface, and the outer surface of the tip portion serves as an external electrode.

【0019】また、請求項5の発明に係る半導体装置
は、電子回路が形成された半導体素子と、該半導体素子
に電気的に接続され、かつ該接続部から所定の位置に外
部電極となる突起を有する複数の金属細条と、前記突起
の少なくともその一部を封止面の一主面上に露出または
突出させるように、前記半導体素子、複数の金属細条及
び該半導体素子と金属細条との接続部を封止し、かつ絶
縁性を有する樹脂からなる封止部とを備えたものであ
る。
Further, a semiconductor device according to a fifth aspect of the present invention is a semiconductor element having an electronic circuit formed thereon and a projection electrically connected to the semiconductor element and serving as an external electrode at a predetermined position from the connection portion. A plurality of metal strips having a plurality of metal strips, and the semiconductor element, the plurality of metal strips, and the semiconductor element and the metal strips so that at least a part of the protrusion is exposed or projected on one main surface of the sealing surface. And a sealing portion made of a resin having an insulating property.

【0020】また、請求項6の発明に係る半導体装置
は、電子回路が形成された半導体素子と、該半導体素子
に電気的に接続され、かつ該接続部から所定の位置に所
定の長さ折り曲げて外部電極とした折曲部を有する複数
の金属細条と、前記折曲部の少なくともその一部を封止
面の一主面上に露出または突出させるように、前記半導
体素子、複数の金属細条及び該半導体素子と金属細条と
の接続部を封止し、かつ絶縁性を有する樹脂からなる封
止部とを備えたものである。
According to a sixth aspect of the present invention, there is provided a semiconductor device in which an electronic circuit is formed, a semiconductor element and the semiconductor element are electrically connected to the semiconductor element and are bent from the connection portion to a predetermined position by a predetermined length. A plurality of metal strips each having a bent portion that serves as an external electrode, and the semiconductor element and the plurality of metals so that at least a part of the bent portion is exposed or projected on one main surface of the sealing surface. It is provided with a strip and a sealing portion which seals a connecting portion between the semiconductor element and the metal strip and is made of a resin having an insulating property.

【0021】また、請求項7の発明に係る半導体装置
は、前記外部電極の表面を前記一主面に対して窪んだ状
態としたものである。
Further, in the semiconductor device according to the invention of claim 7, the surface of the external electrode is recessed with respect to the one main surface.

【0022】また、請求項8の発明に係る半導体装置
は、前記一主面上の前記外部電極の周囲に、接着材料に
対して濡れ性が良く、かつ該接着材料と固着する金属層
を形成したものである。
Further, in the semiconductor device according to the invention of claim 8, a metal layer having good wettability with the adhesive material and fixed to the adhesive material is formed around the external electrode on the one main surface. It was done.

【0023】また、請求項9の発明に係る半導体装置
は、前記一主面上の前記外部電極の設けられていない領
域部分に、接着材料に対して濡れ性が良く、かつ該接着
材料と固着する金属層を形成したものである。
According to a ninth aspect of the present invention, in a semiconductor device, a region portion of the one main surface where the external electrode is not provided has good wettability with an adhesive material and is fixed to the adhesive material. The metal layer is formed.

【0024】また、請求項10の発明に係る半導体装置
は、前記接着材料をペースト状のはんだまたはシート状
のはんだのいずれか1種としたものである。
In the semiconductor device according to the invention of claim 10, the adhesive material is one of paste-like solder and sheet-like solder.

【0025】また、請求項11の発明に係る半導体装置
の製造方法は、電子回路が形成された半導体装置と外部
リードとなる複数の金属細条とを電気的に接続する接続
工程と、前記金属細条の一主面が封止面の一主面に露出
するように、該金属細条を配置し、前記半導体素子、複
数の金属細条及び該半導体素子と金属細条との接続部
を、絶縁性を有する樹脂により封止する封止工程と、前
記金属細条の露出部分の一部を、封止した樹脂の表面か
ら離間するように該表面の上方へ折り曲げる折曲工程
と、折り曲げた該金属細条を所定の長さに切断する切断
工程とを備えたものである。
According to the eleventh aspect of the present invention, there is provided a method of manufacturing a semiconductor device, which comprises a connecting step of electrically connecting a semiconductor device having an electronic circuit formed thereon and a plurality of metal strips serving as external leads, and the metal. The metal strips are arranged such that one main surface of the strips is exposed to one main surface of the sealing surface, and the semiconductor element, the plurality of metal strips, and the connecting portion between the semiconductor element and the metal strips are arranged. A sealing step of sealing with an insulative resin, a bending step of bending a part of the exposed portion of the metal strip above the surface of the sealed resin, and a bending step. And a cutting step of cutting the metal strip into a predetermined length.

【0026】また、請求項12の発明に係る半導体装置
の製造方法は、電子回路が形成された半導体素子と、先
端部から所定の位置に突起を有する複数の金属細条の各
先端部とを電気的に接続する接続工程と、前記突起の少
なくとも一部を封止面の一主面より露出または突出させ
るように該金属細条を配置し、前記半導体素子、複数の
金属細条及び該半導体素子と金属細条との接続部を絶縁
性を有する樹脂により封止する封止工程と、前記金属細
条の封止面から外方へ伸びる部分を該封止面に沿って切
断する切断工程とを備えたものである。
According to a twelfth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a semiconductor element having an electronic circuit formed thereon; and a plurality of metal strips each having a projection at a predetermined position from the tip. A connecting step of electrically connecting and arranging the metal strip so that at least a part of the protrusion is exposed or projected from one main surface of the sealing surface, and the semiconductor element, the plurality of metal strips, and the semiconductor A sealing step of sealing the connection between the element and the metal strip with a resin having an insulating property, and a cutting step of cutting a portion of the metal strip extending outward from the sealing surface along the sealing surface. It is equipped with and.

【0027】また、請求項13の発明に係る半導体装置
の製造方法は、電子回路が形成された半導体素子と、先
端部から所定の位置に所定の長さを折り曲げて外部電極
とした折曲部を有する複数の金属細条の各先端部とを電
気的に接続する接続工程と、前記折曲部の少なくとも一
部を封止面の一主面より露出または突出させるように該
金属細条を配置し、前記半導体素子、複数の金属細条及
び該半導体素子と金属細条との接続部を絶縁性を有する
樹脂により封止する封止工程と、前記金属細条の封止面
から外方へ伸びる部分を該封止面に沿って切断する切断
工程とを備えたものである。
According to a thirteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a semiconductor element having an electronic circuit formed therein and a bent portion which is an external electrode by bending a predetermined length from a tip portion to a predetermined position. A connecting step of electrically connecting each of the tip ends of the plurality of metal strips having the metal strips to expose or project at least a part of the bent portion from one main surface of the sealing surface. A sealing step of arranging and sealing the semiconductor element, a plurality of metal strips and a connecting portion between the semiconductor element and the metal strip with a resin having an insulating property; And a cutting step of cutting a portion extending to the direction along the sealing surface.

【0028】また、請求項14の発明に係る半導体装置
の製造方法は、前記封止工程を、一面に前記突起または
前記折曲部のいずれかの高さより浅い深さの窪みである
第1の凹部が形成された金型の上型となる第1の金型本
体と、一面の前記第1の凹部と対向する位置に前記半導
体素子を収納する窪みである第2の凹部が形成された金
型の下型となる第2の金型本体とを有する封止用金型を
用い、第2の凹部に前記半導体素子を収納し、前記第1
の金型本体の一面と前記第2の金型本体の一面を対向さ
せて密着させることにより前記金属細条を挾持して前記
突起または前記折曲部のいずれかの上端部を前記第1の
凹部の底面に圧接させ、これら第1の凹部及び第2の凹
部により囲まれる樹脂封止領域に前記樹脂を注入する樹
脂封止工程としたものである。
According to a fourteenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the encapsulation step is a dent having a depth shallower than the height of either the protrusion or the bent portion. A first mold body, which is an upper mold of a mold in which a recess is formed, and a mold, in which a second recess, which is a recess for accommodating the semiconductor element, is formed at a position facing the first recess on one surface. Using the sealing mold having a second mold body which is a lower mold of the mold, the semiconductor element is housed in the second recess, and the first mold is used.
The one face of the mold body and the one face of the second mold body are opposed to and brought into close contact with each other so that the metal strip is held and the upper end of any one of the protrusion or the bent portion is fixed to the first face. This is a resin sealing step of press-contacting the bottom surface of the recess and injecting the resin into the resin sealing region surrounded by the first recess and the second recess.

【0029】また、請求項15の発明に係る半導体装置
の製造方法は、前記封止工程を、一面に前記突起または
前記折曲部のいずれかの高さより浅い深さの窪みである
第1の凹部が形成され、該第1の凹部の底面の前記突起
または前記折曲部のいずれかの上端部に一致する位置に
前記突起または該折曲部の上端部が封止面より突出する
ように該上端部を収納する収納部が形成された金型の上
型となる第1の金型本体と、一面の前記第1の凹部と対
向する位置に前記半導体素子を収納する窪みである第2
の凹部が形成された金型の下型となる第2の金型本体と
を有する封止用金型を用い、前記第2の凹部に前記半導
体素子を収納し、前記第1の金型本体の一面と前記第2
の金型本体の一面を対向させて密着させることにより前
記金属細条を挾持して前記突起または前記折曲部のいず
れかの上端部を前記収納部に収納し、これら第1の凹部
及び第2の凹部により囲まれる樹脂封止領域に前記樹脂
を注入する樹脂封止工程としたものである。
According to a fifteenth aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the encapsulation step is a dent having a depth shallower than the height of either the protrusion or the bent portion. A recess is formed so that the projection or the upper end of the bent portion projects from the sealing surface at a position corresponding to the upper end of the projection or the bent portion on the bottom surface of the first recess. A first mold body, which is an upper mold of a mold in which a storage part for storing the upper end part is formed, and a recess that stores the semiconductor element at a position facing the first recessed part on one surface.
Using a sealing mold having a second mold body which is a lower mold of the mold in which the recess is formed, the semiconductor element is housed in the second recess, and the first mold body is used. One side and the second
The one side of the mold body is made to face and closely adhere to the metal strip, and the upper end of either the protrusion or the bent portion is stored in the storage portion. This is a resin sealing step of injecting the resin into a resin sealing region surrounded by two concave portions.

【0030】また、請求項16の発明に係る半導体装置
の搭載構造は、一主面上に、複数の外部電極と接着材料
に対して濡れ性が良く、かつ該接着材料と固着する金属
層とを有する半導体装置と、一面上に前記外部電極を載
置する電極パッドと前記金属層を固着する固着用パッド
とを有する回路基板と、前記金属層及び固着用パッド
に、各々の全面に広がった状態で固着し、かつ、その固
着した高さが前記外部電極の高さより低い接着材料とを
備えたものである。
Further, in the semiconductor device mounting structure according to the sixteenth aspect of the present invention, a plurality of external electrodes and a metal layer having good wettability to the adhesive material and fixed to the adhesive material are provided on one main surface. A semiconductor device having: a circuit board having an electrode pad for mounting the external electrode on one surface and a fixing pad for fixing the metal layer; and the metal layer and the fixing pad spread over the entire surface of each. And an adhesive material that is fixed in the state and has a fixed height lower than the height of the external electrode.

【0031】また、請求項17の発明に係る半導体装置
の搭載方法は、半導体装置の一主面上に設けられた複数
の外部電極をそれぞれ載置する複数の電極パッドと、該
一主面上に設けられた金属層を固着する固着用パッドと
を有する回路基板の該固着用パッド上に、接着材料の占
める面積が該固着用パッドの面積より小さくかつその高
さが前記外部電極の高さより高くなるように、前記金属
層と濡れ性が良くかつ固着する接着材料を付着させる付
着工程と、該接着材料上に前記金属層が、前記電極パッ
ド上に前記外部電極がそれぞれ位置するように回路基板
上で半導体装置の位置合わせを行ない、該回路基板上に
該半導体装置を載置する載置工程と、前記接着材料を前
記金属層及び固着用パッド各々の全面に広げ、該固着用
パッドに前記接着材料を介して前記金属層を固着させる
とともに、前記電極パッドに前記外部電極を接続する接
続工程とを備えたものである。
According to a seventeenth aspect of the present invention, there is provided a method of mounting a semiconductor device, wherein a plurality of external electrodes provided on one main surface of the semiconductor device are respectively mounted on the plurality of electrode pads, and the one main surface is provided. An area occupied by the adhesive material is smaller than the area of the fixing pad on the fixing pad of the circuit board having a fixing pad for fixing the metal layer, and the height is higher than the height of the external electrode. An adhesion step of adhering an adhesive material that has high wettability and adheres to the metal layer so that the metal layer is on the adhesive material, and the external electrode is on the electrode pad. A mounting step of aligning the semiconductor device on the substrate and mounting the semiconductor device on the circuit board, and spreading the adhesive material on the entire surface of each of the metal layer and the fixing pad, and Adhesion Together to fix the metal layer via a charge, in which a connecting step of connecting the external electrode to the electrode pad.

【0032】[0032]

【作用】この請求項1の発明における半導体装置は、一
端部が外部電極となる複数の金属細条と、前記一端部を
一主面上に露出するように、前記半導体素子、複数の金
属細条及び該半導体素子と金属細条との接続部を封止
し、かつ、絶縁性を有する樹脂からなる封止部とによ
り、該外部電極が前記一主面の面方向外方に突出するこ
とがなくなり、該半導体装置が搭載される回路基板の電
極パッドも前記一主面と略同等の面積内に配列され、該
半導体装置の回路基板上に占める面積が前記一主面と略
同等の面積となる。これより、該半導体装置を回路基板
上に隙間なく最大限密に配置することが可能になる。
According to the semiconductor device of the present invention, a plurality of metal strips each having one end serving as an external electrode, the semiconductor element and the plurality of metal strips exposing the one end on one main surface. The external electrode protruding outward in the plane direction of the one main surface by means of a strip and a sealing portion which seals a connecting portion between the semiconductor element and the metal strip and which is made of a resin having an insulating property. And the electrode pads of the circuit board on which the semiconductor device is mounted are also arranged in an area substantially equal to the one main surface, and the area occupied on the circuit board of the semiconductor device is approximately the same area as the one main surface. Becomes As a result, it becomes possible to arrange the semiconductor devices on the circuit board as closely as possible without leaving a gap.

【0033】また、請求項2の発明における半導体装置
は、前記金属細条の少なくとも一部を階段状に折曲した
ことにより、該半導体装置の封止時またはそれ以前に該
金属細条に外力が加わってもこの折曲部により外力が吸
収され、該金属細条が折れ曲がる等の不具合がなくな
る。また、封止後に該金属細条に外力が加わっても該金
属細条が封止部から抜け出るおそれがない。
In the semiconductor device according to the second aspect of the present invention, since at least a part of the metal strip is bent in a stepwise manner, an external force is applied to the metal strip at or before the semiconductor device is sealed. Even if a force is applied, the bent portion absorbs an external force, and the trouble such as bending of the metal strip is eliminated. Moreover, even if an external force is applied to the metal strip after sealing, the metal strip is unlikely to come out of the sealing portion.

【0034】また、請求項3の発明における半導体装置
は、複数の前記金属細条を一端部が前記一主面上の周辺
部に配置された複数の長片細条と、一端部が前記周辺部
より内側の前記一主面上に配置され、前記長片細条より
短い複数の短片細条とから構成したことにより、前記一
主面上の外部電極リードの数が増加する。
According to a third aspect of the present invention, in a semiconductor device, a plurality of metal strips are provided, one end of which is a plurality of long strips arranged in a peripheral portion on the one main surface, and one end of which is the peripheral portion. The number of external electrode leads on the one main surface is increased by being arranged on the one main surface inside the portion and composed of a plurality of short strips shorter than the long strip.

【0035】また、請求項4の発明における半導体装置
は、前記一端部の先端部分を前記一主面の面方向に折曲
し、該折曲された先端部分の外面を外部電極としたこと
により、外部電極の接触面が大きくなる。また、先端部
分の折曲する位置を変えることにより接触面の面積及び
形状を任意に設定することが可能となる。
In the semiconductor device according to the invention of claim 4, the tip portion of the one end portion is bent in the surface direction of the one main surface, and the outer surface of the bent tip portion is used as an external electrode. , The contact surface of the external electrode becomes large. Further, the area and shape of the contact surface can be arbitrarily set by changing the bending position of the tip portion.

【0036】また、請求項5の発明における半導体装置
は、所定の位置に外部電極となる突起を有する複数の金
属細条と、前記突起の少なくともその一部が一主面上に
露出または突出するように、前記半導体素子、複数の金
属細条及び該半導体素子と金属細条との接続部を封止
し、かつ絶縁性を有する樹脂からなる封止部とにより、
該外部電極が一主面の面方向外方に突出することがなく
なり、したがって、該半導体装置の回路基板上に占める
面積が前記一主面と略同等の面積となり、該半導体装置
を回路基板上に隙間なく最大限密に配置することが可能
となる。
Further, in the semiconductor device according to the invention of claim 5, a plurality of metal strips having projections to be external electrodes at predetermined positions, and at least a part of the projections are exposed or projected on one main surface. As described above, the semiconductor element, the plurality of metal strips, and the sealing portion that seals the connection portion between the semiconductor element and the metal strip and is made of a resin having an insulating property,
The external electrode does not project outward in the plane direction of the one main surface, and therefore, the area occupied by the semiconductor device on the circuit board becomes substantially the same as the one main surface, and the semiconductor device is placed on the circuit board. It is possible to arrange them as close as possible to each other without any gap.

【0037】また、請求項6の発明における半導体装置
は、所定の位置に外部電極となる折曲部を有する複数の
金属細条と、前記折曲部の少なくともその一部が一主面
上に露出または突出するように、前記半導体素子、複数
の金属細条及び該半導体素子と金属細条との接続部を封
止し、かつ絶縁性を有する樹脂からなる封止部とによ
り、該外部電極が一主面の面方向外方に突出することが
なくなり、したがって、該半導体装置の回路基板上に占
める面積が前記一主面と略同等の面積となり、該半導体
装置を回路基板上に隙間なく最大限密に配置することが
可能となる。
According to a sixth aspect of the present invention, in a semiconductor device, a plurality of metal strips having bent portions to be external electrodes at predetermined positions, and at least a part of the bent portions are formed on one main surface. The external electrode is formed by the semiconductor element, the plurality of metal strips, and the sealing portion made of a resin having an insulating property for sealing the connection portion between the semiconductor element and the metal strip so as to be exposed or projected. Does not project outward in the plane direction of the one main surface, and therefore, the area occupied on the circuit board of the semiconductor device is substantially the same as that of the one main surface, and the semiconductor device can be placed on the circuit board without any gap. It is possible to arrange them as densely as possible.

【0038】また、請求項7の発明における半導体装置
は、前記外部電極の表面を前記一主面に対して窪んだ状
態としたことにより、電気特性を測定する際に用いられ
る接触端子の先端部が該外部電極の表面に接触した状態
を保持する。したがって前記先端部が外部電極から外れ
るおそれがなくなる。
Further, in the semiconductor device according to the invention of claim 7, the surface of the external electrode is recessed with respect to the one main surface, so that the tip portion of the contact terminal used when measuring the electrical characteristics. Keeps contact with the surface of the external electrode. Therefore, there is no possibility that the tip portion will come off from the external electrode.

【0039】また、請求項8の発明における半導体装置
は、前記外部電極の周囲に、接着材料に対して濡れ性が
良く、かつ該接着材料と固着する金属層を形成したこと
により、該金属層を前記接着材料を介して回路基板上の
電極パッドの周囲に設けられた固着用パッドに固着させ
て該半導体装置を回路基板上に固定する。この場合、前
記金属層が固定に要する機械的強度のかなりの部分を負
担することになり、したがって外部電極の面積を電気的
接続に必要な最小の面積まで小さくすることが可能とな
る。
Further, in the semiconductor device according to the invention of claim 8, a metal layer which has good wettability with the adhesive material and is fixed to the adhesive material is formed around the external electrode. Is fixed to the fixing pad provided around the electrode pad on the circuit board via the adhesive material to fix the semiconductor device on the circuit board. In this case, the metal layer bears a considerable part of the mechanical strength required for fixing, and therefore the area of the external electrode can be reduced to the minimum area required for electrical connection.

【0040】また、請求項9の発明における半導体装置
は、前記一主面上の前記外部電極の設けられていない領
域部分に、接着材料に対して濡れ性が良く、かつ該接着
材料と固着する金属層を形成したことにより、該金属層
を前記接着材料を介して回路基板上に設けられた固着用
パッドに固着させて該半導体装置を回路基板上に固定す
る。前記金属層は固定に要する機械的強度のかなりの部
分を負担するので、外部電極の面積を電気的接続に必要
な最小の面積まで小さくすることが可能となる。
According to a ninth aspect of the present invention, the semiconductor device has good wettability with respect to an adhesive material and is fixed to the adhesive material in a region portion on the one main surface where the external electrode is not provided. By forming the metal layer, the metal layer is fixed to the fixing pad provided on the circuit board via the adhesive material to fix the semiconductor device on the circuit board. Since the metal layer bears a considerable part of the mechanical strength required for fixing, the area of the external electrode can be reduced to the minimum area required for electrical connection.

【0041】また、請求項10の発明における半導体装
置は、前記接着材料を、ペースト状のはんだ、またはシ
ート状のはんだのいずれか1種としたことにより、該は
んだを介して金属層と固着用パッドとを固着させ、該半
導体装置を回路基板上に固定する。
Further, in the semiconductor device according to the invention of a tenth aspect, the adhesive material is one of paste-like solder and sheet-like solder, and is fixed to the metal layer through the solder. The semiconductor device is fixed on the circuit board by fixing it to the pad.

【0042】また、請求項11の発明における半導体装
置の製造方法は、前記金属細条の一主面が封止面の一主
面に露出するように、該金属細条を配置し前記半導体素
子、複数の金属細条及び該半導体素子と金属細条との接
続部を、絶縁性を有する樹脂により封止する封止工程
と、前記金属細条の露出部分の一部を、封止した樹脂の
表面から離間する方向へ折り曲げる折曲工程と、折り曲
げた該金属細条を所定の長さに切断する切断工程によ
り、封止部の一主面上に、金属細条の露出部分を折曲し
た外部電極を形成するので、該外部電極の間隔を任意に
設定することが可能となる。
According to the eleventh aspect of the present invention, in the method of manufacturing a semiconductor device, the metal strip is arranged such that one main surface of the metal strip is exposed at one main surface of the sealing surface. A sealing step of sealing a plurality of metal strips and a connecting portion between the semiconductor element and the metal strips with an insulating resin, and a resin obtained by sealing a part of the exposed portion of the metal strips. The exposed part of the metal strip is bent on one main surface of the sealing part by a bending process of bending the metal strip in a direction away from the surface and a cutting process of cutting the bent metal strip to a predetermined length. Since the external electrodes are formed, the interval between the external electrodes can be set arbitrarily.

【0043】また、請求項12の発明における半導体装
置の製造方法は、前記突起の少なくとも一部が封止面の
一主面より露出または突出するように該金属細条を配置
し、前記半導体素子、複数の金属細条及び該半導体素子
と金属細条との接続部を絶縁性を有する樹脂により封止
する封止工程と、前記金属細条の封止面から外方へ伸び
る部分を該封止面に沿って切断する切断工程により、封
止部の一主面上に、露出または突出した外部電極を形成
するので、該外部電極の間隔を任意に設定することが可
能になる。
According to a twelfth aspect of the present invention, in the method of manufacturing a semiconductor device, the metal strip is arranged so that at least a part of the protrusion is exposed or protruded from one main surface of the sealing surface, and the semiconductor element is provided. A sealing step of sealing a plurality of metal strips and a connecting portion between the semiconductor element and the metal strip with a resin having an insulating property, and a portion extending outward from a sealing surface of the metal strips. By the cutting step of cutting along the stop surface, the exposed or projected external electrodes are formed on one main surface of the sealing portion, so that the interval between the external electrodes can be set arbitrarily.

【0044】また、請求項13の発明における半導体装
置の製造方法は、前記折曲部の少なくとも一部が封止面
の一主面より露出または突出するように該金属細条を配
置し、前記半導体素子、複数の金属細条及び該半導体素
子と金属細条との接続部を絶縁性を有する樹脂により封
止する封止工程と、前記金属細条の封止面から外方へ伸
びる部分を該封止面に沿って切断する切断工程により、
封止部の一主面上に、露出または突出した外部電極を形
成するので、該外部電極の間隔を任意に設定することが
可能になる。
According to a thirteenth aspect of the present invention, in the method for manufacturing a semiconductor device, the metal strip is arranged such that at least a part of the bent portion is exposed or protrudes from one main surface of the sealing surface, A sealing step of sealing a semiconductor element, a plurality of metal strips and a connecting portion between the semiconductor element and the metal strips with an insulating resin; and a portion extending outward from a sealing surface of the metal strip. By the cutting step of cutting along the sealing surface,
Since the exposed or protruding external electrodes are formed on one main surface of the sealing portion, it is possible to arbitrarily set the interval between the external electrodes.

【0045】また、請求項14の発明における半導体装
置の製造方法は、一面に前記突起または前記折曲部のい
ずれかの高さより浅い深さの第1の凹部が形成された第
1の金型本体と、一面の前記第1の凹部と対向する位置
に前記半導体素子を収納する第2の凹部が形成された第
2の金型本体とを有する封止用金型を用い、第2の凹部
に前記半導体素子を収納し、前記第1の金型本体の一面
と前記第2の金型本体の一面により前記金属細条を挾持
して前記突起または前記折曲部のいずれかの上端部を前
記第1の凹部の底面に圧接させ、これら第1及び第2の
凹部により囲まれる領域に前記樹脂を注入することによ
り、封止部の一主面上に、露出した外部電極を形成する
ので、該外部電極の間隔を任意に設定することが可能に
なる。
According to a fourteenth aspect of the present invention, in the method of manufacturing a semiconductor device, a first die is formed on one surface thereof with a first recess having a depth shallower than the height of either the protrusion or the bent portion. Using a sealing mold having a main body and a second mold main body in which a second recess for accommodating the semiconductor element is formed at a position facing one surface of the first recess, the second recess is used. The semiconductor element is housed in the first mold body, and the metal strip is held between one surface of the first mold body and one surface of the second mold body so that the upper end of either the protrusion or the bent portion is held. The exposed external electrode is formed on one main surface of the sealing portion by press-contacting the bottom surface of the first recess and injecting the resin into the region surrounded by the first and second recesses. It becomes possible to arbitrarily set the interval between the external electrodes.

【0046】また、請求項15の発明における半導体装
置の製造方法は、一面に前記突起または前記折曲部のい
ずれかの高さより浅い深さの第1の凹部が形成され、該
第1の凹部の底面の前記突起または前記折曲部のいずれ
かの上端部に一致する位置に前記突起または前記折曲部
の上端部が封止面より突出するように該上端部を収納す
る収納部が形成された第1の金型本体と、一面の前記第
1の凹部と対向する位置に前記半導体素子を収納する第
2の凹部が形成された第2の金型本体とを有する封止用
金型を用い、第2の凹部に前記半導体素子を収納し、前
記第1の金型本体の一面と前記第2の金型本体の一面に
より前記金属細条を挾持して前記突起または前記折曲部
のいずれかの上端部を前記収納部に収納し、これら第1
及び第2の凹部により囲まれる領域に前記樹脂を注入す
ることにより、封止部の一主面上に、突出した外部電極
を形成するので、該外部電極の突出部の間隔を任意に設
定することが可能になる。
According to a fifteenth aspect of the present invention, in the method of manufacturing a semiconductor device, a first concave portion having a depth shallower than the height of either the protrusion or the bent portion is formed on one surface, and the first concave portion is formed. An accommodating portion for accommodating the upper end of the protrusion or the bent portion is formed at a position corresponding to the upper end of the protrusion or the bent portion on the bottom surface of And a second mold body in which a second recess is formed in a position facing the first recess on one surface, and a second recess for accommodating the semiconductor element is formed in the sealing mold. And the semiconductor element is housed in the second recess, and the metal strip is held between the one surface of the first mold body and the one surface of the second mold body to form the protrusion or the bent portion. The upper end of one of the
By injecting the resin into a region surrounded by the second concave portion and a protruding external electrode is formed on one main surface of the sealing portion, the interval between the protruding portions of the external electrode is arbitrarily set. It will be possible.

【0047】また、請求項16の発明における半導体装
置の搭載構造は、接着材料を、前記金属層及び固着用パ
ッド12、各々の全面に広がった状態で固着させ、か
つ、その高さを前記外部電極の高さより低くしたことに
より、前記金属層と固着用パッドとは薄い接着層で強固
に固着され、しかも、周囲の電極パッドと接触するおそ
れがなくなり、信頼性が向上する。
Further, in the semiconductor device mounting structure according to the sixteenth aspect of the present invention, the adhesive material is fixed to the metal layer and the fixing pad 12 in a state of being spread over the entire surfaces of the metal layer and the fixing pad 12, and the height of the adhesive material is the outside. Since the height is lower than the height of the electrode, the metal layer and the fixing pad are firmly fixed to each other with a thin adhesive layer, and there is no possibility of contact with the surrounding electrode pads, so that the reliability is improved.

【0048】また、請求項17の発明における半導体装
置の搭載方法は、固着用パッド上に、その面積が該固着
用パッドの面積より小さく、かつその高さが前記外部電
極の高さより高くなるように、前記金属層と濡れ性が良
くかつ固着する接着材料を付着される付着工程と、該接
着材料上に前記金属層が、前記電極パッド上に前記外部
電極がそれぞれ位置するように半導体装置の位置合わせ
を行ない、回路基板上に該半導体装置を載置する載置工
程と、前記接着材料を前記金属層及び固着用パッド各々
の全面に広げ、該固着用パッドに前記接着材料を介して
前記金属層を固着させるとともに、前記電極パッドに前
記外部電極を接続する接続工程により、前記接着材料を
微細な形状にパターンニングすることなく、該接着材料
を介して前記金属層と固着用パッドとが強固に固着し、
しかも周囲の電極パッドと接触するおそれがない。ま
た、前記接着材料を金属層及び固着用パッド各々の全面
に広げた際に、その表面張力により該半導体装置の外部
電極と回路基板の電極パッドとの位置ずれを補正する。
According to a seventeenth aspect of the present invention, in the method for mounting a semiconductor device, the area of the semiconductor device is smaller than the area of the fixing pad and the height of the semiconductor device is higher than the height of the external electrode. And an attaching step of attaching an adhesive material having good wettability and fixing to the metal layer, and a semiconductor device of the semiconductor device so that the metal layer is located on the adhesive material and the external electrode is located on the electrode pad. A mounting step of aligning and mounting the semiconductor device on a circuit board, spreading the adhesive material over the entire surface of each of the metal layer and the fixing pad, and applying the adhesive material to the fixing pad through the adhesive material. The metal layer is fixed through the adhesive material without patterning the adhesive material into a fine shape by the connecting step of connecting the external electrode to the electrode pad. And the fixed pad and is firmly fixed,
Moreover, there is no possibility of contact with the surrounding electrode pads. Further, when the adhesive material is spread over the entire surface of the metal layer and the fixing pad, the surface tension of the adhesive material corrects the positional deviation between the external electrode of the semiconductor device and the electrode pad of the circuit board.

【0049】[0049]

【実施例】【Example】

実施例1.以下、この発明の一実施例を図について説明
する。図1は本発明の一実施例の半導体装置を示す斜視
図、図2はそのC−C線に沿う断面図である。図におい
て、51は半導体装置本体の一主面(下面)2上に突き
出ている外部電極リード(金属細条)である。該外部電
極リード51にはプリント回路配線板(回路基板)11
上の電極パッド12に固着し易いように、その表面には
んだ等の接着材料13からなる表面被覆が施されてい
る。該外部電極リード51は、該半導体装置の封止部1
内部に伸展していて、その先端部52において、金属細
線9により半導体素子8の表面に形成された電極(図示
せず)と電気的に接続されている。
Example 1. An embodiment of the present invention will be described below with reference to the drawings. 1 is a perspective view showing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line CC. In the figure, reference numeral 51 is an external electrode lead (metal strip) projecting from one main surface (lower surface) 2 of the semiconductor device body. A printed circuit wiring board (circuit board) 11 is provided on the external electrode lead 51.
A surface coating made of an adhesive material 13 such as solder is applied to the surface of the upper electrode pad 12 so that it can be easily fixed to the upper electrode pad 12. The external electrode lead 51 is the sealing portion 1 of the semiconductor device.
It extends inside, and its tip portion 52 is electrically connected to the electrode (not shown) formed on the surface of the semiconductor element 8 by the thin metal wire 9.

【0050】この一実施例の半導体装置によれば、外部
電極リード51が該半導体装置の一主面2上にあり、本
体の外周より内部にあるため、該半導体装置をプリント
回路配線板11上に搭載するに当り、外部電極リード5
1が接続されるプリント回路配線板11上の電極パッド
12を該半導体装置本体の占める領域内に配列できる。
また、従来例のように、半導体装置側面4から外方に突
き出した外部電極リードの領域を必要としないので、該
半導体装置を隙間無く密に配置できる利点を有する。
According to the semiconductor device of this embodiment, since the external electrode lead 51 is on the one main surface 2 of the semiconductor device and is inside the outer periphery of the main body, the semiconductor device is mounted on the printed circuit wiring board 11. External electrode lead 5 when mounted on
The electrode pads 12 on the printed circuit wiring board 11 to which 1 is connected can be arranged in the area occupied by the semiconductor device body.
Further, unlike the conventional example, since the area of the external electrode lead projecting outward from the semiconductor device side surface 4 is not required, there is an advantage that the semiconductor devices can be densely arranged without a gap.

【0051】なお、本実施例では半導体素子8と外部電
極リード51に繋がる先端部52を金属細線9で接続し
たが、必ずしも金属細線9で接続しなくてもよく、例え
ば両者を直接はんだや金錫共晶結合により接続しても何
等本発明の効果を妨げるものではない。また、外部電極
リード51から半導体装置の封止部1内部に伸展した部
分の形状等、何等制約を受けないのは勿論である。更
に、トランスファーモールド封止された封止部1の形状
にも何等の制約もないことは勿論である。また、外部電
極リード51の構成材料、封止樹脂材料に対する制限も
無いことは勿論である。
In the present embodiment, the semiconductor element 8 and the tip portion 52 connected to the external electrode lead 51 are connected by the thin metal wire 9, but it is not always necessary to connect by the thin metal wire 9. For example, both may be directly soldered or gold. The connection by tin eutectic bonding does not hinder the effects of the present invention. Further, it goes without saying that there is no restriction on the shape of the portion extending from the external electrode lead 51 into the sealing portion 1 of the semiconductor device. Furthermore, it goes without saying that there is no restriction on the shape of the sealing portion 1 that has been transfer-molded. Further, it goes without saying that there is no limitation on the constituent material of the external electrode lead 51 and the sealing resin material.

【0052】実施例2.図3は、この発明の他の実施例
の半導体装置を示す断面図である。図において、61は
封止部1内に伸展した金属細条の一部が階段状に折曲さ
れて段部62とされた外部電極リードである。この外部
電極リード61においても、表面にはんだ等の接着材料
からなる表面被覆が施されている。
Example 2. FIG. 3 is a sectional view showing a semiconductor device according to another embodiment of the present invention. In the figure, reference numeral 61 is an external electrode lead in which a part of the metal strip extending into the sealing portion 1 is bent stepwise to form a step portion 62. The surface of the external electrode lead 61 is also coated with an adhesive material such as solder.

【0053】この半導体装置によれば、実施例1に示し
た半導体装置の長所を全て備えている外に、外部電極リ
ード61から本体内部に伸展する部分62が階段状に折
れ曲がっているため、外部電極リード61に外力が加わ
っても本体の内部に伸展した部分62が封止部1から抜
け出ることを防止する効果を有する。
According to this semiconductor device, in addition to having all the advantages of the semiconductor device shown in the first embodiment, the portion 62 extending from the external electrode lead 61 to the inside of the body is bent in a stepwise manner, so Even if an external force is applied to the electrode lead 61, it has an effect of preventing the portion 62 extending inside the main body from coming off from the sealing portion 1.

【0054】なお、本実施例でも、実施例1と同様に形
状、材料等の制限が無いことは言うまでもない。更に、
外部電極リード61の本体内部に伸展した部分62の折
れ曲がり形状、階段状の段数にも制限はない事も勿論で
ある。
It is needless to say that the present embodiment is not limited to the shape, the material and the like as in the first embodiment. Furthermore,
It goes without saying that there is no limitation on the bent shape of the portion 62 of the external electrode lead 61 that extends inside the main body, or the number of steps in a staircase shape.

【0055】実施例3.図4は本発明の他の実施例の半
導体装置を示す斜視図、図5はそのD−D線に沿う断面
図であり、図において、71は封止部1の一主面(下
面)2上の周辺部に沿って配列された外側電極リード、
72は同一主面2上の周辺部より内側に配列された内側
電極リード、73は外側電極リード71から封止部1内
に伸展した長片細条の先端部52であり金属細線9によ
り半導体素子8の電極(図示せず)と電気的に接続され
ている。74は内側電極リード72から封止部1内に伸
展した短片細条の先端部52であり、同様に半導体素子
8の電極と電気的に接続されている。そして、外側電極
リード71,71,……及び内側電極リード72,7
2,……の各表面もはんだ等で表面被覆されている。こ
こで、該両外側内側電極リード71,72はほぼ並んで
配置されているので、外側電極リード71は該本体内部
で、内側電極リード72より長い階段状の部分75を経
て先端部73へ伸びている。
Example 3. FIG. 4 is a perspective view showing a semiconductor device of another embodiment of the present invention, and FIG. 5 is a sectional view taken along the line D-D thereof, in which 71 is one main surface (lower surface) 2 of the sealing portion 1. Outer electrode leads arranged along the upper perimeter,
Reference numeral 72 is an inner electrode lead arranged inside the peripheral portion on the same principal surface 2, 73 is a tip portion 52 of a long strip extending from the outer electrode lead 71 into the sealing portion 1, and the metal fine wire 9 is used to form a semiconductor. It is electrically connected to the electrode (not shown) of the element 8. Reference numeral 74 denotes a tip end portion 52 of a short strip extending from the inner electrode lead 72 into the sealing portion 1, and is also electrically connected to the electrode of the semiconductor element 8. The outer electrode leads 71, 71, ... And the inner electrode leads 72, 7
Each surface of 2, ... Is also surface-coated with solder or the like. Here, since the both outer inner electrode leads 71, 72 are arranged substantially side by side, the outer electrode lead 71 extends to the tip portion 73 inside the main body through the stepped portion 75 longer than the inner electrode lead 72. ing.

【0056】この半導体装置においても、実施例1に示
した半導体装置の長所を全て有する外に、外側内側電極
リード71,72が複数列に配置されているため、外側
内側電極リード71,72の配置数を多くできる利点を
有する。なお、本実施例でも、実施例1と同様に形状、
材料等の制限は無いことは言うまでもない。更に、外側
内側電極リード71,72の列数にも制限がない事も勿
論である。
Also in this semiconductor device, in addition to having all the advantages of the semiconductor device shown in the first embodiment, the outer inner electrode leads 71, 72 are arranged in a plurality of rows, so that the outer inner electrode leads 71, 72 are This has the advantage that the number of arrangements can be increased. In addition, also in this embodiment, as in the first embodiment,
It goes without saying that there are no restrictions on the materials, etc. Furthermore, it goes without saying that the number of rows of the outer inner electrode leads 71, 72 is not limited.

【0057】実施例4.図6は、この発明の他の実施例
の半導体装置を示す斜視図、図7はそのE−E線に沿う
断面図であり、図において、81は外部電極リード51
の先端部分が一主面2の面方向に沿って折れ曲げられた
外部電極である。
Example 4. FIG. 6 is a perspective view showing a semiconductor device according to another embodiment of the present invention, and FIG. 7 is a sectional view taken along the line EE thereof. In FIG. 6, 81 is an external electrode lead 51.
Is the outer electrode bent along the surface direction of the one main surface 2.

【0058】この半導体装置によれば、外部電極リード
51の先端部分が本体の一主面(下面)2に垂直になら
ない様に曲げられているので、外部電極81をプリント
回路配線板上に搭載する時、プリント回路配線板上の電
極パッドに接する外部電極81の接触面を大きく取れる
利点がある。さらに、接触面の寸法、形状を自由に設定
できる利点も有する。なお、本実施例でも、実施例1と
同様に形状、材料等の制限は無いことは言うまでもな
い。更に、外部電極リード51の列数にも制限はない事
も勿論である。
According to this semiconductor device, since the tip end portion of the external electrode lead 51 is bent so as not to be perpendicular to the main surface (lower surface) 2 of the main body, the external electrode 81 is mounted on the printed circuit wiring board. In doing so, there is an advantage that the contact surface of the external electrode 81 that contacts the electrode pad on the printed circuit wiring board can be made large. Further, there is an advantage that the size and shape of the contact surface can be freely set. It is needless to say that the present embodiment is not limited to the shape, the material, etc. as in the first embodiment. Furthermore, it goes without saying that the number of rows of the external electrode leads 51 is not limited.

【0059】実施例5.図8は、この発明の半導体装置
の製造方法の一実施例を示す過程図である。図(a)は
リードフレーム(金属細条)91の先端部91aと半導
体素子8の表面電極(図示せず)とを金属細線9で電気
的に接続した工程を示す。図(b)はトランスファーモ
ールドにより絶縁性の封止樹脂92で半導体素子8を封
止する工程を示す。図中、リードフレーム91に電気的
に接続された半導体素子8と、リードフレーム91の金
属細線9が接続された先端部91aの周辺もエポキシ樹
脂等の封止樹脂92で封止され、半導体装置の封止部1
が形成される。この時、リードフレーム91の表面91
bは半導体装置本体の封止部1、一主面2と一致するよ
うに配置されている。図(c)は樹脂封止した後リード
フレームを曲げる工程を示す。図中、リードフレーム9
1は樹脂封止中に埋め込まれた先端部91aを残して本
体一主面2に垂直に曲げられる。93は、リードフレー
ム91を折り曲げた後、樹脂表面に残るリードフレーム
の跡の溝である。次いで図示していないが、リードフレ
ーム91表面にはんだ等の低融点金属層をコーティング
して後、リードフレーム91の本体下面より若干突き出
た状態でリードフレーム91を切断し、外部電極リード
を形成する。
Example 5. FIG. 8 is a process chart showing an embodiment of a method for manufacturing a semiconductor device of the present invention. FIG. 3A shows a process in which a tip portion 91 a of a lead frame (metal strip) 91 and a surface electrode (not shown) of the semiconductor element 8 are electrically connected by a metal wire 9. FIG. 3B shows a step of sealing the semiconductor element 8 with an insulating sealing resin 92 by transfer molding. In the figure, the semiconductor element 8 electrically connected to the lead frame 91 and the periphery of the tip portion 91a of the lead frame 91 to which the thin metal wire 9 is connected are also sealed with a sealing resin 92 such as an epoxy resin. Sealing part 1
Is formed. At this time, the surface 91 of the lead frame 91
b is arranged so as to coincide with the sealing portion 1 and the one main surface 2 of the semiconductor device body. FIG. 3C shows a step of bending the lead frame after resin sealing. In the figure, the lead frame 9
Reference numeral 1 is bent perpendicularly to the main surface 1 of the main body, leaving a tip portion 91a embedded during resin sealing. Reference numeral 93 is a groove of the trace of the lead frame left on the resin surface after bending the lead frame 91. Next, although not shown, the surface of the lead frame 91 is coated with a low melting point metal layer such as solder, and then the lead frame 91 is cut while slightly protruding from the lower surface of the main body of the lead frame 91 to form external electrode leads. .

【0060】この半導体装置の製造方法によれば、トラ
ンスファーモールドする際の封止用金型を、本体の一主
面2を形成する面を持ち、該主面2を形成する部分の周
辺に、リードフレーム91の表面91bに接する部分を
有する上型と、半導体素子8の周囲を被覆するための窪
みを持ち、該窪み部分の周辺に、リードフレーム91の
表面91bに対する他の表面に接する部分を有する下型
で構成することにより、上型と下型の間に半導体素子8
を接続したリードフレーム9を挟み込み、その状態で樹
脂92を注入することにより、半導体装置本体の一主面
2から外部電極リードが突き出した半導体装置を容易に
製造できる。また、外部電極リード61部分の形成に当
り、リードフレーム91を本体の一主面2から折曲げる
部分を自由に設定でき、外部電極リード61間隔を任意
に設定できる。
According to this method of manufacturing a semiconductor device, the sealing mold for transfer molding has a surface that forms one main surface 2 of the main body, and is provided around the portion where the main surface 2 is formed. An upper die having a portion in contact with the surface 91b of the lead frame 91 and a recess for covering the periphery of the semiconductor element 8 are provided, and a portion in contact with another surface with respect to the surface 91b of the lead frame 91 is provided around the recess. By having the lower mold having the semiconductor element 8 between the upper mold and the lower mold.
By sandwiching the lead frame 9 connected to each other and injecting the resin 92 in this state, it is possible to easily manufacture a semiconductor device in which the external electrode lead projects from the one main surface 2 of the semiconductor device main body. Further, in forming the external electrode lead 61 portion, the portion where the lead frame 91 is bent from the main surface 2 of the main body can be freely set, and the interval between the external electrode leads 61 can be arbitrarily set.

【0061】なお、この実施例においてリードフレーム
91と半導体素子8は金属細線9で電気的に接続されて
いるが該リードフレーム91の一部分が半導体素子8の
一部分と機械的に固着されていてもなんら問題はない。
又、金属細線9を用いずに電気的に接続されていても本
発明になんら制限を及ぼすものではない。更に、金型の
他の部分の形状や寸法、リードフレームや封止樹脂の材
料等なんら制限のないことは勿論である。
In this embodiment, the lead frame 91 and the semiconductor element 8 are electrically connected by the fine metal wire 9, but even if a part of the lead frame 91 is mechanically fixed to a part of the semiconductor element 8. There is no problem.
Further, even if they are electrically connected without using the fine metal wires 9, the present invention is not limited at all. Further, it goes without saying that there are no restrictions on the shape and dimensions of the other parts of the mold, the material of the lead frame and the sealing resin, and the like.

【0062】実施例6.図9は本発明の一実施例の半導
体装置の他の製造方法を示す過程図である。図9(a)
はリードフレーム91の先端部91aと半導体素子8の
表面電極を金属細線9で電気的に接続した工程を示す。
図中、リードフレーム91には金属細線9を接合する先
端部91aに続く変曲部(折曲部)94が形成されてい
る。この変曲部94は半導体素子8の表面から遠ざかる
方向に略コの字状の凸部を有する形状である。図9
(b)はトランスファーモールド樹脂により半導体素子
を封止した工程を示す。図中、リードフレーム91に電
気的に接続された半導体素子8と、リードフレーム91
の金属細線9が接続された先端部分91aの周辺もエポ
キシ樹脂等の封止樹脂92で封止され、半導体装置の封
止部1が形成される。この時、リードフレーム91の変
曲部94の表面95は半導体装置本体の表面である一主
面2と一致するように配置されている。図9(c)は封
止樹脂の側面から突き出したリードフレームを切断した
工程を示す。図中、96はリードフレーム91を半導体
装置本体の側面4に沿って切断した表面を示す。次いで
図示していないが、リードフレームの変曲部94の表面
95にはんだ等の低融点金属層をコーティングして外部
電極リードを形成する。
Example 6. FIG. 9 is a process diagram showing another method of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 9 (a)
Shows a step of electrically connecting the tip portion 91a of the lead frame 91 and the surface electrode of the semiconductor element 8 with the thin metal wire 9.
In the figure, a lead frame 91 is formed with a bent portion (folded portion) 94 following a tip portion 91a for joining the thin metal wire 9. The inflection portion 94 has a shape having a substantially U-shaped convex portion in a direction away from the surface of the semiconductor element 8. Figure 9
(B) shows a step of sealing the semiconductor element with a transfer mold resin. In the figure, the semiconductor element 8 electrically connected to the lead frame 91 and the lead frame 91
The periphery of the tip portion 91a to which the thin metal wire 9 is connected is also sealed with the sealing resin 92 such as an epoxy resin to form the sealing portion 1 of the semiconductor device. At this time, the surface 95 of the inflection portion 94 of the lead frame 91 is arranged so as to coincide with the one main surface 2 which is the surface of the semiconductor device body. FIG. 9C shows a step of cutting the lead frame protruding from the side surface of the sealing resin. In the figure, reference numeral 96 denotes a surface obtained by cutting the lead frame 91 along the side surface 4 of the semiconductor device body. Next, although not shown, the surface 95 of the bent portion 94 of the lead frame is coated with a low melting point metal layer such as solder to form external electrode leads.

【0063】この半導体装置の製造方法によれば、トラ
ンスファーモールドする際の封止用金型を、本体の一主
面2を形成し、リードフレーム91の変曲部94の表面
95と本体の該主面2とが一致する深さの窪みを持ち、
該窪み部分の周辺にリードフレーム91の表面91bに
接する部分を有する上型と、半導体素子8の周囲を被覆
するための窪みを持ち、該窪み部分の周辺にリードフレ
ーム91の表面91bに対する他の表面に接する部分を
有する下型で構成することにより、上型と下型の間に半
導体素子8を接続したリードフレーム91を挟み込み、
その状態で樹脂92を注入した後、該本体の側面4から
突き出したリードフレーム91を該側面4に沿って切断
することにより、半導体装置本体の一主面2に外部電極
リードが形成された半導体装置を容易に製造できる。
According to this method of manufacturing a semiconductor device, the main mold 2 of the main body is formed in the sealing die for transfer molding, and the surface 95 of the inflection portion 94 of the lead frame 91 and the main body 2 are formed. It has a recess of the same depth as the main surface 2,
An upper die having a portion in contact with the surface 91b of the lead frame 91 in the periphery of the recessed portion and a recess for covering the periphery of the semiconductor element 8 are provided, and another die for the surface 91b of the lead frame 91 is provided in the periphery of the recessed portion. By forming the lower mold having the portion in contact with the surface, the lead frame 91 connected to the semiconductor element 8 is sandwiched between the upper mold and the lower mold,
After injecting the resin 92 in that state, the lead frame 91 protruding from the side surface 4 of the main body is cut along the side surface 4 to form a semiconductor in which external electrode leads are formed on the one main surface 2 of the semiconductor device main body. The device can be easily manufactured.

【0064】さらに、金型の上型の窪み形状を上述のよ
うに、本体の一主面2を形成し、リードフレーム91の
変曲部94の表面95と本体の該主面2とが一致する深
さの窪みとせずに、該窪みの底面に該変曲部94の一部
が収納されるような、さらなる窪みを形成することによ
り、トランスファーモールドで封止後、半導体本体の該
主面2から該変曲部94の一部が突き出した外部電極リ
ードを形成することもできる。
Further, as described above, the depression shape of the upper die of the mold forms one main surface 2 of the main body, and the surface 95 of the inflection portion 94 of the lead frame 91 and the main surface 2 of the main body coincide with each other. By forming a further recess so that a part of the inflection portion 94 is accommodated in the bottom surface of the recess instead of forming a recess having a depth of It is also possible to form an external electrode lead in which a part of the inflection portion 94 projects from 2.

【0065】この実施例においても実施例5と同様に、
制限はなんら無いことは勿論である。さらに、リードフ
レーム91に形成された変曲部94の形状もなんら制約
を受けるものでないと同時に、リードフレームを機械加
工する必要性もなく、変曲部に相当する突起を形成する
ために他の材料片を固着することも可能である。
Also in this embodiment, as in the fifth embodiment,
Of course, there are no restrictions. Further, the shape of the inflection portion 94 formed on the lead frame 91 is not restricted at all, and at the same time, there is no need to machine the lead frame, and other projections corresponding to the inflection portion are formed. It is also possible to fix pieces of material.

【0066】実施例7.図10は、この発明の一実施例
の半導体装置の製造方法における樹脂封止工程を示す図
である。図10(a)は変曲部94が形成されたリード
フレーム91の先端部91aと半導体素子8の表面電極
を金属細線9で電気的に接続した工程を示す。図中、h
はリードフレーム91の変曲部94の高さを示す。図1
0(b)は半導体素子8をトランスファーモールドで封
止する金型の一部分(上型)である。図中、100は金
型の上型(第1の金型本体)、101はモールド樹脂が
充填される窪み(第1の凹部)、102はリードフレー
ム表面を固定する部分(一面)である。該金型の窪み1
01の深さはdである。この時、d<hに成るように設
計されている図10(c)は金型の上型(第1の金型本
体)100と、他の一部分(金型の下型、第2の金型本
体)103に半導体素子8を接続したリードフレーム9
1を固定した工程を示す。図中、104はモールド樹脂
が充填される窪み(第2の凹部)、105はリードフレ
ーム表面を固定する部分(一面)である。この状態で、
変曲部94の高さhと金型の窪み101の深さdの差分
により、リードフレーム91の変曲部94の表面95は
金型の上型100の窪み101の壁面に押し付けられて
いる。この状態で金型の窪み内にトランスファーモール
ドにより封止樹脂92が注入され、半導体素子8とリー
ドフレーム91の金属細線接合部106周辺を封止樹脂
92で被覆する。
Example 7. FIG. 10 is a diagram showing a resin sealing step in the method of manufacturing a semiconductor device according to the embodiment of the present invention. FIG. 10A shows a process of electrically connecting the front end portion 91 a of the lead frame 91 having the inflection portion 94 and the surface electrode of the semiconductor element 8 with the thin metal wire 9. H in the figure
Indicates the height of the inflection portion 94 of the lead frame 91. Figure 1
Reference numeral 0 (b) is a part (upper mold) of a mold for sealing the semiconductor element 8 by transfer molding. In the figure, 100 is an upper die of the die (first die body), 101 is a recess filled with the molding resin (first recess), and 102 is a portion (one surface) for fixing the lead frame surface. The mold cavity 1
The depth of 01 is d. At this time, FIG. 10 (c), which is designed so that d <h, shows the upper die (first die body) 100 of the die and the other part (lower die of the die, second die). Lead frame 9 in which the semiconductor element 8 is connected to the die body 103
The process which fixed 1 is shown. In the figure, 104 is a recess (second recess) filled with the mold resin, and 105 is a portion (one surface) for fixing the surface of the lead frame. In this state,
Due to the difference between the height h of the bent portion 94 and the depth d of the recess 101 of the mold, the surface 95 of the bent portion 94 of the lead frame 91 is pressed against the wall surface of the recess 101 of the upper mold 100 of the mold. . In this state, the sealing resin 92 is injected into the recess of the mold by transfer molding, and the periphery of the thin metal wire bonding portion 106 of the semiconductor element 8 and the lead frame 91 is covered with the sealing resin 92.

【0067】この半導体装置の製造方法によれば、トラ
ンスファーモールドする際に、半導体素子8を接続した
リードフレーム91を、上下2面の封止用金型に接着し
たとき、該リードフレーム91の変曲部94の高さh
が、該金型の上型の窪みの深さdより小さいため、変曲
部94の表面95が金型の窪み101の表面に触れ、リ
ードフレームを(h−d)だけ押し戻そうとする。この
時のリードフレームの反力により変曲部94の表面95
は金型の表面に強く押し当てられ、封止樹脂92を注入
しても変曲部表面と金型表面間に封止樹脂92が進入せ
ず、外部電極がきれいに成形できる利点を有する。
According to this method of manufacturing a semiconductor device, when the lead frame 91 to which the semiconductor element 8 is connected is bonded to the upper and lower two-side sealing dies during transfer molding, the lead frame 91 is changed. Height h of curved portion 94
However, since it is smaller than the depth d of the depression of the upper die of the die, the surface 95 of the inflection portion 94 touches the surface of the depression 101 of the die and tries to push back the lead frame by (h−d). . The reaction force of the lead frame at this time causes the surface 95 of the inflection portion 94.
Is strongly pressed against the surface of the mold, and even if the sealing resin 92 is injected, the sealing resin 92 does not enter between the surface of the inflection part and the surface of the mold, and the external electrode can be molded nicely.

【0068】本実施例においても、実施例6に示すと同
様に、なんら制限を受けないことは勿論である。さら
に、該金型100の窪み101は平坦でなく、該窪み1
01の表面に、該リードフレーム91の該突起、もしく
は該突起状の折れ曲り部分の先端部分に一致する位置
に、封止後該先端部分が半導体装置の一主面上に所定の
高さで突起状に露出できる深さを有する、さらなる窪み
を設けることにより、該リードフレーム91の該突起、
もしくは該突起状の折れ曲り部分の一部が半導体装置の
一主面2上に突出することとなり突起状の外部電極リー
ドを形成することができる。
Of course, in the present embodiment, as in the case of the sixth embodiment, no limitation is imposed. Further, the depression 101 of the mold 100 is not flat, and the depression 1
On the surface of 01, at a position corresponding to the projection of the lead frame 91 or the tip of the bent portion of the projection, the tip is sealed at a predetermined height above one main surface of the semiconductor device. By providing a further depression having a depth capable of being exposed like a protrusion, the protrusion of the lead frame 91,
Alternatively, a part of the projection-shaped bent portion projects onto the one main surface 2 of the semiconductor device, so that a projection-shaped external electrode lead can be formed.

【0069】実施例8.図11は、テストを容易化する
ための、本発明の一実施例である半導体装置の、テスト
状態を示す側面図である。図中、半導体装置の外部電極
110は半導体装置本体の一主面2から突出せず、表面
から窪んだ状態で形成されている。このため接触端子1
11の先端部112が外部電極110上を横に滑べって
も、窪みの側壁113に当り外部電極の表面114から
外れることはない。
Example 8. FIG. 11 is a side view showing a test state of the semiconductor device according to the embodiment of the present invention for facilitating the test. In the figure, the external electrode 110 of the semiconductor device is formed so as not to protrude from the one main surface 2 of the semiconductor device body but to be recessed from the surface. Therefore, the contact terminal 1
Even if the tip 112 of 11 slides laterally on the external electrode 110, it does not come off the surface 114 of the external electrode by hitting the side wall 113 of the depression.

【0070】この半導体装置によれば、該接触端子11
1が横ずれして外部電極110からはずれないため、テ
スト時の接触端子111を外部電極110に接触すると
きの接触圧の調整が楽になり、テスト生産性を高める効
果が得られる。更に、外部電極リード部分の該窪み形状
を、その側面が傾斜し、窪みの入り口部分を外部電極1
10寸法より大きくとれば、接触端子111の位置合わ
せも容易になる利点を有する。なお、窪み形状、寸法、
深さ等なんら制限を受けるものではない。
According to this semiconductor device, the contact terminal 11
Since 1 is laterally displaced and does not come off from the external electrode 110, it becomes easy to adjust the contact pressure when the contact terminal 111 is brought into contact with the external electrode 110 during the test, and the effect of improving the test productivity can be obtained. Further, the recessed shape of the external electrode lead portion is inclined at its side surface, and the entrance portion of the recessed portion is connected to the external electrode 1
If the size is larger than 10, the contact terminal 111 can be easily aligned. The shape of the depression, the dimensions,
There is no restriction on the depth.

【0071】実施例9.図12は本体の一主面に外部電
極が形成された半導体装置をプリント回路配線板に搭載
する本発明の一実施例を示す側断面図、図13は半導体
装置の外部電極がプリント回路配線板の電極パッドに接
続された状態を示す拡大断面図である。図中、半導体装
置本体の一主面2に形成された外部電極リード51の周
辺には、該半導体装置をプリント回路配線板11の表面
に形成された電極パッド12にはんだ等の接着材料13
で電気的、機械的に接合した時に、接合部の上下部分の
寸法がほぼ同じ程度になるように外部電極リード51の
周辺に、接着材料13に濡れ、機械的に固着できる金属
層121が形成されている。
Example 9. FIG. 12 is a side sectional view showing an embodiment of the present invention in which a semiconductor device having external electrodes formed on one main surface of a main body is mounted on a printed circuit wiring board, and FIG. 13 is an external electrode of the semiconductor device printed circuit wiring board. FIG. 6 is an enlarged cross-sectional view showing a state in which the electrode pad is connected to the electrode pad of FIG. In the figure, around the external electrode lead 51 formed on the main surface 2 of the semiconductor device main body, the semiconductor device is attached to an electrode pad 12 formed on the surface of a printed circuit wiring board 11 by an adhesive material 13 such as solder.
A metal layer 121 that is wettable by the adhesive material 13 and can be mechanically fixed is formed around the external electrode lead 51 so that the dimensions of the upper and lower portions of the joint are approximately the same when electrically and mechanically joined. Has been done.

【0072】本実施例によれば、半導体装置の一主面2
の外部電極の接着材料による接合領域の面積がプリント
回路配線板11表面の電極パッド12の面積とほぼ等し
くなり、半導体装置とプリント回路配線板間に生じる熱
歪みは、接合部の接着材料13の部分に均一に生じ、ク
ラック発生が押えられる利点を有する。さらに、周辺部
分の金属層121の面積を大きくとることにより、外部
電極リード51の寸法を電気的に必要な寸法にするだけ
で良く、極めて小さくできるため、リード数を増やした
り、実施例5に示す製造工程でのリード曲げ加工を容易
にする等の効果も有する。
According to this embodiment, the main surface 2 of the semiconductor device is
The area of the bonding area of the external electrode due to the adhesive material becomes substantially equal to the area of the electrode pad 12 on the surface of the printed circuit wiring board 11, and the thermal strain generated between the semiconductor device and the printed circuit wiring board is due to the adhesive material 13 at the bonding portion. It has an advantage that it is uniformly generated in the part and crack generation is suppressed. Further, by increasing the area of the metal layer 121 in the peripheral portion, the size of the external electrode lead 51 is only required to be an electrically necessary size, and the size can be made extremely small. It also has effects such as facilitating lead bending in the manufacturing process shown.

【0073】この実施例において、金属121の形成方
法、材料構成、形状等なんら制限を受けるものではな
い。また、外部電極リード51と該金属層121との間
隔、お互いの形状における制限等全くない。更に、接着
材料13の量、材質等の制限もないことは勿論である。
In this embodiment, the method of forming the metal 121, the material composition, the shape, etc. are not limited. Further, there is no restriction on the distance between the external electrode lead 51 and the metal layer 121, or the mutual shape. Furthermore, it goes without saying that there is no limitation on the amount or material of the adhesive material 13.

【0074】実施例10.図14は本体の一主面に外部
電極が形成された半導体装置をプリント回路配線板に搭
載するための本発明による一実施例の製造方法を示す側
面図である。図14(a)は半導体装置をプリント回路
配線板に搭載する前の状態を示す。半導体装置の一主面
2にはプリント回路配線板へ接続するに十分な量のはん
だで被覆され、高さがhoの外部電極20が形成されて
いる。131は該半導体装置本体の下面に形成された、
はんだ等の接着材料に濡れ易い性質の金属から成り、面
積がBoに成るようにパターンニングされ、該半導体装
置をプリント回路配線板11に機械的に固着するための
金属層である。プリント回路配線板11の表面には該半
導体装置の電極を接続するための電極パッド12と、半
導体装置下面に形成した固着用金属層131に相対する
位置に形成され、面積がAoに成るようにパターンニン
グされた固着用パッド132が形成されている。133
は該プリント回路配線板表面の固着用パッド132上に
面積がA、高さがhの寸法でスクリーン印刷や定量滴下
により形成されたクリーム状のはんだペースト等の接着
材料である。ここで、A,Ao,Bo,ho,hの各寸
法は、Ao>Aもしくは、Bo>A,ho<h、更に、
該はんだペースト等の接着材料133が溶融や軟化して
固着用金属層131と固着用パッド132表面に濡れ広
がった時の高さがhoより小さくなるように設定する。
Example 10. FIG. 14 is a side view showing a manufacturing method of one embodiment according to the present invention for mounting a semiconductor device having external electrodes formed on one main surface of a main body on a printed circuit wiring board. FIG. 14A shows a state before the semiconductor device is mounted on the printed circuit wiring board. An external electrode 20 having a height ho is formed on one main surface 2 of the semiconductor device by being coated with a sufficient amount of solder for connecting to a printed circuit wiring board. 131 is formed on the lower surface of the semiconductor device body,
The metal layer is made of a metal having a property of being easily wetted by an adhesive material such as solder, is patterned to have an area of Bo, and is a metal layer for mechanically fixing the semiconductor device to the printed circuit wiring board 11. Electrode pads 12 for connecting electrodes of the semiconductor device and a fixing metal layer 131 formed on the lower surface of the semiconductor device are formed on the surface of the printed circuit wiring board 11 so as to have an area of Ao. A patterned fixing pad 132 is formed. 133
Is an adhesive material such as a cream-like solder paste formed on the fixing pad 132 on the surface of the printed circuit wiring board by screen printing or fixed amount dropping with an area A and a height h. Here, the respective dimensions of A, Ao, Bo, ho, h are Ao> A or Bo> A, ho <h, and
The height when the adhesive material 133 such as the solder paste is melted or softened and wets and spreads on the surfaces of the fixing metal layer 131 and the fixing pad 132 is set to be smaller than ho.

【0075】図14(b)は該半導体装置をプリント回
路配線板11に位置合わせし、該はんだペースト等の接
着材料133により両者を保持した状態を示す。この状
態で該はんだペースト等の接着材料133が該半導体装
置の固着用金属層131に接触し、該接着材料133の
粘着力により該半導体装置を保持した状態で、半導体装
置の外部電極20は該プリント回路配線板11の表面の
電極パッド12と接触していないか、単純に接触してい
るにすぎない。図14(c)は該半導体装置の該外部電
極20と該プリント回路配線板11の電極パッド12を
電気的に接続した状態を示す。半導体装置を保持した状
態で加熱することにより、半導体装置をプリント回路配
線板11に保持していた接着材料133及び外部電極2
0の表面を被覆したはんだが溶融し、前者は半導体装置
表面及びプリント回路配線板表面に形成された固着用金
属層131と固着用パッド132の全面に濡れ広がる。
この結果、接着材料133の高さは最初のhより低くな
り、溶融した外部電極表面を被覆したはんだがプリント
回路配線板上の電極パッド12に濡れ広がる。この状態
で室温まで冷却し、はんだを固着することにより半導体
装置のプリント回路配線板11への電気的、機械的接続
が完了する。
FIG. 14B shows a state in which the semiconductor device is aligned with the printed circuit wiring board 11 and both are held by the adhesive material 133 such as the solder paste. In this state, the adhesive material 133 such as the solder paste contacts the fixing metal layer 131 of the semiconductor device, and the semiconductor device is held by the adhesive force of the adhesive material 133. It is not in contact with the electrode pads 12 on the surface of the printed circuit wiring board 11, or is simply in contact therewith. FIG. 14C shows a state in which the external electrodes 20 of the semiconductor device and the electrode pads 12 of the printed circuit wiring board 11 are electrically connected. By heating the semiconductor device while holding it, the adhesive material 133 and the external electrode 2 that hold the semiconductor device on the printed circuit wiring board 11 are held.
The solder that covers the surface of No. 0 melts, and the former wets and spreads over the entire surface of the fixing metal layer 131 and the fixing pad 132 formed on the surface of the semiconductor device and the surface of the printed circuit wiring board.
As a result, the height of the adhesive material 133 becomes lower than the initial height h, and the molten solder coating the external electrode surface wets and spreads on the electrode pads 12 on the printed circuit wiring board. In this state, cooling to room temperature and fixing the solder completes the electrical and mechanical connection of the semiconductor device to the printed circuit wiring board 11.

【0076】この実施例によれば、従来の方法のよう
に、フラックスを滴下し半導体装置を保持する必要がな
く、余分なフラックス除去の工程が簡略化される。ま
た、接着材料を微細な形状にパターンニングする必要も
なく、電極パッド12,12間のショート等の不良の発
生を防止できる。更に、加熱工程ではんだペースト等の
接着材料133が溶融すると、その表面張力により半導
体装置の外部電極20とプリント回路配線板11上の電
極パッド12との位置合わせのずれが補正される効果が
得られる。また、外部電極20の高さhoのばらつきが
あっても、固着用接着材料133が固着用金属層131
及び固着用パッド132の表面に濡れ広がって、固着用
金属層131とパッド132間隔が小さくなり、外部電
極20の高さhoより小さくなるとhoの高さのばらつ
きを吸収して全ての外部電極をプリント回路配線板11
上の電極パッド12に触れさせ、両者を接着する効果も
得られる。
According to this embodiment, unlike the conventional method, it is not necessary to drop the flux to hold the semiconductor device, and the step of removing the extra flux is simplified. Further, it is not necessary to pattern the adhesive material into a fine shape, and it is possible to prevent the occurrence of defects such as a short circuit between the electrode pads 12, 12. Further, when the adhesive material 133 such as a solder paste is melted in the heating step, the surface tension of the adhesive material 133 can correct the misalignment between the external electrode 20 of the semiconductor device and the electrode pad 12 on the printed circuit wiring board 11. To be Further, even if the height ho of the external electrode 20 varies, the adhesive material 133 for adhesion is fixed to the metal layer 131 for adhesion.
Also, when the distance between the fixing metal layer 131 and the pad 132 is reduced by being spread over the surface of the fixing pad 132 and becomes smaller than the height ho of the external electrode 20, variations in height of ho are absorbed and all external electrodes are removed. Printed circuit wiring board 11
The effect of bringing the upper electrode pad 12 into contact and adhering the two is also obtained.

【0077】この実施例においては、半導体装置の外部
電極20に接合に必要な充分な量のはんだを被覆してい
るが、プリント回路配線板上の電極パッド12表面には
んだを被覆しても本発明の効果を損なうことは全く無
い。また、半導体装置上の固着用金属層131の形成方
法、及びプリント回路配線板11上の固着用パッド13
2の形成方法、材料構成に関する制約のないことも勿論
である。さらに、固着用接着材料133は、はんだに替
わり粘着性、加熱下での固着用パッドへの濡れ性等、同
等の性質があれば、はんだ以外の材料でも良い。外部電
極20と電極パッド12を加熱接合する方法も何等制約
のないことも勿論である。
In this embodiment, the external electrode 20 of the semiconductor device is coated with a sufficient amount of solder necessary for bonding, but even if the surface of the electrode pad 12 on the printed circuit wiring board is coated with solder, the The effect of the invention is not impaired at all. Further, a method for forming the fixing metal layer 131 on the semiconductor device, and the fixing pad 13 on the printed circuit wiring board 11.
It goes without saying that there are no restrictions on the forming method and the material composition of the second item. Further, the fixing adhesive material 133 may be a material other than solder as long as it has similar properties such as adhesiveness instead of solder and wettability to a fixing pad under heating. It goes without saying that there is no restriction on the method of heat-bonding the external electrode 20 and the electrode pad 12.

【0078】[0078]

【発明の効果】以上のように、この請求項1の発明によ
れば、電子回路が形成された半導体素子と、該半導体素
子に電気的に接続され、一端部が外部電極となる複数の
金属細条と、前記一端部が一主面上に露出するように、
前記半導体素子、複数の金属細条及び該半導体素子と金
属細条との接続部を封止し、かつ絶縁性を有する樹脂か
らなる封止部とにより構成したので、該半導体装置の回
路基板上に占める面積を前記一主面と略同等の面積とす
ることができ、該半導体装置を回路基板上に隙間なく最
大限密に配置することができる効果がある。
As described above, according to the invention of claim 1, a semiconductor element having an electronic circuit formed therein and a plurality of metals electrically connected to the semiconductor element and having one end serving as an external electrode. A strip, so that the one end is exposed on one main surface,
Since the semiconductor element, the plurality of metal strips and the connecting portion between the semiconductor element and the metal strip are sealed, and the sealing portion is made of a resin having an insulating property, the semiconductor device is provided on the circuit board. The area occupied by the semiconductor device can be made substantially the same as that of the one main surface, and the semiconductor devices can be arranged on the circuit board as closely as possible without a gap.

【0079】また、この請求項2の発明によれば、前記
金属細条の少なくともその一部を階段状に折曲するよう
に構成したので、封止時またはそれ以前に該金属細条に
外力が加わった場合に該金属細条が折れ曲がる等の不具
合を防止することができ、封止後に該金属細条に外力が
加わった場合に、該金属細条が封止部から抜け出るのを
防止することができる効果がある。
Further, according to the invention of claim 2, since at least a part of the metal strip is bent in a stepwise manner, an external force is applied to the metal strip at the time of sealing or before. It is possible to prevent problems such as bending of the metal strips when the metal strips are applied, and prevent the metal strips from coming out of the sealing portion when an external force is applied to the metal strips after sealing. There is an effect that can be.

【0080】また、この請求項3の発明によれば、複数
の前記金属細条を、一端部が前記一主面上の周辺部に配
置された複数の長片細条と、一端部が前記周辺部より内
側の前記一主面上に配置され、前記長片細条より短い複
数の短片細条とにより構成したので、前記一主面上の外
部電極の個数を増加させることができる効果がある。
According to the invention of claim 3, a plurality of the metal strips are provided, one end of which is a plurality of long strips disposed in the peripheral portion of the one main surface, and one end of which is the strip. Since it is arranged on the one main surface inside the peripheral portion and composed of a plurality of short strips shorter than the long strip, it is possible to increase the number of external electrodes on the one main surface. is there.

【0081】また、請求項4の発明によれば、前記一端
部の先端部分を前記一主面の面方向に折曲し、該先端部
分の外面を外部電極とするように構成したので、該外部
電極の接触面を大きくすることができる。また、先端部
分の折曲する位置を変えられるので、接触面の面積及び
形状を任意に設定することができる効果がある。
According to the invention of claim 4, the tip portion of the one end portion is bent in the surface direction of the one main surface, and the outer surface of the tip portion serves as an external electrode. The contact surface of the external electrode can be enlarged. Further, since the bending position of the tip portion can be changed, there is an effect that the area and shape of the contact surface can be set arbitrarily.

【0082】また、請求項5の発明によれば、電子回路
が形成された半導体素子と、該半導体素子に電気的に接
続され、かつ該接続部から所定の位置に外部電極となる
突起を有する複数の金属細条と、前記突起の少なくとも
その一部が一主面上に露出または突出するように、前記
半導体素子、複数の金属細条及び該半導体素子と金属細
条との接続部を封止し、かつ絶縁性を有する樹脂からな
る封止部とにより構成したので、該外部電極は一主面の
面方向外方に突出することがなく、したがって、該半導
体装置の回路基板上に占める面積を前記一主面と略同等
の面積と該半導体装置を回路基板上に隙間なく最大限密
に配置することができる効果がある。
According to the invention of claim 5, it has a semiconductor element on which an electronic circuit is formed, and a projection electrically connected to the semiconductor element and serving as an external electrode at a predetermined position from the connection portion. The plurality of metal strips and the semiconductor element, the plurality of metal strips, and the connecting portion between the semiconductor strips and the metal strips are sealed so that at least a part of the protrusion is exposed or projected on one main surface. Since the external electrode does not project outward in the surface direction of the one main surface, it occupies the circuit board of the semiconductor device. There is an effect that the semiconductor device can be arranged on the circuit board as closely as possible without any space, and the area is almost the same as the one main surface.

【0083】また、請求項6の発明によれば、電子回路
が形成された半導体素子と、該半導体素子に電気的に接
続され、かつ該接続部から所定の位置に外部電極となる
折曲部を有する複数の金属細条と、前記折曲部の少なく
ともその一部が一主面上に露出または突出するように、
前記半導体素子、複数の金属細条及び該半導体素子と金
属細条との接続部を封止し、かつ絶縁性を有する樹脂か
らなる封止部とにより構成したので、該外部電極は一主
面の面方向外方に突出することがなく、したがって、該
半導体装置の回路基板上に占める面積を前記一主面と略
同等の面積とすることができ、該半導体装置を回路基板
上に隙間なく最大限密に配置することができる効果があ
る。
According to the invention of claim 6, a semiconductor element on which an electronic circuit is formed and a bent portion which is electrically connected to the semiconductor element and serves as an external electrode at a predetermined position from the connection portion. A plurality of metal strips having, and at least a part of the bent portion is exposed or projected on one main surface,
Since the semiconductor element, the plurality of metal strips, and the sealing portion that seals the connecting portion between the semiconductor element and the metal strip and is made of a resin having an insulating property, the external electrode has one main surface. Of the semiconductor device, the area occupied on the circuit board of the semiconductor device can be made substantially the same as that of the one main surface, and the semiconductor device can be formed on the circuit board without any gap. The effect is that they can be arranged as close to each other as possible.

【0084】また、請求項7の発明によれば、前記外部
電極の表面を前記一主面に対して窪んだ状態となるよう
に構成したので、電気特性を測定する際に用いられる接
触端子の先端部を該外部電極の表面に接触した状態で良
好に保持することができ、したがって前記先端部が外部
電極から外れるおそれがないという効果がある。
Further, according to the invention of claim 7, since the surface of the external electrode is configured to be recessed with respect to the one main surface, the contact terminal used when measuring the electrical characteristics is There is an effect that the tip portion can be satisfactorily held in contact with the surface of the external electrode, and therefore the tip portion is not likely to come off from the external electrode.

【0085】また、請求項8の発明によれば、前記外部
電極の周囲に、接着材料に対して濡れ性が良く、かつ該
接着材料と固着する金属層を形成するように構成したの
で、半導体装置を回路基板上に強固に固定させることが
でき、外部電極の面積を電気的接続に必要な最小の面積
まで小さくすることができる効果がある。
Further, according to the invention of claim 8, since the metal layer which has good wettability to the adhesive material and is fixed to the adhesive material is formed around the external electrode, the semiconductor layer is formed. The device can be firmly fixed on the circuit board, and the area of the external electrode can be reduced to the minimum area required for electrical connection.

【0086】また、請求項9の発明によれば、前記一主
面上の前記外部電極の設けられていない領域部分に、接
着材料に対して濡れ性が良く、かつ該接着材料と固着す
る金属層を形成するように構成したので、半導体装置を
回路基板上に強固に固定させることができ、外部電極の
面積を電気的接続に必要な最小の面積まで小さくするこ
とができる効果がある。
Further, according to the invention of claim 9, a metal which has good wettability with respect to an adhesive material and which is fixed to the adhesive material is provided on a region portion on the one main surface where the external electrode is not provided. Since the layers are formed, the semiconductor device can be firmly fixed on the circuit board, and the area of the external electrode can be reduced to the minimum area required for electrical connection.

【0087】また、請求項10の発明によれば、前記接
着材料を、ペースト状のはんだまたはシート状のはんだ
のいずれか1種により構成したので、半導体装置を回路
基板上に強固に固定することができる効果がある。
According to the tenth aspect of the present invention, since the adhesive material is composed of either one of paste solder or sheet solder, the semiconductor device can be firmly fixed on the circuit board. There is an effect that can be.

【0088】また、請求項11の発明によれば、前記金
属細条の一主面が封止面の一主面に露出するように、該
金属細条を配置し前記半導体素子、複数の金属細条及び
該半導体素子と金属細条との接続部を、絶縁性を有する
樹脂により封止する封止工程と、前記金属細条の露出部
分の一部を、封止した樹脂の表面から離間する方向へ折
り曲げる折曲工程と、折り曲げた該金属細条を所定の長
さに切断する切断工程とにより構成したので、封止部の
一主面上に、金属細条の露出部分を折曲した外部電極リ
ードを形成することができ、該外部電極リードの間隔を
任意に設定することができる効果がある。
According to the invention of claim 11, the metal strips are arranged such that one main surface of the metal strips is exposed to one main surface of the sealing surface, and the semiconductor element and the plurality of metals are arranged. A sealing step of sealing the strip and the connection between the semiconductor element and the metal strip with a resin having an insulating property, and separating a part of the exposed portion of the metal strip from the surface of the sealed resin. Since it is composed of a bending step of bending in the direction of the bending and a cutting step of cutting the bent metal strip to a predetermined length, the exposed portion of the metal strip is bent on one main surface of the sealing portion. The external electrode leads described above can be formed, and the interval between the external electrode leads can be set arbitrarily.

【0089】また、請求項12の発明によれば、金属細
条に設けられた前記突起の少なくとも一部が封止面の一
主面より露出または突出するように該金属細条を配置
し、前記半導体素子、複数の金属細条及び該半導体素子
と金属細条との接続部を絶縁性を有する樹脂により封止
する封止工程と、前記金属細条の封止面から外方へ伸び
る部分を該封止面に沿って切断する切断工程とにより構
成したので、封止部の一主面上に、当該面に露出または
突出する外部電極を形成することができ、該外部電極の
間隔を任意に設定することができる効果がある。
According to the twelfth aspect of the invention, the metal strip is arranged such that at least a part of the protrusion provided on the metal strip is exposed or projected from one main surface of the sealing surface, A sealing step of sealing the semiconductor element, a plurality of metal strips and a connecting portion between the semiconductor element and the metal strip with an insulating resin, and a portion extending outward from the sealing surface of the metal strip. And the cutting step of cutting along the sealing surface, it is possible to form, on one main surface of the sealing portion, external electrodes that are exposed or protrude on the surface, and the distance between the external electrodes is increased. There is an effect that it can be set arbitrarily.

【0090】また、請求項13の発明によれば、前記折
曲部の少なくとも一部が封止面の一主面より露出または
突出するように該金属細条を配置し、前記半導体素子、
複数の金属細条及び該半導体素子と金属細条との接続部
を絶縁性を有する樹脂により封止する封止工程と、前記
金属細条の封止面から外方へ伸びる部分を該封止面に沿
って切断する切断工程とにより構成したので、封止部の
一主面上に、当該面に露出または突出する外部電極を形
成することができ、該外部電極の間隔を任意に設定する
ことができる効果がある。
According to a thirteenth aspect of the invention, the metal strip is arranged such that at least a part of the bent portion is exposed or projected from one main surface of the sealing surface, and the semiconductor element,
A sealing step of sealing a plurality of metal strips and a connecting portion between the semiconductor element and the metal strips with a resin having an insulating property, and sealing a portion extending outward from a sealing surface of the metal strips. Since it is configured by the cutting step of cutting along the surface, the external electrodes exposed or protruding from the surface can be formed on one main surface of the sealing portion, and the interval between the external electrodes can be set arbitrarily. There is an effect that can be.

【0091】また、請求項14の発明によれば、前記封
止工程を、一面に前記突起または前記折曲部のいずれか
の高さより浅い深さの第1の凹部が形成された第1の金
型本体と、一面の前記第1の凹部と対向する位置に前記
半導体素子を収納する第2の凹部が形成された第2の金
型本体とを有する封止用金型を用い、前記第2の凹部に
前記半導体素子を収納し、前記第1の金型本体の一面と
前記第2の金型本体の一面により前記金属細条を挾持し
て前記突起または前記折曲部のいずれかの上端部を前記
第1の凹部の底面に圧接させ、これら第1及び第2の凹
部により囲まれる領域に前記樹脂を注入するように構成
したので、封止部の一主面上に、当該面に露出する外部
電極を形成することができ、該外部電極の間隔を任意に
設定することができる効果がある。
According to the fourteenth aspect of the present invention, in the sealing step, the first concave portion having a depth shallower than the height of either the protrusion or the bent portion is formed on one surface. A sealing mold having a mold main body and a second mold main body in which a second concave portion for accommodating the semiconductor element is formed at a position facing the first concave portion on one surface, The semiconductor element is housed in the concave portion of 2, and the metal strip is held between one surface of the first mold body and one surface of the second mold body, and either the protrusion or the bent portion is held. Since the upper end portion is brought into pressure contact with the bottom surface of the first recess and the resin is injected into the region surrounded by the first and second recesses, the resin is injected onto the one main surface of the sealing portion. It is possible to form external electrodes that are exposed to the outside, and the interval between the external electrodes can be set arbitrarily. There is that effect.

【0092】また、請求項15の発明によれば、前記封
止工程を、一面に前記突起または前記折曲部のいずれか
の高さより浅い深さの第1の凹部が形成され、該第1の
凹部の底面の前記突起または前記折曲部のいずれかの上
端部に一致する位置に前記突起または前記折曲部の上端
部が封止面より突出するように該上端部を収納する収納
部が形成された第1の金型本体と、一面の前記第1の凹
部と対向する位置に前記半導体素子を収納する第2の凹
部が形成された第2の金型本体とを有する封止用金型を
用い、前記第2の凹部に前記半導体素子を収納し、前記
第1の金型本体の一面と前記第2の金型本体の一面によ
り前記金属細条を挾持して前記突起または前記折曲部の
いずれかの上端部を前記収納部に収納し、これら第1及
び第2の凹部により囲まれる領域に前記樹脂を注入する
ように構成したので、封止部の一主面上に、当該面から
突出した外部電極を形成することができ、該外部電極の
突出部の間隔を任意に設定することができる効果があ
る。
According to a fifteenth aspect of the present invention, in the sealing step, a first concave portion having a depth shallower than the height of either the protrusion or the bent portion is formed on one surface, and the first concave portion is formed. An accommodating portion for accommodating the upper end of the protrusion or the bent portion so that the upper end of the protrusion or the bent portion protrudes from the sealing surface at a position corresponding to the upper end of the protrusion or the bent portion on the bottom surface of the concave portion For sealing, which has a first mold body in which a second concave part for accommodating the semiconductor element is formed at a position facing the first concave part on one surface. The semiconductor element is housed in the second recess using a mold, and the metal strip is held between one surface of the first mold body and one surface of the second mold body to hold the protrusion or the protrusion. The upper end of any one of the bent portions is housed in the housing, and the first and second recesses are used to store the bent parts. Since the resin is injected into the enclosed area, the external electrode protruding from the main surface of the sealing portion can be formed on one main surface of the sealing portion, and the interval between the protruding portions of the external electrode can be arbitrarily set. There is an effect that can be set.

【0093】また、請求項16の発明によれば、接着材
料を、前記金属層及び固着用パッド各々の全面に広がっ
た状態で固着し、かつその高さは前記外部電極の高さよ
り低くするように構成したので、前記金属層と固着用パ
ッドとは接着材料を介して強固に固着され、周囲の電極
パッドと接触するおそれがなくなる。したがって、構成
全体の信頼性を向上させることができる効果がある。
According to the sixteenth aspect of the present invention, the adhesive material is fixed in a state of being spread over the entire surface of each of the metal layer and the fixing pad, and its height is made lower than the height of the external electrode. With this configuration, the metal layer and the fixing pad are firmly fixed to each other via the adhesive material, and there is no possibility of contact with the surrounding electrode pads. Therefore, there is an effect that the reliability of the entire configuration can be improved.

【0094】また、請求項17の発明によれば、該固着
用パッド上に、その面積が該固着用パットの面積より小
さくかつその高さが前記外部電極の高さより高くなるよ
うに、前記金属層と濡れ性が良くかつ固着する接着材料
を付着される付着工程と、該接着材料上に前記金属層
が、前記電極パッド上に前記外部電極がそれぞれ位置す
るように半導体装置の位置合わせを行ない、回路基板上
に該半導体装置を載置する載置工程と、前記接着材料を
前記金属層及び固着用パッド各々の全面に広げ、該固着
用パッドに前記接着材料を介して前記金属層を固着させ
るとともに、前記電極パッドに前記外部電極を接続する
接続工程とにより構成したので、前記接着材料を微細な
形状にパターンニングする必要がなく、該接着材料を介
して前記金属層と固着用パッドとを強固に固着させるこ
とができ、しかも周囲の電極パッドと接触するおそれも
なくなる。また、前記接着材料を金属層及び固着用パッ
ド各々の全面に広げた際に、その表面張力により該半導
体装置の外部電極リードと回路基板の電極パッドとの位
置ずれを補正することができる効果がある。
According to the seventeenth aspect of the present invention, the metal is formed on the fixing pad so that the area thereof is smaller than the area of the fixing pad and the height thereof is higher than the height of the external electrode. Adhering step of adhering an adhesive material having good wettability and adhesion to the layer, and aligning the semiconductor device so that the metal layer is located on the adhesive material and the external electrode is located on the electrode pad. A mounting step of mounting the semiconductor device on a circuit board, spreading the adhesive material over the entire surface of each of the metal layer and the fixing pad, and fixing the metal layer to the fixing pad via the adhesive material And the connection step of connecting the external electrode to the electrode pad, it is not necessary to pattern the adhesive material into a fine shape, and the adhesive material does not interfere with the metal layer through the adhesive material. And use the pad can be firmly secured, yet also eliminates risk of contact with the surrounding of the electrode pads. Further, when the adhesive material is spread over the entire surface of each of the metal layer and the fixing pad, the surface tension of the adhesive material can correct the positional deviation between the external electrode lead of the semiconductor device and the electrode pad of the circuit board. is there.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例による半導体装置を示す斜
視図である。
FIG. 1 is a perspective view showing a semiconductor device according to an embodiment of the present invention.

【図2】図1のC−C線に沿う断面図である。FIG. 2 is a cross-sectional view taken along the line CC of FIG.

【図3】この発明の他の実施例を示す半導体装置の断面
図である。
FIG. 3 is a sectional view of a semiconductor device showing another embodiment of the present invention.

【図4】この発明の他の実施例を示す半導体装置の斜視
図である。
FIG. 4 is a perspective view of a semiconductor device showing another embodiment of the present invention.

【図5】図4のD−D線に沿う断面図である。5 is a cross-sectional view taken along the line DD of FIG.

【図6】この発明の他の実施例を示す半導体装置の斜視
図である。
FIG. 6 is a perspective view of a semiconductor device showing another embodiment of the present invention.

【図7】図6のE−E線に沿う断面図である。7 is a cross-sectional view taken along the line EE of FIG.

【図8】この発明の一実施例による半導体装置の製造方
法を示す過程図である。
FIG. 8 is a process chart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

【図9】この発明の他の実施例を示す半導体装置の製造
方法の過程図である。
FIG. 9 is a process chart of a method of manufacturing a semiconductor device showing another embodiment of the present invention.

【図10】この発明の他の実施例を示す半導体装置の製
造方法の樹脂封止工程を示す過程図である。
FIG. 10 is a process drawing showing a resin-sealing step of a method of manufacturing a semiconductor device showing another embodiment of the present invention.

【図11】この発明の他の実施例を示すテスト状態の半
導体装置の側面図である。
FIG. 11 is a side view of the semiconductor device in a test state showing another embodiment of the present invention.

【図12】この発明の一実施例による半導体装置をプリ
ント回路配線板に搭載した状態を示す側断面図である。
FIG. 12 is a side sectional view showing a state in which a semiconductor device according to an embodiment of the present invention is mounted on a printed circuit wiring board.

【図13】図12の部分拡大断面図である。13 is a partially enlarged cross-sectional view of FIG.

【図14】この発明の一実施例による半導体装置のプリ
ント回路配線板への搭載方法を示す側面図である。
FIG. 14 is a side view showing a method of mounting a semiconductor device on a printed circuit wiring board according to an embodiment of the present invention.

【図15】従来の半導体装置を示す斜視図である。FIG. 15 is a perspective view showing a conventional semiconductor device.

【図16】図15のA−A線に沿う断面図である。16 is a cross-sectional view taken along the line AA of FIG.

【図17】従来の半導体装置をプリント回路配線板上に
搭載した状態を示す側断面図である。
FIG. 17 is a side sectional view showing a state in which a conventional semiconductor device is mounted on a printed circuit wiring board.

【図18】従来の他の半導体装置を示す斜視図である。FIG. 18 is a perspective view showing another conventional semiconductor device.

【図19】図18のB−B線に沿う断面図である。19 is a cross-sectional view taken along the line BB of FIG.

【図20】従来のテスト状態の半導体装置の側面図であ
る。
FIG. 20 is a side view of a conventional semiconductor device in a test state.

【図21】従来の半導体装置をプリント回路配線板に搭
載した状態を示す側断面図である。
FIG. 21 is a side sectional view showing a state in which a conventional semiconductor device is mounted on a printed circuit wiring board.

【図22】図21の部分拡大断面図である。22 is a partially enlarged sectional view of FIG.

【図23】従来の半導体装置のプリント回路配線板への
搭載方法を示す側断面図である。
FIG. 23 is a side sectional view showing a method for mounting a conventional semiconductor device on a printed circuit wiring board.

【図24】従来の半導体装置のプリント回路配線板への
他の搭載方法を示す側断面図である。
FIG. 24 is a side sectional view showing another method for mounting a conventional semiconductor device on a printed circuit wiring board.

【符号の説明】[Explanation of symbols]

1 封止部 2 一主面(下面) 3 他の主面(上面) 4 側面 8 半導体素子 11 プリント回路配線板(回路基板) 12 電極パッド 13 接着材料 20 外部電極 51 外部電極リード(金属細条) 52 先端部 61 外部電極リード(金属細条) 62 段部 71 外側電極リード 72 内側電極リード 81 外部電極 91 リードフレーム(金属細条) 91a 先端部 92 封止樹脂 94 変曲部(折曲部) 95 表面 100 金型の上型(第1の金型本体) 101 窪み(第1の凹部) 102 一面 103 金型の下型(第2の金型本体) 104 窪み(第2の凹部) 105 一面 110 外部電極 121 金属層 131 金属層 132 固着用パッド 133 接着材料 1 Sealing Part 2 One Main Surface (Lower Surface) 3 Other Main Surface (Upper Surface) 4 Side Surface 8 Semiconductor Element 11 Printed Circuit Wiring Board (Circuit Board) 12 Electrode Pad 13 Adhesive Material 20 External Electrode 51 External Electrode Lead (Metal Strip) ) 52 tip part 61 external electrode lead (metal strip) 62 step part 71 outer electrode lead 72 inner electrode lead 81 external electrode 91 lead frame (metal strip) 91a tip part 92 sealing resin 94 bent part (bent part) ) 95 surface 100 mold upper mold (first mold body) 101 recess (first recess) 102 one side 103 mold lower mold (second mold body) 104 recess (second recess) 105 One surface 110 External electrode 121 Metal layer 131 Metal layer 132 Fixing pad 133 Adhesive material

Claims (17)

【特許請求の範囲】[Claims] 【請求項1】 電子回路が形成された半導体素子と、該
半導体素子に電気的に接続され、一端部が外部電極とな
る複数の金属細条と、前記一端部が一主面上に露出する
ように、前記半導体素子、複数の金属細条及び該半導体
素子と金属細条との接続部を封止し、かつ、絶縁性を有
する樹脂からなる封止部とを備えたことを特徴とする半
導体装置。
1. A semiconductor element on which an electronic circuit is formed, a plurality of metal strips electrically connected to the semiconductor element and having one end serving as an external electrode, and the one end exposed on one main surface. Thus, the semiconductor element, a plurality of metal strips, and a sealing portion that seals a connecting portion between the semiconductor element and the metal strip and is made of a resin having an insulating property are provided. Semiconductor device.
【請求項2】 前記金属細条の少なくともその一部を階
段状に折曲したことを特徴とする半導体装置。
2. A semiconductor device, wherein at least a part of the metal strip is bent stepwise.
【請求項3】 複数の前記金属細条は、一端部が前記一
主面上の周辺部に配置された複数の長片細条と、一端部
が前記周辺部より内側の前記一主面上に配置され、前記
長片細条より短い複数の短片細条とからなることを特徴
とする請求項1または2記載の半導体装置。
3. The plurality of metal strips have a plurality of long strips whose one end is arranged in a peripheral portion on the one main surface, and one end on the one main surface inside the peripheral portion. 3. The semiconductor device according to claim 1, wherein the semiconductor device comprises a plurality of short strips which are arranged in a short length and are shorter than the long strips.
【請求項4】 前記一端部の先端部分を前記一主面の面
方向に折曲し、該先端部分の外面を外部電極としたこと
を特徴とする請求項1ないし3のいずれか1項記載の半
導体装置。
4. The one end according to claim 1, wherein a tip portion of the one end portion is bent in a surface direction of the one main surface, and an outer surface of the tip portion serves as an external electrode. Semiconductor device.
【請求項5】 電子回路が形成された半導体素子と、該
半導体素子に電気的に接続され、かつ該接続部から所定
の位置に外部電極となる突起を有する複数の金属細条
と、前記突起の少なくともその一部が一主面上に露出ま
たは突出するように、前記半導体素子、複数の金属細条
及び該半導体素子と金属細条との接続部を封止し、かつ
絶縁性を有する樹脂からなる封止部とを備えたことを特
徴とする半導体装置。
5. A semiconductor element on which an electronic circuit is formed, a plurality of metal strips electrically connected to the semiconductor element, and having projections serving as external electrodes at predetermined positions from the connection portion, and the projections. A resin that seals the semiconductor element, the plurality of metal strips and the connecting portion between the semiconductor element and the metal strip, and has an insulating property so that at least a part thereof is exposed or protrudes on one main surface. A semiconductor device comprising:
【請求項6】 電子回路が形成された半導体素子と、該
半導体素子に電気的に接続され、かつ該接続部から所定
の位置に外部電極となる折曲部を有する複数の金属細条
と、前記折曲部の少なくともその一部が一主面上に露出
または突出するように、前記半導体素子、複数の金属細
条及び該半導体素子と金属細条との接続部を封止し、か
つ絶縁性を有する樹脂からなる封止部とを備えたことを
特徴とする半導体装置。
6. A semiconductor element on which an electronic circuit is formed, a plurality of metal strips electrically connected to the semiconductor element, and having a bent portion to be an external electrode at a predetermined position from the connection portion, The semiconductor element, the plurality of metal strips, and the connecting portion between the semiconductor element and the metal strip are sealed and insulated so that at least a part of the bent portion is exposed or projected on one main surface. And a sealing portion made of a resin having properties.
【請求項7】 前記外部電極の表面は、前記一主面に対
して窪んだ状態であることを特徴とする請求項1ないし
6のいずれか1項記載の半導体装置。
7. The semiconductor device according to claim 1, wherein a surface of the external electrode is recessed with respect to the one main surface.
【請求項8】 前記一主面上の前記外部電極の周囲に、
接着材料に対して濡れ性が良く、かつ該接着材料と固着
する金属層を形成したことを特徴とする請求項1ないし
7のいずれか1項記載の半導体装置。
8. The periphery of the external electrode on the one main surface,
8. The semiconductor device according to claim 1, wherein a metal layer having good wettability with respect to the adhesive material and being fixed to the adhesive material is formed.
【請求項9】 前記一主面上の前記外部電極の設けられ
ていない領域部分に、接着材料に対して濡れ性が良く、
かつ該接着材料と固着する金属層を形成したことを特徴
とする請求項1ないし7のいずれか1項記載の半導体装
置。
9. The wettability with respect to an adhesive material is good in a region portion of the one main surface where the external electrode is not provided,
8. The semiconductor device according to claim 1, further comprising a metal layer that is fixed to the adhesive material.
【請求項10】 前記接着材料を、ペースト状のはんだ
または、シート状のはんだのいずれか1種としたことを
特徴とする請求項8または9記載の半導体装置。
10. The semiconductor device according to claim 8, wherein the adhesive material is one of paste-like solder and sheet-like solder.
【請求項11】 電子回路が形成された半導体装置と複
数の金属細条とを電気的に接続する接続工程と、前記金
属細条の一主面が封止面の一主面に露出するように、該
金属細条を配置し、前記半導体素子、複数の金属細条及
び該半導体素子と金属細条との接続部を、絶縁性を有す
る樹脂により封止する封止工程と、前記金属細条の露出
部分の一部を、封止した樹脂の表面から離間する方向へ
折り曲げる折曲工程と、折り曲げた該金属細条を所定の
長さに切断する切断工程とを備えたことを特徴とする半
導体装置の製造方法。
11. A connecting step for electrically connecting a semiconductor device having an electronic circuit formed thereon and a plurality of metal strips, and one main surface of the metal strips is exposed on one main surface of a sealing surface. A sealing step of arranging the metal strips, and sealing the semiconductor element, the plurality of metal strips, and the connection portion between the semiconductor element and the metal strips with an insulating resin. A bending step for bending a part of the exposed portion of the strip in a direction away from the surface of the sealed resin; and a cutting step for cutting the folded metal strip to a predetermined length. Of manufacturing a semiconductor device.
【請求項12】 電子回路が形成された半導体素子と、
先端部から所定の位置に突起を有する複数の金属細条の
各先端部とを電気的に接続する接続工程と、前記突起の
少なくとも一部が封止面の一主面より露出または突出す
るように該金属細条を配置し、前記半導体素子、複数の
金属細条及び該半導体素子と金属細条との接続部を絶縁
性を有する樹脂により封止する封止工程と、前記金属細
条の封止面から外方へ伸びる部分を該封止面に沿って切
断する切断工程とを備えたことを特徴とする半導体装置
の製造方法。
12. A semiconductor device having an electronic circuit formed thereon,
A connecting step of electrically connecting each tip of a plurality of metal strips having a projection at a predetermined position from the tip, so that at least a part of the projection is exposed or protrudes from one main surface of the sealing surface. A sealing step of arranging the metal strips on the semiconductor element, a plurality of metal strips, and a connecting portion between the semiconductor element and the metal strips with an insulating resin; And a step of cutting a portion extending outward from the sealing surface along the sealing surface.
【請求項13】 電子回路が形成された半導体素子と、
先端部から所定の位置に外部電極となる折曲部を有する
複数の金属細条の各先端部とを電気的に接続する接続工
程と、前記折曲部の少なくとも一部が封止面の一主面よ
り露出または突出するように該金属細条を配置し、前記
半導体素子、複数の金属細条及び該半導体素子と金属細
条との接続部を絶縁性を有する樹脂により封止する封止
工程と、前記金属細条の封止面から外方へ伸びる部分を
該封止面に沿って切断する切断工程とを備えたことを特
徴とする半導体装置の製造方法。
13. A semiconductor device having an electronic circuit,
A connecting step of electrically connecting each tip of a plurality of metal strips having a bent portion to be an external electrode at a predetermined position from the tip, and at least a part of the bent portion is a sealing surface. Sealing in which the metal strips are arranged so as to be exposed or projected from the main surface, and the semiconductor element, a plurality of metal strips, and a connection portion between the semiconductor element and the metal strips are sealed with a resin having an insulating property. A method of manufacturing a semiconductor device, comprising: a step; and a cutting step of cutting a portion of the metal strip extending outward from a sealing surface along the sealing surface.
【請求項14】 前記封止工程は、一面に前記突起また
は前記折曲部のいずれかの高さより浅い深さの第1の凹
部が形成された第1の金型本体と、一面の前記第1の凹
部と対向する位置に前記半導体素子を収納する第2の凹
部が形成された第2の金型本体とを有する封止用金型を
用い、前記第2の凹部に前記半導体素子を収納し、前記
第1の金型本体の一面と前記第2の金型本体の一面によ
り前記金属細条を挟持して前記突起または前記折曲部の
いずれかの上端部を前記第1の凹部の底面に圧接させ、
これら第1及び第2の凹部により囲まれる領域に前記樹
脂を注入する樹脂封止工程であることを特徴とする請求
項12または13記載の半導体装置の製造方法。
14. The sealing step comprises: a first die main body having a first recess having a depth shallower than the height of either the protrusion or the bent portion formed on one surface; Using a sealing mold having a second mold body in which a second concave part for accommodating the semiconductor element is formed at a position facing the concave part of No. 1, the semiconductor element is accommodated in the second concave part. Then, the metal strip is sandwiched between the one surface of the first mold body and the one surface of the second mold body, and the upper end of either the projection or the bent portion is formed in the first recess. Press it against the bottom,
14. The method of manufacturing a semiconductor device according to claim 12, which is a resin sealing step of injecting the resin into a region surrounded by the first and second recesses.
【請求項15】 前記封止工程は、一面に前記突起また
は前記折曲部のいずれかの高さより浅い深さの第1の凹
部が形成され、該第1の凹部の底面の前記突起または前
記折曲部のいずれかの上端部に一致する位置に前記突起
または前記折曲部の上端部が封止面より突出するように
該上端部を収納する収納部が形成された第1の金型本体
と、一面の前記第1の凹部と対向する位置に前記半導体
素子を収納する第2の凹部が形成された第2の金型本体
とを有する封止用金型を用い、前記第2の凹部に前記半
導体素子を収納し、前記第1の金型本体の一面と前記第
2の金型本体の一面により前記金属細条を挟持して前記
突起または前記折曲部のいずれかの上端部を前記収納部
に収納し、これら第1及び第2の凹部により囲まれる領
域に前記樹脂を注入する樹脂封止工程であることを特徴
とする請求項12または13記載の半導体装置の製造方
法。
15. In the sealing step, a first recess having a depth shallower than the height of either the projection or the bent portion is formed on one surface, and the projection or the bottom surface of the first recess is formed. A first mold in which a storage portion for storing the upper end is formed at a position corresponding to an upper end of the bent portion so that the projection or the upper end of the bent portion projects from the sealing surface. A sealing die having a main body and a second die main body having a second concave portion for accommodating the semiconductor element formed at a position facing the first concave portion on one surface is used. The semiconductor element is housed in a recess, and the metal strip is sandwiched between one surface of the first mold body and one surface of the second mold body, and the upper end of either the protrusion or the bent portion is held. Is stored in the storage portion, and the resin is injected into the area surrounded by the first and second recesses. 14. The method of manufacturing a semiconductor device according to claim 12, which is a resin encapsulation step.
【請求項16】 一主面上に、複数の外部電極と接着材
料に対して濡れ性が良く、かつ該接着材料と固着する金
属層とを有する半導体装置と、一面上に前記外部電極を
載置する電極パッドと前記金属層を固着する固着用パッ
ドとを有する回路基板と、前記金属層及び固着用パッド
に、各々の全面に広がった状態で固着し、かつ、その高
さが前記外部電極の高さより低い接着材料とを備えたこ
とを特徴とする半導体装置の搭載構造。
16. A semiconductor device having a plurality of external electrodes and a metal layer having good wettability with an adhesive material and fixed to the adhesive material on one main surface, and the external electrodes mounted on the one surface. A circuit board having an electrode pad to be placed and a fixing pad for fixing the metal layer, and the metal layer and the fixing pad are fixed to the metal layer and the fixing pad in a state of being spread over the respective surfaces, and the height thereof is the external electrode. And a bonding material lower than the height of the semiconductor device.
【請求項17】 半導体装置の一主面上に設けられた複
数の外部電極をそれぞれ載置する複数の電極パッドと、
該一主面上に設けられた金属層を固着する固着用パッド
とを有する回路基板の該固着用パッド上に、その面積が
該固着用パッドの面積より小さくかつその高さが前記外
部電極の高さより高くなるように、前記金属層と濡れ性
が良くかつ固着する接着材料を付着させる付着工程と、
該接着材料上に前記金属層が、前記電極パッド上に前記
外部電極がそれぞれ位置するように半導体装置の位置合
わせを行ない、回路基板上に該半導体装置を載置する載
置工程と、前記接着材料を前記金属層及び固着用パッド
各々の全面に広げ、該固着用パッドに前記接着材料を介
して前記金属層を固着させるとともに、前記電極パッド
に前記外部電極を接続する接続工程とを備えたことを特
徴とする半導体装置の搭載方法。
17. A plurality of electrode pads respectively mounting a plurality of external electrodes provided on one main surface of a semiconductor device,
On the fixing pad of a circuit board having a fixing pad for fixing a metal layer provided on the one main surface, the area of the circuit board is smaller than the area of the fixing pad and the height of the external electrode is smaller than the area of the fixing electrode. An attaching step of attaching an adhesive material having good wettability and fixing to the metal layer so as to be higher than the height;
A step of placing the semiconductor device on the circuit board by aligning the semiconductor device such that the metal layer is placed on the adhesive material and the external electrodes are placed on the electrode pads; and A step of spreading the material on the entire surface of each of the metal layer and the fixing pad, fixing the metal layer to the fixing pad via the adhesive material, and connecting the external electrode to the electrode pad. A method for mounting a semiconductor device, comprising:
JP514294A 1994-01-21 1994-01-21 Semiconductor device, its manufacture, its mounting structure and mounting method Pending JPH07211847A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP514294A JPH07211847A (en) 1994-01-21 1994-01-21 Semiconductor device, its manufacture, its mounting structure and mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP514294A JPH07211847A (en) 1994-01-21 1994-01-21 Semiconductor device, its manufacture, its mounting structure and mounting method

Publications (1)

Publication Number Publication Date
JPH07211847A true JPH07211847A (en) 1995-08-11

Family

ID=11603060

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08125066A (en) * 1994-10-26 1996-05-17 Dainippon Printing Co Ltd Resin-sealed semiconductor device and lead frame used for it, and manufacture of resin-sealed semiconductor device
EP0860877A3 (en) * 1997-02-25 2001-02-28 Oki Electric Industry Co., Ltd. Semiconductor device and method for producing thereof
JP2006334795A (en) * 2005-05-31 2006-12-14 Victor Co Of Japan Ltd Mold
JP2017117825A (en) * 2015-12-21 2017-06-29 日立オートモティブシステムズ株式会社 Semiconductor package and semiconductor assembly
JP6602519B1 (en) * 2019-05-09 2019-11-06 三菱電機株式会社 Semiconductor device, deterioration diagnosis device for semiconductor device, and deterioration diagnosis method for semiconductor device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08125066A (en) * 1994-10-26 1996-05-17 Dainippon Printing Co Ltd Resin-sealed semiconductor device and lead frame used for it, and manufacture of resin-sealed semiconductor device
EP0860877A3 (en) * 1997-02-25 2001-02-28 Oki Electric Industry Co., Ltd. Semiconductor device and method for producing thereof
EP1577944A1 (en) * 1997-02-25 2005-09-21 Oki Electric Industry Co., Ltd. Semiconductor device and method for production thereof
JP2006334795A (en) * 2005-05-31 2006-12-14 Victor Co Of Japan Ltd Mold
JP2017117825A (en) * 2015-12-21 2017-06-29 日立オートモティブシステムズ株式会社 Semiconductor package and semiconductor assembly
JP6602519B1 (en) * 2019-05-09 2019-11-06 三菱電機株式会社 Semiconductor device, deterioration diagnosis device for semiconductor device, and deterioration diagnosis method for semiconductor device
WO2020225897A1 (en) * 2019-05-09 2020-11-12 三菱電機株式会社 Semiconductor device, semiconductor device deterioration diagnosis device, and semiconductor device deterioration diagnosis method

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