JPH0720235B2 - Video signal processor - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing device using a field memory effective for use in a video tape recorder.

2. Description of the Related Art In recent years, in a video signal processing device using a field memory, a special effect of displaying a continuous video as a fragmentary still image by changing the time for writing and reading one field of the video signal in the field memory ( Less than,
Strobe).

Hereinafter, an example of the above-described conventional video signal processing device will be described with reference to FIG. FIG. 3 is a diagram for explaining scanning of a television. In FIG. 3, reference numeral 9 is an image for explaining the difference between the two fields. The solid line in FIG. 3A is 265.5 scanning lines (hereinafter referred to as A field) and the broken line is 262.5 scanning lines ( It is a figure showing that one frame is made up from (hereinafter, referred to as B field), (b) of the figure is a figure showing an image of one frame, and (c) of the figure is an image of the same figure (b). FIG. 3D is a diagram in which only the A field of FIG. 3B is extracted, and FIG. 3D is a diagram in which only the B field of the image in FIG.

Conventional televisions perform interlaced scanning [(a) in the figure], so if there is an image as shown in (b) in the figure, A
Figure (c) in the field, Figure (d) in the B field
Image. When the image of FIG. 10C is written in the memory by a strobe, the video signal written in the memory becomes a still image by continuing the reading until the next writing. When the next video signal is written, the data of the previous video signal is rewritten and becomes a still image until the next video signal is written, so that a continuous fragmentary still image can be obtained.

Problems to be Solved by the Invention However, in the above configuration, when a field different from the previously written field is selected in order to determine which of FIGS. 3 (c) and 3 (d) is selected depending on the reading time. However, there is a problem that if the strobe is performed on the image as shown in FIG. 7B, the vertical shake may occur by one horizontal scanning.

An object of the present invention is to provide a video signal processing circuit in which writing into the field memory is always performed in the same field in view of the above-mentioned drawbacks of the prior art.

Means for Solving the Problems In order to solve the above problems, the present invention provides a memory having a capacity capable of storing at least one field of a video signal,
It is provided with a control circuit for writing the video signal in the memory for one field and reading the data until the next writing for 2n + 1 (n = 0, 1, 2, ...) Fields.

Action The present invention has the above-described configuration, and since the fields to be always written are the same, it is possible to obtain a stable still image by strobe.

Practical Example A video signal processing device according to an example of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of an embodiment of the present invention. In FIG. 1, 1 is a video signal input terminal, 2 is a memory having a capacity capable of accumulating at least one field, 3 is a reference clock generation circuit for producing a clock synchronized with a video signal, and 4 is a memory control for controlling the memory 2. A circuit, 5 is a vertical synchronizing pulse generation circuit extracted from a video signal, and 6 is a video signal output terminal.

The operation of the video signal processing apparatus of the present embodiment configured as described above will be described below with reference to FIGS. 1 and 2. FIG. 2 is a diagram for explaining the memory control.
In FIG. 2, 7 is a memory write, and 8 is a memory read.

Reference clock generation circuit 3 synchronized with the input video signal
The signal from the vertical synchronizing pulse generating circuit 5 extracted from the video signal is sent to the memory control circuit 4. At this time, the memory control circuit 4 writes one field in the memory as shown in FIG. 2 and then the image is 2n + 1 (n = 0, 1, 2, ...
...) Create a command to read during the field and send it to the memory.

Therefore, the next writing becomes the same as the previously written field, and the image does not shake vertically in one horizontal scanning.
When n (n = 1,2, ...) Fields are written, n (m = 1,2, ...) Fields are read out, so n + m = 2k (k = 1,2, ...) By sending a command from the memory control circuit 4 to the memory 2 so as to satisfy the above condition, the same field is written, so that a stable image in which no vertical shaking of one horizontal scanning occurs can be obtained.

As described above, according to the present invention, in the strobe used in the conventional video signal processing device, one horizontal scanning or vertical shake may occur in the still image because the reading time is irregular. However, according to the present invention, since the sum of reading and writing to the memory becomes an even number and becomes regular, it is possible to obtain a stable still image in which vertical horizontal scanning does not occur.

[Brief description of drawings]

FIG. 1 is a block diagram of essential parts showing a video signal processing device according to an embodiment of the present invention, FIG. 2 is a schematic diagram for explaining memory control of the device, and FIG. 3 is a conventional television field. It is a schematic diagram for explaining. 1 ... video signal input terminal, 2 ... memory, 3 ... reference clock generation circuit, 4 ... memory control circuit, 5 ... vertical sync pulse generation circuit, 6 ... video signal output terminal, 7 ... memory Write (WRITE) state, 8 ... Memory read (READ) state.

Claims (2)

[Claims] 1. A memory having a capacity capable of accumulating at least one field of a video signal, and an interval of 2n + 1 (n = 0 and a positive integer) field written in the memory between the fields of the video signal and read next time. A video signal processing device, comprising: 2. The control circuit sets the video signal to n (n = a positive integer)
Inter-field writing to the memory and reading until the next writing is m (m = positive integer) inter-field, and n
The video signal processing device according to claim 1, wherein the video signal processing device is controlled so that + m = 2k (k = a positive integer).