KR19980073567A - Closed circuit television systems - Google Patents

Abstract

end. TECHNICAL FIELD The invention described in the claims relates to a closed circuit television system having one recording apparatus and a display apparatus.

I. SUMMARY OF THE INVENTION A closed circuit television system capable of displaying a plurality of camera outputs on one display device in a closed circuit television system and recording only a predetermined video signal of a plurality of video signals in one recording device in accordance with movement. In providing.

All. SUMMARY OF THE INVENTION A closed circuit television system comprising one display device for displaying a plurality of camera outputs and one recording device for recording any camera output of the plurality of camera outputs. A video switching unit for selectively outputting the plurality of camera outputs according to the switching control signal, and one field per two fields when displaying input camera signals, and a recorded signal when displaying a recorded signal. Monitor control to display the input as it is, and in the normal VCR mode, the channel switching is performed every two fields to record one field per two fields, and in the time-lapse VCR mode, the channel switching is performed at a predetermined edge of the trigger signal. Determines the recording control unit for recording as it is, and the movement of the predetermined camera output signal A line memory for storing data input from an allocated channel and a switching control signal to selectively output the plurality of camera outputs, and determine whether data stored in the line memory is changed in units of fields. The controller is characterized in that the control unit for controlling to record the motion channel once more when there is a change in data.

la. Significant Use of the Invention: Can be used in surveillance network systems such as closed loop television systems.

Description

Closed circuit television systems

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a closed circuit television system, and more particularly, to a system for recording a video signal input to a specific channel according to a movement while monitoring a video signal input to a plurality of independent channels with a monitor.

Closed-circuit television (hereinafter referred to as CCTV) system is widely used in various fields, but its basic configuration is an imaging system (A) for photographing a subject and a subject and converting it into an electrical signal as shown in FIG. A transmission system (B) for transmitting the video signal, and a water receiver (C) for reproducing and displaying the transmitted video signal. If the system is enormous, the contents of these systems become complicated and a control system D is required for overall control, and includes an image processing system E capable of recording, reproducing, and processing images as necessary. To build a CCTV system.

On the other hand, due to the increasing demand of CCTV to prevent crime and theft, a system that displays multiple camera outputs on one monitor is becoming popular. In this case, the person who monitors the monitor can maximize the effectiveness of the system. That is, in the related art, a monitor records a specific video signal to a VCR when necessary while watching a video signal output from a camera of a CCTV system through a monitor. Accordingly, one camera output is displayed on one monitor, and one VCR is required to record a predetermined video signal. Therefore, in the CCTV system for monitoring a large space and place, a plurality of monitors and VCRs are required to monitor a predetermined video signal and to record a necessary video signal.

Accordingly, an object of the present invention is to display a plurality of camera output video signals on one display device in a closed loop television system having one display device and a recording device, and to display the plurality of camera output images on the recording device according to movement. A closed circuit television system capable of recording only a predetermined video signal among signals is provided.

In a closed circuit television system comprising one display device for displaying a plurality of camera outputs, and one recording device for recording any camera output among the plurality of camera outputs.

A video switching unit for selectively outputting the plurality of camera outputs according to an input switching control signal;

A monitor control unit which displays one field per two fields on the display device when displaying the input camera signals and displays the recorded signal as it is when displaying the recorded signal;

A recording control unit which performs channel switching every two fields in the normal VCR mode to record one field per two fields and performs channel switching at a predetermined edge of the trigger signal in the time-lapse VCR mode to record the input signal as it is;

A line memory for storing data inputted from an allocated channel for determining movement of a predetermined camera output signal;

Outputs a switching control signal to sequentially select and output the plurality of camera outputs and determines whether data stored in the line memory is changed in units of one field to control recording of a moving channel once more when data changes. Characterized in that it consists of a control unit.

1 is a basic block diagram of a closed circuit television system.

2 is a block diagram of a closed circuit television system according to an embodiment of the present invention;

FIG. 3 is a detailed configuration diagram of the recording control unit 36 and the monitor control unit 38 in FIG. 2.

Hereinafter, an operation according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a CCTV system according to an embodiment of the present invention, wherein the CCTV system records one monitor MON and a predetermined camera output video signal displaying 16 camera output video signals. It includes a VCR. Referring to FIG. 2, first, when 16 camera output video signals are input to the video switching unit 10 of a CCTV system, 5 (REC1, REC2, MON1, MON2, MOT) are controlled by the control signals output from the CPU 12. Is generated at the video switching unit 10. The REC1 and REC2 are channels for recording, the MON1 and MON2 are channels for displaying on a monitor, and the MOT is a channel for finding motion. On the other hand, the channels for recording and the channels for displaying on the monitor are separated into Y and C signals by the Y / C separator 14 and input to the PLL sync separator color decoder 16, respectively. Accordingly, the Y signal and the C signal are synchronously separated from the PLL and color decoded, and then the MUX (control signal: CS) CS1 and CS2 are output from the recording control unit 36 and the monitor control unit 38. 18 and 20, respectively, and multiplexed to output digital 8-bit signals of RECY, RECC, MONY, and MONC. REC12 CLK, HS, VS and MON12 CLK, HS, VS outputted from the PLL sync separator color decoder 16 are also multiplexed and output from the MUX 18, 20, respectively. The REC12 CLK, HS, and VS are clocks of two channels (REC1, REC2) and horizontal and vertical synchronization signals for recording, and the MON12 CLK, HS, VS are clocks of two channels (MON1, MON2) for display on a monitor. Horizontal and vertical synchronization signals. On the other hand, the multiplexed RECY and RECC are recorded in the pipo memory (22, 24) by the various control signals (RSTW, RSTR CS2) output from the recording control section (36), and then read through the video encoder (26). It is input to / C mixing part 28. RECY and RECC are mixed in the Y / C mixing unit 28 and transmitted to the VCR. The multiplexed MONY and MONC are recorded in the video RAMs 40 and 42 by various control signals (Address CS1) output from the monitor control unit 38, and then read and Y / C mixed through the video encoder 44. It is input to the unit 46. The MONY and the MONC are then mixed in the Y / C mixing unit 46 and then transmitted to the monitor MON.

Meanwhile, the video signal output from the video switching unit 10 through the MOT channel is digitally converted by the A / D converter 30 and then recorded in the line memory 32. At this time, the CPU 12 searches for data recorded in the line memory 32 in units of one field and checks whether there is a change in the line data. If the data has changed, the CPU 12 controls the video switching unit 10 to record the video signal input through the corresponding channel once more. The CPU 12 controls the video switching unit 10 with an adjustment signal to selectively output 16 camera output image signals, and searches for data recorded in the line memory 32 to determine motion information. The CPU 12 transmits the address and data according to the current mode of the CCTV system to the CPU I / F (InterFace) 34. The CPU I / F 34 decodes the current mode (Normal, TLV, NTSC, PAL, screen magnification, screen reduction) information of the CCTV system input from the CPU 12 to record the control unit 36 and the monitor control unit 38. Send to. The recording control unit 36 outputs various control signals RSTW and RSTR CS necessary for recording to control the covered memories 22 and 24, and the monitor control unit 38 controls for screen reduction and screen enlargement, and the like. Control video rams 40,42.

Hereinafter, the operation of the CCTV system according to an embodiment of the present invention will be described with reference to FIG. 3 showing the detailed configuration of the recording control unit 36 and the monitor control unit 38.

Referring to FIG. 3, the recording controller 36 according to an exemplary embodiment of the present invention includes a recording section setting unit 50, a memory lead section setting unit 52, a pipo memory controller 54, and a channel switching controller 56. It is composed. The recording section setting unit 50 stores the stored memory 22 according to the modes (NTSC, PAL, Normal, TLV) input from the CPU I / F 36 on the basis of CLK, HS, and VS of the recording channel. An effective period to be recorded in 24) is set and output to the pipo memory controller 54. The memory lead section setting unit 52 sets an effective section to be displayed on the monitor to a stable crystal clock according to NTSC and PAL modes, and the channel switching controller 56 changes channel switching according to normal and TLV modes. . In other words, since the normal VCR records one field per two fields, recording is performed in two field units. In the TLV mode, recording is performed in the falling section of the VTRTRG signal, so channel switching is performed at the rising edge of the VTRTRG signal. On the other hand, the target memory controller 54 generates various control signals input to the target memory 22, 24, such as RSTW (Read Reset) and RSTR (Read Reset). In addition, the covered memory controller 54 controls to read an area not to be written so that the writes and reads of the covered memory 22 and 24 do not overlap. That is, when the channel switching is a normal VCR at the time of writing, it occurs every two fields so that only one field is written to the target memory 22 and 24 in a stable period included therein, and the TLV mode is controlled to be written in the input order. In the end, the picture recorded on the VCR is the same field recorded for two fields. On the other hand, the channel switching is performed every two fields and only one field is written to the pipo memory 22 and 24 because the synchronization between the clock to be switched and the input signal is not synchronized. Therefore, since at least one field is stabilized in the two fields, the channel switching section is longer than the section written into the target memories 22 and 24.

On the other hand, the monitor control section 38 is composed of a write timing generation section 60, a read timing generation section 62, an address generation section 64, and a memory control section 66. The write timing generator 60 sets an effective section based on CLK, HS, and VS of the channel to be displayed on the monitor and provides timing according to various modes generated by the CPU I / F 36. Particularly in playback mode, one field is stored in the video RAM 40, 42 as it is input, and two fields are displayed in the full screen of the live mode (the mode displaying the current camera output). Stores one field in video RAM (40, 42). This is because image quality is usually given priority at full screen, and fast channel switching is given priority at picture reduction mode. The read timing generator 62 sets an effective period to be displayed by the stable crystal clock. That is, in the playback mode, the channel switching is kept constant so that the input can be recorded in the video RAM 40 and 42 as it is. In the live mode, the channel switching is the same as the playback mode on the full screen, but the channel is switched every two fields in the zoom mode. Do it. The address generator 64 writes a write row address, a write column address, a read row address, and a read column address based on a valid section to be written and a section to be displayed on the monitor. After generating (Read Column Address), it is multiplexed and transmitted to the video RAM (40, 42). The memory controller 66 selectively outputs a plurality of channels to the monitor by outputting RAS, CAS, serial clock (SC), data transfer (DT), and write enable bar (WEB) signals that control the video RAM 40 and 42. Can be displayed as

As described above, the present invention has the advantage of recording a plurality of independent channels at high speed and monitoring them in a surveillance network system such as a closed loop television system.

Claims (3)

In a closed circuit television system having one display device for displaying a plurality of camera outputs and one recording device for recording any camera output of the plurality of camera outputs, A video switching unit for selectively outputting the plurality of camera outputs according to an input switching control signal; A monitor control unit which displays one field per two fields on the display device when displaying the input camera signals and displays the recorded signal as it is when displaying the recorded signal; A recording control unit which performs channel switching every two fields in the normal VCR mode to record one field per two fields and performs channel switching at a predetermined edge of the trigger signal in the time-lapse VCR mode to record the input signal as it is; A line memory for storing data inputted from an allocated channel for determining movement of a predetermined camera output signal; Outputs a switching control signal to sequentially select and output the plurality of camera outputs and determines whether data stored in the line memory is changed in units of one field to control recording of a moving channel once more when data changes. Closed loop television system comprising a control unit. The recording apparatus of claim 1, wherein the recording controller; A recording section setting unit for setting an effective section to be recorded in the first memory according to a mode input based on a clock of a channel to be recorded and a horizontal and vertical synchronization signal; A read interval setting section for setting an effective section for reading data from the first memory in accordance with the mode input based on the crystal clock; A memory controller configured to generate signals for controlling the first memory according to the input mode; And a channel switching controller for generating and outputting a control signal for performing channel switching upon rising edge of trigger pulse in time-lapse VCR mode. The display apparatus of claim 2, wherein the monitor control unit; A write timing generator for setting an effective period to be recorded in a second memory according to a mode input based on a clock of a channel to be displayed on the display device and a horizontal and vertical synchronization signal; A read timing generator for setting an effective period for reading data from the second memory based on a crystal clock according to the input mode; An address generator which generates a read / write address signal based on the valid period to be written to the second memory and the valid period to be displayed on the display device, and outputs the read / write address signal to the second memory; And a memory controller which generates and outputs signals for reading / writing data into the second memory.