JPH07193181A - Manufacture of semiconductor package - Google Patents

Abstract

PURPOSE: To provide a manufacture of the semiconductor package of a lead on-chip type in which the adhering process of a semiconductor chip is improved, the cost is saved, the process is simplified and the reliability of the semiconductor package is enhanced. CONSTITUTION: This manufacturing method of the semiconductor package of a lead on-chip type, where a semiconductor chip 39 is mounted on inner leads 31 of a lead frame 30, includes a process where a polyimide coating material for wafer protection is coated to an adhesion face between the semiconductor chip 39 and the inner leads 31 and bus bars 35 of the lead frame 30, and also includes an attach process where the semiconductor chip 39 is adhered and mounted, by using the polyimide coating material applied onto the inner leads 31 and the bus bars 35 as a medium, and a process where a boding pad of the semiconductor chip 39 and the inner leads 31 are connected by wires and a package body is covered to protect the semiconductor chip 39 and the wires.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor package, and more particularly to a lead-on-chip (Le
The present invention relates to a semiconductor package manufacturing method capable of improving the reliability of the semiconductor package by improving the step of adhering the semiconductor chip in a semiconductor package in the form of ad on chip (LOC)) and reducing the cost.

[0002]

2. Description of the Related Art In general, a semiconductor package refers to a hermetically sealed container for semiconductor chips such as transistors and diode ICs.

If the surface of the semiconductor chip is contaminated with impurities such as moisture or dust, the characteristics of the semiconductor chip will deteriorate.
Place in a hermetically sealed container and seal.

Further, a semiconductor chip whose surface is stabilized like a planar type transistor which is manufactured in a flat manner cannot necessarily form a hermetic seal, and is therefore molded by an epoxy resin or the like. In this case, it is also called a semiconductor package.

The semiconductor package not only protects the surface of the semiconductor chip from external moisture and impurities, but also prevents external tensile force from being directly applied to the internal semiconductor chip and the thin leads.

Further, in a power transistor or the like, it is important to properly design the semiconductor package in order to effectively dissipate the heat generated at the junction. By the way, in a diffusion type transistor such as a mesa type or a planar type, the semiconductor chip itself is generally a collector connection.

On the other hand, these days large-scale semiconductor integrated circuits VL
Due to the pursuit of miniaturization of semiconductor packages due to the trend of lighter, thinner, shorter, and smaller electronic devices, SI has been limited to being mounted on a plastic semiconductor package having a conventional structure.

In the case of a normal semiconductor package, considering the design aspect of the lead frame and the semiconductor package according to the semiconductor chip size, the maximum chip size that can be mounted on the package has reached the limit,
Package reliability has also started to show vulnerabilities.

In the conventional lead-on-chip technology,
By using a die bonding method using a polyimide tape in which an adhesive is applied to a polyimide base film, there is a possibility that the size of a chip that can be mounted in a package can be increased. Therefore, in the lead-on-chip technology, the degree of freedom in lead frame design is increasing, and various advantages such as improvement of device characteristics can be provided.

FIG. 3 is a schematic perspective view for explaining a manufacturing process of a conventional lead-on-chip type semiconductor package. As shown in FIG. 3, the lead frame 10 having no die pad formed thereon has leads 11 formed at regular intervals, and a bus bar 15 formed to have a flat surface which is connected to and supported by each other. With.

The lead 11 is composed of an inner lead 12 and an outer lead 13, and the dam bar 1 is formed vertically between the inner and outer leads 12, 13.
Connected by four.

A polyimide tape 17 made of a heat-resistant resin having adhesives applied to both sides of a base film is attached on the lead frame 10 on the lower portions of the inner leads 12 and the bus bar 15 and then at 150 ° C. The adhesive applied to the polyimide tape 17 is melted by applying heat of about 400 ° C. and adhered.

At this time, the polyimide tape 17 is
Use a polyimide film with a trademark such as KAPTON or UPILEX. Next, after mounting a center pad type semiconductor chip 19 in which a bonding pad (not shown) is formed in the center under the inner leads 12 and the bus bar 15, heat is applied to the polyimide tape 1
Bond with 7.

Next, after connecting the bonding pad of the semiconductor chip 19 exposed by the polyimide tape 17 and the internal lead 12 with a wire (not shown), the internal lead 12, the wire and the semiconductor chip 19 are connected.
Epoxy molding compound (Epoxy compound) to protect the package body (not shown)
Molding Compound; hereinafter referred to as EMC).

Next, the dam bar 14 and the like of the lead frame 10 are removed through a subsequent process to separate each semiconductor package, and then the external leads 13 are bent and formed.

FIG. 4 is a sectional view of a lead-on-chip type semiconductor package according to the prior art after the semiconductor chips are bonded. The conventional chip mounting process of the lead-on-chip type semiconductor package will be described below with reference to FIG.

The step of mounting the chip is performed by the inner lead 1
2 and the step of joining with the polyimide tape 17 attached to the lower part of the bus bar 15, and the step of adhering the semiconductor chip 19 to the lower part of the polyimide tape 17.

In the above-mentioned series of steps, the polyimide tape 17 which is a heat-resistant resin having the adhesives 21 and 23 applied on both sides of the base film 26 is used to form the inner leads 12 of the lead frame 10 and the lower portion of the bus bar 15 and the semiconductor chip 19. To attach it to the upper part, add heat of about 150 ℃ to 400 ℃,
Adhesives 21 and 2 applied to the polyimide tape 17
This is accomplished by melting and adhering 3 together.

In the conventional method of manufacturing a lead-on-chip type semiconductor package, a new interface is formed inside the package when the polyimide tape 17 is used. Bubbles are generated due to the absorbed moisture. Due to such bubble generation, the base film 26
The adhesives 21 and 23 applied to the tape may peel off or expand, and a new form of package crack may occur from the thin package.

Further, since the polyimide tape 17 has a good hygroscopic property and contains a large amount of water, it is necessary to use a pre-baking device which is a water removing device in order to remove the absorbed water. Therefore, there is a problem of increasing the manufacturing cost.

In addition, the lead-on-chip technology uses an expensive polyimide tape 17, and therefore costs more to manufacture than an ordinary package. In addition, since the polyimide tape 17 has a high hygroscopic property, bubbles are generated due to evaporation of moisture that has already been absorbed during the die bonding process that proceeds from a high temperature, resulting in deterioration of quality and reliability. Care must be taken in the storage of.

The polyimide tape 17, which is generally used for lead-on-chip, has epoxy, NBR on the surface of the polyimide base film so as to maintain its mechanical strength.
-Adhesive such as phenol resin, polyimide, polyether amide, polyimide siloxane, etc. applied on both sides 3
It has the form of a layered structure. These adhesives have a lower glass transition temperature Tg due to moisture absorption during the package reliability test, a lower mechanical strength of the adhesive at an IR reflow temperature higher than this Tg, and an internal expansion due to a rapid expansion. Will cause the package to crack due to stress.

[0023]

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to improve the bonding process of a semiconductor chip in a lead-on-chip type semiconductor package, reduce the cost, simplify the process and improve the reliability of the semiconductor package. Another object of the present invention is to provide a method of manufacturing a package that can be made.

[0024]

To achieve the above object, the present invention provides a method for manufacturing a lead-on-chip type semiconductor package in which a semiconductor chip is mounted on an internal lead of a lead frame, and an internal lead of the lead frame, A step of applying a polyimide coating material for wafer protection to the bonding surface between the bus bar and the semiconductor chip, and an attaching step of bonding and mounting the semiconductor chip using the polyimide coating material applied on the internal leads and the bus bar as a medium. After connecting the bonding pad of the semiconductor chip and the internal lead with a wire, a step of forming a package body that covers and protects the semiconductor chip and the wire is formed.

As the polyimide coating material, it is preferable to use a polyimide coating solution having a low glass transition temperature Tg. In addition, it is preferable that the step of applying the polyimide coating material is performed by applying a polyimide coating solution with a uniform thickness by a spin coating method. The thickness of the polyimide coating solution is preferably 10 to 20 μm. In the attaching step, it is preferable that the semiconductor chip is bonded to the lead frame by applying heat to the polyimide coating material applied with a uniform thickness.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of a method for manufacturing a semiconductor package according to the present invention will be described in detail below with reference to the accompanying drawings.

1 and 2 are schematic views for explaining a manufacturing process of a lead-on-chip type semiconductor package according to the present invention.

As shown in FIG. 1, in a lead frame 30 for a lead-on-chip semiconductor package, leads 32 formed at regular intervals, and the leads 32 and dam bars 33 are connected to each other and supported. And a bus bar 35 formed in a shape that does not include a die pad.

The lead 32 is composed of an internal lead 31 connected to the semiconductor chip 39 and an external lead 34 that is bent in a subsequent process and connected to the outside.

At the boundary between the inner lead 31 and the outer lead 34, a dam bar 33 is formed so as to extend in a direction substantially orthogonal to the extending direction of these leads. The leads 32 are connected to each other by the dam bar 33. The dam bar 33 is removed in a trimming process after a molding process through a subsequent process.

The semiconductor chip 39 bonded to the inner leads 31 and the lower surface of the bus bar 35 is a center pad chip having a bonding pad 36 formed in the center of the semiconductor chip 39.

As shown in FIG. 2, which is a cross-sectional view after the semiconductor chip 39 is bonded, as shown in FIG.
A polyimide coating material 48 for protecting the wafer is interposed below the polyimide coating material 5, and the semiconductor chip 39 is bonded to the lower portion of the polyimide coating material 48.

Here, the polyimide coating material 48 for protecting the wafer has a function of protecting the surface of the wafer, has a function of bonding the lead frame and the semiconductor chip together, and uses a polyimide coating liquid having a low glass transition temperature Tg. .

Next, the steps of mounting the semiconductor chip 39 applied to the above-mentioned structure will be described in detail.

First, the lead frame 3 is applied by a coating process.
0 internal lead 31, bus bar 35 and semiconductor chip 39
A polyimide coating material 48 for wafer protection is applied to the adhesive surface of the wafer.

At this time, in the coating step, a polyimide coating material 48 for wafer protection is coated on the inner leads 31, the bus bar 35 and the semiconductor chip 39.
This can be done by forming a uniform coating film having a thickness of about 10 to 20 μm by the spin coating method.

Next, an internal lead 3 is attached by an attaching process.
1, the semiconductor chip 39 is bonded and mounted on the internal leads 31 and the bus bar 35 using the polyimide coating liquid applied on the bus bar 35 and the semiconductor chip 39 as a medium.

This adhesion is made with the polyimide coating material 4
8 by applying heat.

As described above, the lead frame 30 and the semiconductor chip 39 are directly bonded to each other by using a polyimide coating material 48 for protecting the wafer element, which has an adhesive force, without using a polyimide tape.

Next, although not shown, a package body for covering and protecting the semiconductor chip 39 and the wires is formed by a molding process.

Therefore, according to the present invention, the step of directly bonding the internal leads 31, the bus bar 35 and the semiconductor chip 39 using the polyimide coating material used as a protective coating material for the wafer element is performed. By this method, it is possible to solve the problems in the process due to the use of the polyimide tape while ensuring the non-cracking property, and it is possible to provide the semiconductor package which not only saves the manufacturing cost but also simplifies the process and improves the reliability.

However, according to the present invention, since the upper portion of the semiconductor chip 39 is directly adhered to the internal lead 31 and the bus bar 35, the thickness of the polyimide coating material 48 is properly controlled, and the internal lead 31 is adhered when the semiconductor chip 39 is adhered. Also, it is desirable to prevent damage to the circuit elements formed inside the semiconductor chip 39 by squeezing the bus bar 35. Further, it is required to secure workability in the process of applying the polyimide coating material 48 and stable etching property after the application of the polyimide coating material 48.

[0043]

As described above, according to the method of manufacturing a semiconductor package of the present invention, the existing adhesive is not used, and the polyimide coating material that simultaneously protects the wafer element and adheres the semiconductor chip is used. Therefore, it is possible to fundamentally prevent the generation of bubbles at the interface of the polyimide tape and the damage to the package due to the peeling or expansion of the adhesive, and it is possible to improve the reliability of the semiconductor package. Further, there is an advantage that the thickness of the package can be made thinner and thinner than the conventional semiconductor package.

Further, since a liquid insulating adhesive having a low hygroscopic property is used, moisture absorption is suppressed, air bubbles generated inside the semiconductor package can be basically suppressed, and damage to the package body due to air bubbles can be prevented. The reliability of the package can be improved. Further, since a separate water removing device is not required, there is an effect that manufacturing cost can be reduced.

[Brief description of drawings]

FIG. 1 is a schematic diagram for explaining a manufacturing process of a lead-on-chip type semiconductor package according to the present invention.

FIG. 2 is a cross-sectional view of the semiconductor chip shown in FIG. 1 after being bonded.

FIG. 3 is a schematic view for explaining a manufacturing process of a lead-on-chip type semiconductor package according to a conventional technique.

FIG. 4 is a cross-sectional view after the semiconductor chip shown in FIG. 3 is bonded.

[Explanation of symbols]

 30 lead frame 31 internal lead 32 lead 33 dam bar 34 external lead 35 bus bar 39 semiconductor chip 48 polyimide coating material

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Reference number within the agency FI Technical indication location H01L 23/29 23/31 (72) Inventor Pak Jin Mei Dae-dong Beauty, Gangnam-gu, Seoul, Republic of Korea Road compartment 203-508

Claims (5)

[Claims] 1. A method of manufacturing a lead-on-chip type semiconductor package in which a semiconductor chip is mounted on an inner lead of a lead frame, wherein a polyimide for wafer protection is provided on the inner lead of the lead frame and a bonding surface between the bus bar and the semiconductor chip. A step of applying a coating material, an attaching step of bonding and mounting a semiconductor chip using the polyimide coating material applied on the internal lead and the bus bar as a medium, and a bonding pad of the semiconductor chip and an internal lead with a wire. A step of forming a package body that covers and protects the semiconductor chip and the wire after connection, and a method of manufacturing a semiconductor package. 2. The method of manufacturing a semiconductor package according to claim 1, wherein the polyimide coating material is a polyimide coating liquid having a low glass transition temperature Tg. 3. The method of manufacturing a semiconductor package according to claim 1, wherein the step of applying the polyimide coating material is performed by applying a polyimide coating solution with a uniform thickness by a spin coating method. 4. The method of manufacturing a semiconductor package according to claim 3, wherein the polyimide coating solution has a thickness of 10 to 20 μm. 5. The method of manufacturing a semiconductor package according to claim 1, wherein the attaching step applies heat to the polyimide coating material applied with a uniform thickness to bond the semiconductor chip to the lead frame.