JPH07176569A - Flip chip bonder - Google Patents

Flip chip bonder

Info

Publication number
JPH07176569A
JPH07176569A JP31759493A JP31759493A JPH07176569A JP H07176569 A JPH07176569 A JP H07176569A JP 31759493 A JP31759493 A JP 31759493A JP 31759493 A JP31759493 A JP 31759493A JP H07176569 A JPH07176569 A JP H07176569A
Authority
JP
Japan
Prior art keywords
flip chip
substrate
bumps
board
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31759493A
Other languages
Japanese (ja)
Inventor
Yasuhiro Hanawa
康弘 塙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP31759493A priority Critical patent/JPH07176569A/en
Publication of JPH07176569A publication Critical patent/JPH07176569A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors

Abstract

PURPOSE:To reduce mounting defects caused by the variation of the heights of bumps formed on a flip chip by a method wherein the flip chip is mounted on a board for connection after the board is inclined with an angle so as to have the variation of the distances between the tips of the bumps and the board pads minimum. CONSTITUTION:The two-dimensional positions of all the bumps of a flip chip 1 are aligned beforehand with the two-dimensional positions of the pads of a board 2 which correspond to the bumps. The heights of all the bumps of the flip chip 1 which is attracted and held by a mounting head 4 are measured by a non-contact shape measurement unit 6 by driving an X-Y stage 7. An inclination angle calculating unit 8 calculates the optimum board inclination angle of the board 2 which makes the variation of the distances between the tips of the bumps and the board 2 minimum from the height data of all the bumps. The board 2 is inclined to have the optimum board inclination angle by a biaxial goniotable 9. Then a Z-stage 5 is made to descend and the flip chip 1 is mounted on the board 2 for connection. With this constitution, a chip having defective bumps can be detected before mounting.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はフリップチップボンダに
関し、特にフリップチップの全バンプが基板パッドに最
適に接続されるように基板を傾斜させた後にフリップチ
ップを基板に搭載するフリップチップボンダに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip chip bonder, and more particularly to a flip chip bonder for mounting a flip chip on a substrate after tilting the substrate so that all bumps of the flip chip are optimally connected to the substrate pad.

【0002】[0002]

【従来の技術】従来のフリップチップボンダ(実開昭6
2−118435)では、搭載ヘッド面または基板ステ
ージ面の傾きを自在となるような構造にしてバンプ形状
のバラツキに対応している。
2. Description of the Related Art A conventional flip chip bonder (Shokai Sho6)
2-118435) has a structure in which the mounting head surface or the substrate stage surface can be freely tilted to cope with variations in bump shape.

【0003】[0003]

【発明が解決しようとする課題】上述した従来のフリッ
プチップボンダでは、周囲のバンプと比較し極端に形状
の異なるバンプが存在する場合、そのバンプや周囲のバ
ンプが基板パッドに接続されないという欠点があった。
In the conventional flip chip bonder described above, when there is a bump having a shape extremely different from that of the surrounding bumps, there is a drawback that the bump or the surrounding bumps are not connected to the substrate pad. there were.

【0004】[0004]

【課題を解決するための手段】本発明はフリップチップ
を基板へ加圧搭載するフリップチップボンダにおいて、
前記基板を固定する基板ステージと、前記フリップチッ
プを吸着把持する搭載ヘッドと、前記搭載ベッドを前記
基板の真上から下降させ前記フリップチップを前記基板
に加圧するZステージと、前記フリップチップに形成さ
れた全バンプの高さを測定する非接触形状測定部と、前
記フリップチップの全バンプの高さデータより全バンプ
が均一に前記基板に接続するような最適基板傾斜角を計
算する傾斜角計算部と、前記基板ステージの下部に設置
され前記傾斜角計算部で計算された前記最適基板傾斜角
に前記基板を傾ける二軸ゴニオステージとを備えてい
る。
The present invention provides a flip chip bonder for mounting a flip chip on a substrate under pressure,
A substrate stage that fixes the substrate, a mounting head that sucks and holds the flip chip, a Z stage that lowers the mounting bed from directly above the substrate and presses the flip chip onto the substrate, and a flip chip formed on the flip chip The non-contact shape measuring unit for measuring the height of all the bumps, and the tilt angle calculation for calculating the optimum substrate tilt angle such that all the bumps are uniformly connected to the substrate from the height data of all the bumps of the flip chip. And a biaxial goniometer stage which is installed below the substrate stage and tilts the substrate to the optimum substrate tilt angle calculated by the tilt angle calculation unit.

【0005】[0005]

【実施例】次に、本発明の実施例について、図面を参照
して詳細に説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0006】図1は本発明の一実施例を示す構成図であ
る。
FIG. 1 is a block diagram showing an embodiment of the present invention.

【0007】図1に示すフリップチップボンダは、フリ
ップチップ1と、フリップチップ1を搭載接続する基板
2と、基板2を固定する基板ステージ3と、フリップチ
ップ1を吸着把持する搭載ヘッド4と、搭載ヘッド4を
基板の真上から下降させフリップチップ1を基板2に加
圧するZステージ5と、フリップチップ1に形成された
バンプの高さを測定する非接触形状測定部6と、全バン
プの高さを測定するため非接触形状測定部6を移動させ
るXYステージ7と、全バンプの高さデータより全バン
プが均一に基板2に接続するような最適基板傾斜角を計
算する傾斜角計算部8と、基板ステージ3の下部に設置
され傾斜角計算部8で計算された最適基板傾斜角に基板
2を傾ける二軸ゴニオステージ9とで構成される。
The flip chip bonder shown in FIG. 1 includes a flip chip 1, a substrate 2 for mounting and connecting the flip chip 1, a substrate stage 3 for fixing the substrate 2, and a mounting head 4 for sucking and holding the flip chip 1. The Z stage 5 that lowers the mounting head 4 from directly above the substrate to press the flip chip 1 against the substrate 2, the non-contact shape measuring unit 6 that measures the height of the bumps formed on the flip chip 1, and all the bumps. An XY stage 7 that moves the non-contact shape measuring unit 6 to measure the height, and an inclination angle calculation unit that calculates an optimum substrate inclination angle such that all the bumps are uniformly connected to the substrate 2 based on the height data of all the bumps. 8 and a biaxial goniometer stage 9 which is installed below the substrate stage 3 and tilts the substrate 2 to the optimum substrate tilt angle calculated by the tilt angle calculator 8.

【0008】本実施例のフリップチップボンダは以下の
動作を行うことにより、フリップチップ1を基板2に搭
載接続する。予めフリップチップ1の全バンプと対応す
る基板2のパッドとの平面上での位置を合わせておく。
搭載ヘッド4に吸着把持されたフリップチップ1の全バ
ンプの高さを非接触形状測定部6によりXYステージ7
を駆動させ測定する。傾斜角計算部8では全バンプの高
さデータからバンプ先端と基板2の距離のバラツキが最
小になるような基板2の最適基板傾斜角度を計算する。
バンプ高さのバラツキが大きく、また計算した最適基板
傾斜角度が大きくなる場合はそのチップの搭載を中止す
る。二軸ゴニオテーブル9は最適基板傾斜角度まで基板
2を傾け、その後Zステージ5を下降させフリップチッ
プ1を基板2に搭載接続する。
The flip chip bonder of this embodiment mounts and connects the flip chip 1 on the substrate 2 by performing the following operations. The positions of all the bumps of the flip chip 1 and the corresponding pads of the substrate 2 on the plane are previously aligned.
The height of all the bumps of the flip chip 1 sucked and held by the mounting head 4 is measured by the non-contact shape measuring unit 6 on the XY stage 7.
Drive and measure. The inclination angle calculator 8 calculates the optimum substrate inclination angle of the substrate 2 from the height data of all the bumps so that the variation in the distance between the tip of the bump and the substrate 2 is minimized.
If the variation in bump height is large and the calculated optimum substrate inclination angle is large, mounting of the chip is stopped. The biaxial goniometer table 9 tilts the substrate 2 to the optimum substrate tilt angle, then lowers the Z stage 5 to mount and connect the flip chip 1 to the substrate 2.

【0009】[0009]

【発明の効果】本発明のフリップチップボンダは、バン
プ先端と基板パッドの距離のバラツキが最小になるよう
な角度に基板を傾けてからフリップチップを基板に搭載
接続させるため、接続の信頼性を向上させるという効果
がある。またバンプ不良チップは搭載前に検出されるた
め歩留まりの向上という効果もある。
According to the flip chip bonder of the present invention, the flip chip is mounted on and connected to the board after the board is tilted at such an angle that the distance between the bump tip and the board pad is minimized. There is an effect of improving. In addition, defective bump chips are detected before mounting, which also has the effect of improving yield.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す構成図である。FIG. 1 is a configuration diagram showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 フリップチップ 2 基板 3 基板ステージ 4 搭載ヘッド 5 Zステージ 6 非接触形状測定部 7 XYステージ 8 傾斜角計算部 9 二軸ゴニオステージ 1 Flip chip 2 Substrate 3 Substrate stage 4 Mounting head 5 Z stage 6 Non-contact shape measuring unit 7 XY stage 8 Tilt angle calculation unit 9 Biaxial goniometer stage

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 フリップチップを基板へ加圧搭載するフ
リップチップボンダにおいて、前記基板を固定する基板
ステージと、前記フリップチップを吸着把持する搭載ヘ
ッドと、前記搭載ベッドを前記基板の真上から下降させ
前記フリップチップを前記基板に加圧するZステージ
と、前記フリップチップに形成された全バンプの高さを
測定する非接触形状測定部と、前記フリップチップの全
バンプの高さデータより全バンプが均一に前記基板に接
続するような最適基板傾斜角を計算する傾斜角計算部
と、前記基板ステージの下部に設置され前記傾斜角計算
部で計算された前記最適基板傾斜角に前記基板を傾ける
二軸ゴニオステージとを含むことを特徴とするフリップ
チップボンダ。
1. In a flip chip bonder for mounting a flip chip on a substrate under pressure, a substrate stage for fixing the substrate, a mounting head for sucking and gripping the flip chip, and a mounting bed descending from directly above the substrate. The Z stage for pressing the flip chip onto the substrate, the non-contact shape measuring unit for measuring the height of all bumps formed on the flip chip, and the height data of all bumps of the flip chip show that all bumps are A tilt angle calculation unit that calculates an optimum substrate tilt angle for uniformly connecting to the substrate, and a tilt angle calculation unit that is installed under the substrate stage and tilts the substrate to the optimum substrate tilt angle calculated by the tilt angle calculation unit. A flip chip bonder including an axial goniometer stage.
JP31759493A 1993-12-17 1993-12-17 Flip chip bonder Pending JPH07176569A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31759493A JPH07176569A (en) 1993-12-17 1993-12-17 Flip chip bonder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31759493A JPH07176569A (en) 1993-12-17 1993-12-17 Flip chip bonder

Publications (1)

Publication Number Publication Date
JPH07176569A true JPH07176569A (en) 1995-07-14

Family

ID=18089966

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31759493A Pending JPH07176569A (en) 1993-12-17 1993-12-17 Flip chip bonder

Country Status (1)

Country Link
JP (1) JPH07176569A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010232277A (en) * 2009-03-26 2010-10-14 Nec Personal Products Co Ltd Printed wiring board repairing device and printed wiring board repairing method
US20170062378A1 (en) * 2015-08-31 2017-03-02 Kulicke And Soffa Industries, Inc. Bonding machines for bonding semiconductor elements, methods of operating bonding machines, and techniques for improving uph on such bonding machines

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61140887A (en) * 1984-12-14 1986-06-27 富士通株式会社 Biaxial goniostage
JPH01273326A (en) * 1988-04-25 1989-11-01 Matsushita Electric Works Ltd Manufacture of semiconductor device
JPH0494553A (en) * 1990-08-10 1992-03-26 Nippon Steel Corp Bonding device
JPH04199525A (en) * 1990-11-29 1992-07-20 Fujitsu Ltd Flip chip bonder device and alignment thereof
JPH05315399A (en) * 1992-05-06 1993-11-26 Sumitomo Electric Ind Ltd Package method and package device of semiconductor chip

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61140887A (en) * 1984-12-14 1986-06-27 富士通株式会社 Biaxial goniostage
JPH01273326A (en) * 1988-04-25 1989-11-01 Matsushita Electric Works Ltd Manufacture of semiconductor device
JPH0494553A (en) * 1990-08-10 1992-03-26 Nippon Steel Corp Bonding device
JPH04199525A (en) * 1990-11-29 1992-07-20 Fujitsu Ltd Flip chip bonder device and alignment thereof
JPH05315399A (en) * 1992-05-06 1993-11-26 Sumitomo Electric Ind Ltd Package method and package device of semiconductor chip

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010232277A (en) * 2009-03-26 2010-10-14 Nec Personal Products Co Ltd Printed wiring board repairing device and printed wiring board repairing method
US20170062378A1 (en) * 2015-08-31 2017-03-02 Kulicke And Soffa Industries, Inc. Bonding machines for bonding semiconductor elements, methods of operating bonding machines, and techniques for improving uph on such bonding machines
US9929121B2 (en) * 2015-08-31 2018-03-27 Kulicke And Soffa Industries, Inc. Bonding machines for bonding semiconductor elements, methods of operating bonding machines, and techniques for improving UPH on such bonding machines
US10468373B2 (en) 2015-08-31 2019-11-05 Kulicke and Sofia Industries, Inc. Bonding machines for bonding semiconductor elements, methods of operating bonding machines, and techniques for improving UPH on such bonding machines
TWI695449B (en) * 2015-08-31 2020-06-01 美商庫利克和索夫工業公司 Bonding machines for bonding semiconductor elements, methods of operating bonding machines, and techniques for improving uph on such bonding machines

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Legal Events

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Effective date: 19970114