JPH07170735A - Switching power supply device - Google Patents

Abstract

PURPOSE:To increase the switching speed of a power conversion transformer further. CONSTITUTION:In a switching power supply device, an output from a PWM oscillator circuit IC2 is input to a signal transmission transformer T1, and the secondary output of the signal transmission transformer T1 is amplified by transistors TR2, TR3, input to a power semiconductor element TR4 composed of a MOS-FET switching an input to a power conversion transformer T2 and output from the secondary of the power conversion transformer T2. Accordingly, a winding short-circuit element TR1 constituted of a Pch-FET is connected to the secondary winding of the signal transmission transformer T1 and a circuit amplifying power by the transistors TR2, TR3, and the secondary side winding of the signal transmission transformer T1 is brought to a short-circuit state by the input signal state of a PWM driving signal to the signal transmission transformer T1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply device used in various electronic devices, and more particularly to high speed driving of a switching circuit element on the primary side of a power conversion transformer.

[0002]

2. Description of the Related Art In recent years, in power supply devices for various electronic devices, in order to improve power conversion efficiency and reduce the size of the device, AC input power is rectified into DC power, and based on the DC power. A so-called switching power supply device is widely used, which is intermittently converted using a power semiconductor element or the like to convert it into high frequency power, transfer the power with a small power conversion transformer, and take out a DC output.

In order to improve the power conversion efficiency,
A PWM power control method in which a control signal is given to a power semiconductor element as a duty ratio (hereinafter, referred to as PWM) signal has become common.

In such a power supply device, the electric potentials of the control signal generator and the electric power controller are often significantly different, and it is necessary to electrically insulate them. As a technique therefor, a method of performing signal transfer by a photocoupler which is an optical insulating means is also used, but the phototransistor portion of the photocoupler is difficult to respond at high speed, and the normal signal transfer rate is about 10 KHz. However, in order to improve the accuracy, size, and noise of the power control device,
The higher the PWM signal transfer rate, the better it becomes. Therefore, the signal transfer rate of the photocoupler has become insufficient.

[0005]

Therefore, as a signal transmission means, as shown in the circuit diagram of the conventional switching power supply device of FIG. 6, a circuit in which an insulating transformer T1 is inserted between a control circuit and a power control circuit is devised. Has been done.

In this circuit, since a signal transmission transformer is used for insulation between the primary circuit and the secondary circuit, a magnetic material of the transformer having a small loss in a high frequency region is used, and the winding structure and the number of turns are devised. By doing so, it becomes possible to obtain the required high-frequency signal transfer characteristic.

As described above, by using the insulating transformer for PWM signal transfer, a high speed PWM signal transfer circuit can be realized relatively easily.

However, when the PWM signal is not transferred, the transistor of TR5 is cut off, so that the transformer T1 becomes in a high impedance state.
The bias of the transistors of R2 and TR3 becomes unstable, and the MOS-FET (Metal Oxide Semiconductor) of TR4 becomes unstable.
There were drawbacks such as malfunction of Field Effect Transistor).

Further, even when the PWM signal is being transferred, since the drive impedance is high and the accumulated charges in the transistors of TR2 and TR3 cannot be completely discharged, the switching speed is low and the switching frequency must be lowered. There was also.

The present invention has been made to solve the above-mentioned problems of the prior art, and an object thereof is to provide a switching power supply device in which the switching speed on the primary side of a power conversion transformer is further increased. Is.

[0011]

Therefore, in the switching power supply device according to the present invention, the duty ratio signal is input to the power semiconductor element provided with the signal transmission transformer and the power conversion transformer on the primary side of the power conversion transformer. A switching power supply device for controlling an output from a secondary side of a power conversion transformer, comprising a duty ratio signal oscillation control circuit for inputting a duty ratio drive signal to a primary side winding of the signal transmission transformer, and a signal transmission. A power semiconductor drive circuit having a power amplifier circuit that inputs from a secondary winding of a transformer and outputs a duty ratio signal to a control terminal of the power semiconductor element, a secondary winding of the signal transmission transformer, and the power amplifier circuit. And a control means for controlling the operation of the power amplifier circuit and the power semiconductor element, which are connected to the power supply circuit. .

[0012]

With the above structure, when the drive level input of the duty ratio drive signal is not input to the signal transmission transformer, the output side of the signal transmission transformer is short-circuited by the control means, whereby the power semiconductor drive circuit and the power semiconductor element are provided. It is possible to prevent the occurrence of erroneous operation, and it is possible to drive and output the power conversion transformer at a higher speed than before.

[0013]

EXAMPLES A switching power supply device according to the present invention will be described below with reference to examples.

(First Embodiment) FIG. 1 is a circuit diagram showing a first embodiment of the present invention. A circuit diagram of an embodiment described later (Fig.
The same reference numerals shown in FIG. 5) indicate the same components.

In FIG. 1, T1 is an insulating transformer for transmitting a PWM signal, and TR1 is a junction type FET for short-circuiting the winding of the transformer. D1 is a counter electromotive voltage clamping diode of the signal transfer transformer T1, and R1 is a damping resistor that absorbs the counter electromotive force of the signal transfer transformer T1. TR2 and TR3 are transistors for driving the MOS-FET of TR4, and the drive waveform causes TR4 to perform power switching, and the power is applied to T2.

T2 is an insulating transformer for converting electric power,
The output is rectified by the diodes D3 and D4, and a direct current output is obtained by the filter by the choke coil CH1 and the capacitor C3.

C2 is an electrolytic capacitor for absorbing power supply ripple. R5 and R6 are voltage divider resistors connected to the output terminals, and the midpoint of the resistors is connected to the detection terminal of the output voltage detection feedback element IC1 and is indicated by P2 shown in IC2.
A detection voltage is applied to the WM oscillation control circuit.

The IC2 has a sawtooth wave generating circuit to generate a pulse corresponding to the feedback voltage, and its output is connected to the base of the transistor of TR5. The collector of the transistor TR5 is connected to the primary winding of the signal transmission transformer T1 and transfers the drive waveform to the main switching element TR4.

Next, the operation will be described.

When each input voltage is applied to the DC130V input terminal and the auxiliary power input terminal, the PWM oscillation control circuit IC2
Is operated, a PWM waveform is applied to the base of the transistor of TR5, the transistor TR5 switches, and the current flowing in the primary winding of the signal transmission transformer T1 is turned ON / OFF.
Then, a voltage is generated in the secondary winding of the transformer T1.

The voltage generated in the secondary winding of the transformer T1 is applied to the base of the transistor TR2 via the resistor R1. Further, since the input voltage accumulates charges in the capacitor C1 via the resistor R2, a voltage sufficient for operating the transistors TR2 and TR3 is generated across the capacitor C1.
A specified pulse width is applied to the gate of the MOS transistor, the MOS-FET is turned on and off, and a chopping current flows in the primary winding of the converter transformer of T2 for converting power. This makes 2
Chopping voltage is generated at both ends of the next winding and D3 and D
It is rectified by the diode of No. 4 and smoothed by the LC filter of the choke coil CH1 and the capacitor C3 to become a DC voltage, and a voltage is generated between the output terminals.

The voltage generated here is input to the voltage detection element of IC1 from the voltage dividing circuit of resistors R5 and R6, and the error signal is fed back to IC2 of the PWM oscillation control circuit, and the pulse width is narrowed when the output voltage is high. However, when the output voltage is low, the pulse width is controlled to be widened to stabilize the output voltage.

In the second primary winding of the transformer T2, a voltage corresponding to the winding ratio with the first primary winding of the transformer T2 is generated,
The voltage is rectified by the diode D2 and the capacitor C
It is charged to 1 and supplied as the operating voltage of the transistors TR2 and TR3.

When the PWM signal has a high potential, the transistor TR5 is turned on, a voltage is applied to the primary winding of the signal transmission transformer T1, and a voltage is generated in the secondary winding of the transformer T1. This voltage raises the gate voltage of the Pch-FET TR1 to a positive potential through the resistor R1, and TR1 is reverse biased. The junction FET TR1 is in a high impedance state, and the current passing through the resistor R1 is the transistor T1.
It flows into the base of R2.

Since the base current flows into the transistor TR2 from the transformer T1, the transistor TR2 is raised until the emitter voltage of the transistor TR2 becomes substantially equal to the secondary winding generation voltage of the transformer T1, and the voltage is TR through the resistor R3.
Raise the gate voltage of MOS-FET of 4 and MO of TR4
The S-FET is turned on and a drain current flows.

When the PWM signal has a low potential, the base current of the transistor TR5 disappears, TR5 is turned off, the current in the primary winding of the transformer T1 is cut off, and the secondary winding of the transformer T1 is inverted from the positive potential to reverse. Directional electric potential is generated. This potential turns on the diode D1 to turn on the resistor R1.
A regenerative current flows via. The current flowing at this time fixes the potential of the resistor R1 to a negative potential, the gate potential of TR1 also becomes a negative potential, the Pch-FET TR1 is turned on, and the base potentials of the transistors TR2 and TR3 are forced to the ground potential.

Therefore, the transistor TR3 absorbs the electric charge charged in the gate of the transistor TR4 to the emitter through the resistor R3 and rapidly discharges the gate-drain voltage of the MOS-FET of TR4 to turn off TR4 and cut off the drain current. To do.

The output power control is performed by repeating the above operation to turn on and off the TR4 of the MOS-FET which is the main switching element.

In the power supply device of the above embodiment, when the output is to be stopped by an external control signal or the like, the power switching TR4 of the main switch element is stopped by stopping the PWM signal.

Next, the operation and effect of this embodiment will be described.

In the conventional example as shown in FIG. 6, after the switching operation of the transistor TR5 is stopped,
A counter electromotive voltage is generated by the exciting current of the transformer T1, the diode D1 is turned on, and the exciting current of the transformer T1 is discharged via the diode D1.

Therefore, on the secondary winding side of the transformer T1,
Reverse bias is applied to the transistors TR2 and TR3 by the counter electromotive voltage while the exciting current of the diode D1 continues to flow. Then, the exciting current continues to be discharged, and when the exciting current finally disappears, there is no potential difference between the terminals of each winding, and the signal transfer transformer T1 becomes an impedance of the inductance of the transformer itself, and both the primary and secondary windings become very High impedance state.

In this phenomenon, the better the characteristics of the signal transmission transformer T1, the more remarkable the increase in impedance when there is no signal. Therefore, the base terminals of the transistors of TR2 and TR3 connected to the secondary winding of the transformer T1 are in a floating state and are easily susceptible to external induction. In a switching power supply device or the like, when the primary side switch voltage reaches several hundreds V and its potential is induced to the base circuits of the transistors TR2 and TR3 in the floating state, noise voltage is generated at the emitters of the transistors TR2 and TR3.

Due to the noise voltage, the TR-MOS-F
The gate of ET is driven, TR4 malfunctions, and the phenomenon that the drain voltage of TR4 vibrates due to noise occurs. The oscillation of the drain voltage of the power switch element of TR4 causes noise, which is also induced in the base circuit of the transistors TR2 and TR3 in the high impedance state. Such a noise induction loop is completed, and the conventional device has a problem that the circuit abnormally oscillates due to the noise loop and the circuit operation does not stop even though the PWM signal is stopped by the external control input.

However, in the embodiment of the present invention, FIG.
As shown in, the source of the Pch-FET of TR1 is connected to the base circuit of the transistors TR2 and TR3 via the resistor R7, the drain of TR1 is grounded, and the gate is resistor R1.
With the configuration connected to, when the gate of the Pch-FET of TR1 is reverse biased with respect to the signal of the positive potential when the transformer T1 is in the operating state, the drain of the FET of TR1-
A high impedance state is established between the sources with respect to the transformer T1 and the resistor R1, and the signal generated in the secondary winding of the transformer T1 is transmitted to the bases of the transistors TR2 and TR3.

When the drive signal of the transistor T1 is low potential, the FET gate potential of TR1 becomes zero bias, the drain-source of TR1 becomes low resistance state, and the base potentials of the transformer T2 and the transistor TR3 are almost grounded. The potential is set so that the transistor TR3 absorbs current and discharges the electric charge charged in TR4.

When the PWM signal is no longer supplied to the transformer T1 due to the oscillation stop signal from the outside, the transformer T
Since the voltage between the secondary winding of No. 1 is not generated, P of TR1
The gate potential of the ch-FET becomes zero bias and T
A low impedance state is established between the drain and source of R1, and TR2 and TR that are drive transistors of TR4
The base circuit of 3 can be grounded with low impedance.

The ground impedance of the base circuit in the zero bias of the FET of TR1 is very low with respect to the impedance of the secondary winding when the PWM input of the transformer T1 is stopped, and a phenomenon such as noise injection from the outside in the operation stopped state. Is generated, the potentials of the base circuits of the transistors TR2 and TR3 hardly change, so that the gate potential of TR4 is also fixed to the ground potential, and the MOS-F of TR4 is fixed.
Since the gate potential of ET does not change, it is possible to prevent malfunction.

(Second Embodiment) FIG. 2 is a circuit diagram of a second embodiment of the present invention.

In the first embodiment shown in FIG. 1, when the PWM signal rises, the FET of TR1 is not completely reverse-biased and the signal transmission transformers T1 to T are turned on until the potential becomes stable.
A current flows in the FET of R1, which causes an increase in power loss of the PWM drive transistor TR5 and an increase in transformer capacity of T1.

Therefore, in the second embodiment, Pch of TR1
-By taking the gate signal of the FET from the front side of the resistor R1, the signal applied to the gate of the FET of TR1 can be applied earlier than the source side, and at the same time the potential of the PWM signal switches, the conduction state of the FET changes. The current from the resistor R1 is directly applied to the base circuits of the transistors TR2 and TR3.

At the moment of switching from the high potential to the low potential, since the gate of TR1 is forward biased first, the base currents of the transistors TR2 and TR3 are being drawn out via the resistor R1. Transistor TR is used to pull the base current directly from the source at high speed.
It becomes possible to shorten the switching time between 2 and TR3 as compared with the first embodiment.

By connecting as described above, the PWM drive signal from TR5 is efficiently supplied to the transistors TR2 and TR.
3 and the power loss of the transistor TR5 and the transformer T1 can be reduced.

(Third Embodiment) FIG. 3 is a circuit diagram of a third embodiment in which the driving frequency is increased.

The voltage of the base circuit can quickly follow the PWM drive signal from the transistor TR5 by adding the FET TR1. However, the transistors TR2 and TR3 are bipolar transistors and the base current storage time is long. As a result, the output voltage switching speed is reduced.

Therefore, in this embodiment, by adding diodes D6 and D7 as shown in FIG.
2 is unsaturatedly driven to shorten the accumulation time, and the transistor TR3 is also configured to match the speed of the transistor TR2 by unsaturated driving by adding the diode 5.

At the moment when the switching speed is increased and the bipolar transistor as a device is switched from the high potential to the low potential, the gate of the transistor TR1 is forward biased before the base potential of the transistor TR2 and passes through the resistor R1. Therefore, the base current of the transistor TR3 does not pass through the resistor R1, but the base current flows directly from the source of the FET TR1.
R3 switching time can be shortened, and TR4 MOS-
The gate drive waveform of the FET can be speeded up.

(Fourth Embodiment) FIG. 4 is a circuit diagram of a fourth embodiment of the present invention.

In the third embodiment shown in FIG. 3, since the speed-up circuit by the FET TR1 is added to the transistor TR3 side, the signal generated in the secondary winding of the transformer T1 switches from the high potential to the low potential. At the moment, there is a concern that the transistor TR3 is turned on earlier than the transistor TR2 is turned off by the operation of TR1 and the accumulated charge of the transistor TR2 cannot be completely discharged, and a through current may flow from the transistor TR2 to the transistor TR3. To eliminate this, a diode D8 is added to the base circuit of the transistor TR2, and when the output potential of the transformer T1 drops, the accumulated charge is extracted from the base of the transistor TR2 to the transformer T1 side via the resistor R1. , The transistor TR3 is turned on and the transistor TR is turned on.
2 is turned off at high speed so that a through current does not flow, TR
The power loss does not increase even if the drive frequency of the MOS-FET of No. 4 is increased.

(Fifth Embodiment) FIG. 5 is a circuit diagram of a fifth embodiment of the present invention.

In the present embodiment, the element of the transistor TR1 is not limited to the Pch-FET element, but a Pch-MOS-FET having a voltage drive type and a depletion + enhancement type (normally on type) element is also available.
Is adopted, and the operation is similar to that of the J-FET.

By using a MOS-FET for TR1, it is possible to prevent the forward current from flowing out of the gate during the forward bias of TR1, reduce the driving power of the transistor TR5 and the transformer T1, and reduce the transistor power of the T1 transformer and TR5. Can be miniaturized.

[0053]

As described above, according to the present invention,
By providing a control circuit for short-circuiting the winding by the FET between the secondary side winding of the PWM signal transmission transformer and the drive circuit of the power semiconductor element, the transformer can be connected in the state of the input signal.
Since the secondary winding can be automatically brought into a short-circuited state or a short-circuited opened state at a high speed, the switching speed of the circuit for driving the power semiconductor element can be increased.

Further, when the PWM signal is stopped, the secondary winding of the signal transmission transformer can be automatically short-circuited. Therefore, even when a noise signal is injected from the outside, power is not supplied. There is an effect that a semiconductor device can be prevented from malfunctioning and a stable power supply circuit can be configured.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a second embodiment.

FIG. 3 is a circuit diagram of a third embodiment.

FIG. 4 is a circuit diagram of a fourth embodiment.

FIG. 5 is a circuit diagram of a fifth embodiment.

FIG. 6 is a circuit diagram of a conventional switching power supply device.

[Explanation of symbols]

C1 Bypass capacitor C2 Smoothing capacitor C3 Smoothing capacitor D1 Reverse bias diode D2 Rectifying diode D3, D4 Output voltage rectifying diode D5-D8 Speed-up diode CH1 Voltage smoothing choke coil IC1 Output voltage detecting element IC2 PWM oscillation control circuit R1 Drive stage drive resistance R2 Starting resistance R3 Driving resistance R4 to R6 Voltage detection resistance R7 Current limiting resistance T1 Signal transmission insulation transformer T2 Power conversion insulation transformer TR1 Winding short-circuit element (Pch J-FET, MOS-)
FET) TR2 drive transistor TR3 drive transistor TR4 Power switching MOS-FET TR5 PWM drive signal switching transistor

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H03K 17/687

Claims (2)

[Claims] 1. A switching method for controlling an output from a secondary side of a power conversion transformer by inputting a duty ratio signal to a power semiconductor element provided on a primary side of the power conversion transformer, which includes a signal transmission transformer and a power conversion transformer. A power supply device, comprising a duty ratio signal oscillation control circuit for inputting a duty ratio drive signal to a primary winding of the signal transmission transformer, and controlling the power semiconductor device by inputting from a secondary winding of the signal transmission transformer. A power semiconductor drive circuit having a power amplification circuit that outputs a duty ratio signal to a terminal, and a secondary winding of the signal transmission transformer and the power amplification circuit, which are connected to control the operation of the power amplification circuit and the power semiconductor element. A switching power supply device comprising: a control unit. 2. The control means for controlling the operation of the power amplification circuit and the power semiconductor element is constituted by a field effect transistor, and is configured by an input signal state of a duty ratio drive signal to a primary side winding of the signal transmission transformer. 2. The switching power supply device according to claim 1, wherein the secondary winding of the signal transmission transformer is short-circuited or the control circuit is opened.