JPH07163157A - Inverter circuit - Google Patents

Abstract

PURPOSE:To prevent the spike current from being generated every time when the oscillation is started in an inverter where the oscillation is repeated every half cycle of AC input voltage. CONSTITUTION:An AC voltage V is rectified through a full-wave rectifier circuit 14 and applied to a constant voltage circuit 24. Immediately before the output voltage from the constant voltage circuit 24 drops below the gate bias of FETs 16, 17, a diode 41 is turned ON and the gate voltage of the FETs 16, 17 drop depending on the output voltage from a rectifier circuit 15. Consequently, the gate voltage drops below the drain voltage of the FETs 16, 17 at all times to cause no instable oscillation and no spike current is generated when the oscillation is started in next half cycle.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used for lighting a discharge lamp, for example, and uses a FET or an IGBT (insulated gate bipolar transistor) as a switching element to convert a DC power into an AC power. Regarding the inverter circuit.

[0002]

2. Description of the Related Art FIG. 4 shows an inverter circuit of this type proposed. The middle point of the primary winding 12 of the transformer 11 is connected to one output end 15 of the rectifying circuit 14 through the choke coil 13, and both ends of the primary winding 12 are connected to the other end of the rectifying circuit 14 through switching elements such as FETs 16 and 17. Is connected to the output terminal 18. A resonance capacitor 19 is connected between both ends of the primary winding 12, and both ends of a feedback winding 21 of the transformer 11 are connected to control electrodes, that is, gates of the FETs 16 and 17, respectively.

One end of the choke coil 13, 1 in this example
The end on the side of the next winding 12 is connected to the constant voltage circuit 24 through the diode 22 and the resistor 23.
A series circuit of resistors 25 and 26 at both ends of 4 and resistor 2
7 and 28 are connected in series, the connection point of the resistors 25 and 26 is connected to the gate of the FET 16, and the resistor 27,
The connection point of 28 is connected to the gate of the FET 17. The constant voltage circuit 24 is, for example, the diode 22 of the resistor 23.
A capacitor 29 is connected between the end on the opposite side to the output end 18 of the rectifier circuit 14, and the capacitor 29 and the resistor 23 are connected.
One end of the resistor 31 is connected to the connection point of
A Zener diode 32 is connected between the other end of 1 and the output end 18 of the rectifier circuit 14, and a capacitor 33 is connected to both ends of the Zener diode 32 as necessary.
The voltage across the Zener diode 32 is the constant voltage circuit 2
4 output voltage. Further, in this example, a full-wave rectifier circuit is used as the rectifier circuit 14.

A commercial power supply 34 is connected to the input side of the full-wave rectification circuit 14.
5A is connected to the rectifier circuit 14, and an AC voltage as shown in FIG. 5A is applied to the rectifier circuit 14.
A full-wave rectified output as shown in FIG. 5B is obtained between 5 and 18. This rectified output is the choke coil 13 and the diode 2.
When the appropriate bias voltage is applied to the FETs 16 and 17 by the output of the constant voltage circuit 24 via the output of the constant voltage circuit 24, the variation in the threshold voltage between the gate and source of the FETs 16 and 17 causes The FET with the smaller threshold voltage is turned on first. For example, if the FET 16 is turned on, a current flows from the rectifier circuit 14 through the choke coil 13, the primary winding 12, and the FET 16, and at the same time, a resonant current flows through the resonant circuit of the primary winding 12 and the resonance capacitor 19. When the voltage based on the resonance current is positively fed back to the feedback coil 21 of the transformer 11, the FET 16 is kept in the ON state and the FET 17 is kept in the OFF state, and the resonance current is inverted, the gate voltage of the FET 16 becomes the threshold voltage. When the voltage is below the value voltage, the FET 16 is turned off, and the gate voltage of the FET 17 is above its threshold voltage and turned on, the FET
A resonance current flows due to the current flowing through 17, and the same operation is performed thereafter, so that an oscillation state occurs. This oscillation occurs every half commutation cycle as shown in FIG. 5C. A discharge tube 36 is connected to the secondary winding 35 of the transformer 11 as a load,
When the voltage of the secondary winding 35 becomes the discharge voltage of the discharge tube 36, the oscillation current flows as shown in FIG. 5D.

[0005]

As shown in FIG. 5E, the drain current characteristic of the FET with respect to the gate voltage is such that the drain current suddenly starts to flow when a certain voltage V _G1 is exceeded.
The gate biases of 16 and 17 are set near the bend angle of the drain current characteristic with respect to this gate voltage. If the gate bias is at the position of V _G1 where the gate voltage-drain current characteristic begins to bend when the power supply voltage at the time of oscillation start is unstable, both F
Even if the ETs 16 and 17 are turned on at the same time, the drain current is suppressed to a small level and no spike voltage is generated, but the bias is slightly larger than the bend angle of the gate voltage drain current characteristic, and the characteristic curve shown in FIG.
_When it is set to the point of _G2 , both FETs 1 when the power supply voltage is unstable
6, 17 are turned on at the same time, spike voltage appears,
That is, a large current appears like a spike. Although the allowable range of the desirable gate bias is only about 0.5V, the variation width of the actual gate threshold voltage of the FET is about 3V, which is quite large.
It may be set at a certain stand-up, such as _G2 .

[0006] Such instability occurs when the drain voltage is low, and therefore it suffices to eliminate such a condition, that is, the output terminal 15 of the rectifier circuit 14,
If the capacitance of the capacitor 37 connected between 18 is increased, the state becomes unstable only when the power is first turned on, and the spike current may flow only once. However, if the capacity of the capacitor 37 is increased, a problem arises that the input power factor deteriorates due to the charging rush current of the capacitor. Further, since the brightness of the discharge tube 36 is controlled when the capacity of the capacitor 37 is large, even if a dimmer that controls the flow angle of the input alternating current is used, it does not work. Therefore, a capacitor having a very small capacity for removing noise is usually used as the capacitor 37. Therefore, as shown in FIG. 4C, the output of the rectifying circuit 14 is 0 point for each half wave of the input AC voltage. Near, that is, the level is below the threshold voltage of the FET, and a section where oscillation does not occur appears, oscillation is started and stopped every half cycle of the input AC voltage, and the power supply becomes unstable at the start of each oscillation. In the area, FIG. 5D
A spike current 38 may occur every half cycle as shown in FIG. When such a spike current is generated, the FET heats up, the efficiency deteriorates, and in some cases, the FET may be destroyed. Therefore, without such fear,
It is necessary to use a switching element with a large margin,
It was so expensive.

[0007]

According to the invention of claim 1, the positive side output terminal of the constant voltage circuit is connected to the middle point of the primary winding through the forward diode. According to the second aspect of the present invention, the third switching element is connected between both output terminals of the constant voltage circuit, and when the output voltage of the rectifier circuit becomes equal to or lower than a predetermined value, this is detected and the third switching element is turned on. Means are provided for turning on.

According to the third aspect of the invention, a series circuit of a resistor and a capacitor is connected between both ends of the rectifying circuit, and a diode is connected in parallel with the resistor with its anode as the positive side of the rectifying circuit.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1A shows an embodiment of the invention according to claim 1, and the same reference numerals are given to the portions corresponding to those in FIG. In the present invention, the output terminal on the positive side of the constant voltage circuit 24 is the diode 4
It is connected to the middle point of the primary winding 12 through 1. The anode side of the diode 41 is the constant voltage circuit 24 side. In this case, the capacitor 33 on the output side of the constant voltage circuit 24
Is omitted.

According to this structure, as shown in FIG. 1B.
Input AC voltage V_IThe rectified output voltage is V_D
At this time, the voltage V at the positive output terminal of the constant voltage circuit 24
_BiIs the bias voltage V of the FETs 16 and 17_GBThan
Also, the midpoint voltage of the primary winding 12, that is, the FETs 16 and 17
When the drain voltage of the
A current flows to the midpoint side of the line 12, and therefore the FETs 16, 17
Gate bias is also low as its drain current decreases
Down. In this way, the power supply becomes unstable, that is, the dray
Section T where₁The gate voltage of FET
Since the voltage drops below the drain voltage, the FET
No pike current flows. Output voltage V at this time_O
Is in the state shown in the figure, and turns on when the discharge starts.
Force current is I _IFlows like.

FIG. 2A shows an embodiment of the invention of claim 2,
The parts corresponding to those in FIG. 4 are designated by the same reference numerals. In this embodiment, the switching element 42 is connected between both output terminals of the constant voltage circuit 24. In this example, a transistor is used, and the collector of the transistor 42 is the constant voltage circuit 24.
Is connected to the positive side and the emitter is connected to the negative side. Further, the output of the rectifier circuit 14 is a predetermined value, that is, the FET 16,
When the voltage immediately before the voltage at which the operation of 17 becomes unstable is detected, the switching element 42 is turned on. Therefore, the output terminal 15 of the rectifier circuit 14
Is connected to the cathode side of the Zener diode 43, and the anode side of the Zener diode 43 is connected to the transistor 44.
Is connected to the base of the transistor 44, the resistor 45 is connected between the base and the emitter of the transistor 44, and the collector is connected to the resistor 46.
Through the resistor 42 and the input side of the constant voltage circuit 24 through the resistor 47. A resistor 48 is connected between the base and emitter of the transistor 42.

As shown in the voltage states of the respective parts in FIG. 2B, the output of the rectifier circuit 14 becomes V _D with respect to the AC input voltage V _I. When this voltage is low, that is, at a voltage at which the FETs 16 and 17 are unstable and do not oscillate stably, the Zener diode 43 is not turned on and is in an off state, so that the base current does not flow in the transistor 44, which is turned off. Therefore, a base current flows through the transistor 42, the transistor 42 is turned on, and both ends of the constant voltage circuit 24 are short-circuited by the transistor 42, and the FETs 16 and 17 are connected.
Gate bias cannot be applied to FET16,
17 cannot be turned on. When the output of the rectifier circuit 14 reaches a voltage at which the FETs 16 and 17 operate stably, the Zener diode 43 becomes conductive and the transistor 4
4 is turned on and the transistor 42 is turned off, so that the output of the constant voltage circuit 24 generates a voltage V _Bi , which gives a sufficient voltage to the FETs 16 and 17, and at this time, the drain thereof. Since a sufficiently large voltage is applied, stable oscillation occurs and an oscillation output V _O can be obtained. When a current flows through the load in response to this, a current I _I flows. That is, the Zener diode 43 is turned on when the voltage V _I slightly higher than the oscillation start voltage level is turned on, and conversely, when the voltage V _I or less is reached, the transistor 42 is turned on and oscillation is disabled. It Therefore, during the oscillation instability period T ₁ , the bias voltage is not applied to the FETs 16 and 17, so that the oscillation is disabled and the spike current is not generated.

FIG. 3 shows an embodiment of the invention of claim 3, and the portions corresponding to those of FIG. 4 are designated by the same reference numerals. In the present invention, the resistor 5 is provided between the output terminals 15 and 18 of the rectifier circuit 14.
1, a series circuit of a capacitor 52 is connected. Further, a diode is connected in parallel with the resistor 51, and the diode 5
The cathode side of 3 is the positive output end 15 side of the rectifier circuit 14.

With this configuration, the input of the input AC voltage V _I causes the output of the rectifier circuit 14 to generate the resistor 51.
The capacitor 52 is charged through the capacitor 52 and the polarity of the AC voltage is inverted, the voltage of the capacitor 52 is rapidly discharged through the diode 53. However, the voltage at the output end which is more positive than the forward resistance drop voltage of the diode 53 is can not be lowered, the output voltage V _O of the rectifier circuit 14 drops the voltage no longer occurs as compared with the conventional circuit is omitted by resistor 51, diode 53 the hatched portion, and therefore some voltage below the Therefore, the voltage is set to approximately the oscillation holding voltage of the FET. This time,
Since the resistor 51 is present, the capacitor 52 is not rapidly charged at the time of charging, that is, no inrush current is generated, so that the power factor is not significantly deteriorated. However, when the dimming is performed by the phase control, there is some problem because the voltage in the capacitor 52 is maintained, but there is no problem in the case of continuous lighting or blinking control of load, discharge and the like. Also in this case, always F
A stable oscillation voltage is applied to ET, so that there is no possibility of generating spike current.

In any of the above cases, the diode 22 may be connected to the rectifier circuit 14 side of the choke coil 13 as shown by the dotted line. Further, the rectifier circuit 14 may be a half-wave rectifier circuit as well as a full-wave rectifier circuit. The present invention is effective when applied to other rectifier circuits in which the voltage zero period is repeated.

[0016]

As described above, according to the present invention, when the output voltage of the rectifier circuit becomes almost 0 and the oscillation becomes unstable, the oscillation is stopped or the continuous oscillation is maintained, or Since the bias of the gate voltage is always lowered with respect to the drain current, an unstable spike current does not appear at each repetition of oscillation, so there is little fear of heat generation, less power loss, and a switching element. It does not need to use a particularly large capacity and can be constructed at low cost. It also works effectively when the input AC phase is controlled by controlling the flow angle with a simple element such as a triac. .

[Brief description of drawings]

FIG. 1A is a connection diagram showing an embodiment of the invention of claim 1;
[Fig. 4] is a waveform chart of each part for explaining the operation.

FIG. 2A is a connection diagram showing an embodiment of the invention of claim 2;
FIG. 4 is a waveform diagram showing an operation example of each part thereof.

FIG. 3A is a connection diagram showing an embodiment of the invention of claim 3;
FIG. 6 is a diagram showing an example of the input coil voltage and the rectified output voltage.

FIG. 4 is a connection diagram showing a conventional inverter circuit.

FIG. 5 is a waveform diagram of each part for explaining problems in a conventional inverter circuit, and E is a diagram showing a gate voltage drain current characteristic of an FET.

Claims (3)

[Claims] 1. A middle point of a primary winding of a transformer is connected to one output end of a rectification circuit through a choke coil, and both ends of the primary winding are respectively connected through first and second switching elements to the rectification circuit. Is connected to the other output terminal of the transformer, a resonance capacitor is connected between both ends of the primary winding, and both ends of the feedback winding of the transformer are respectively connected to the first and
The choke coil is connected to a control electrode of a second switching element, one end of the choke coil is connected to the other output end through a diode-second capacitor, and a constant voltage circuit is connected to both ends of the second capacitor. A series circuit of first and second resistors and a series circuit of third and fourth resistors are connected to the output side of the circuit, and the connection point of the first and second resistors is the first switching element. Connected to the control electrode of the third switching resistor, the connection point of the third and fourth resistors is connected to the control electrode of the second switching element, the positive output terminal of the constant voltage circuit through the forward diode, Inverter circuit connected to the midpoint of the winding. 2. A middle point of a primary winding of a transformer is connected to one output end of a rectifier circuit through a choke coil, and both ends of the primary winding are respectively connected through first and second switching elements to the rectifier circuit. Is connected to the other output terminal of the transformer, a resonance capacitor is connected between both ends of the primary winding, and both ends of the feedback winding of the transformer are respectively connected to the first and
The choke coil is connected to a control electrode of a second switching element, one end of the choke coil is connected to the other output end through a diode-second capacitor, and a constant voltage circuit is connected to both ends of the second capacitor. A series circuit of first and second resistors and a series circuit of third and fourth resistors are connected to the output side of the circuit, and the connection point of the first and second resistors is the first switching element. Connected to the control electrode of, the connection point of the third and fourth resistors is connected to the control electrode of the second switching element, the third switching element is connected between both output terminals of the constant voltage circuit, An inverter circuit provided with means for detecting the output voltage of the rectifier circuit when the output voltage falls below a predetermined value and turning on the third switching element. 3. The middle point of the primary winding of the transformer is connected to one output end of the rectifier circuit through a choke coil, and both ends of the primary winding are respectively connected through first and second switching elements to the rectifier circuit. Is connected to the other output terminal of the transformer, a resonance capacitor is connected between both ends of the primary winding, and both ends of the feedback winding of the transformer are respectively connected to the first and
The choke coil is connected to a control electrode of a second switching element, one end of the choke coil is connected to the other output end through a diode-second capacitor, and a constant voltage circuit is connected to both ends of the second capacitor. A series circuit of first and second resistors and a series circuit of third and fourth resistors are connected to the output side of the circuit, and the connection point of the first and second resistors is the first switching element. Connected to the control electrode of the third and fourth resistors, connected to the control electrode of the second switching element, a series circuit of a fifth resistor and a third capacitor across the rectifier circuit. Is connected, and the diode is connected in parallel with the fifth resistor to its anode,
An inverter circuit connected as the positive side of the rectifier circuit.