JPH0715147A - Method and device for forming blind hole of multilayer wiring board - Google Patents

Method and device for forming blind hole of multilayer wiring board

Info

Publication number
JPH0715147A
JPH0715147A JP17591493A JP17591493A JPH0715147A JP H0715147 A JPH0715147 A JP H0715147A JP 17591493 A JP17591493 A JP 17591493A JP 17591493 A JP17591493 A JP 17591493A JP H0715147 A JPH0715147 A JP H0715147A
Authority
JP
Japan
Prior art keywords
conductive
wiring board
multilayer wiring
drill
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17591493A
Other languages
Japanese (ja)
Inventor
Mamoru Ikeda
守 池田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17591493A priority Critical patent/JPH0715147A/en
Publication of JPH0715147A publication Critical patent/JPH0715147A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Drilling And Boring (AREA)
  • Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)

Abstract

PURPOSE:To provide a method and device for forming a blind holes easily regardless of the scattering in the thickness of each layer and entire part of a multilayer wiring board. CONSTITUTION:A conductive drill 10, a control part 26 for controlling the conductive drill, electrical connection members 22a-22d with the conductive layer of a multilayer wiring board 2, and a power supply 20 and current detectors A1-A4 for detecting electrical continuity between the connection member and the conductive drill 10 are provided. The control part 26 stops the advance of the conductive drill 10 from the upper-surface side of the multilayer wiring board 2 based on the current detection signal from the current detectors A1-A4 which are electrically connected to the targeted conductive layer of the multilayer wiring board 2, thus forming blind holes up to the conductive layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、多層配線基板に半貫通
スルーホールを形成する方法及びその装置に関する。特
に、本発明は、導電層や絶縁層ならびに全体の厚みにば
らつきがあっても多層配線基板の片面側から所望の導電
層まで少なくとも1つの絶縁層を貫通せる半貫通スルー
ホールを容易且つ正確に形成するための方法及びその装
置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for forming a semi-through hole in a multilayer wiring board. In particular, the present invention can easily and accurately form a semi-through hole that can penetrate at least one insulating layer from one surface side of a multilayer wiring board to a desired conductive layer even if there are variations in the thicknesses of the conductive layer, the insulating layer and the whole. A method for forming and an apparatus therefor.

【0002】[0002]

【従来の技術及び発明が解決しようとする課題】近年、
電子部品を配線基板の片面または両面に直接搭載する表
面実装が盛んになるにつれて、内部に導電層を有する多
層配線基板が多く用いられる様になってきている。この
多層配線基板は、絶縁層を介して導電層を多層に積層
し、該積層の前に各導電層を所望配線パターンに形成
し、複数の導電層間を導通させるために適宜の位置にて
少なくとも1つの絶縁層を貫通せるスルーホールを形成
し、該スルーホール内面に導電膜を形成することにより
得られる。
2. Description of the Related Art In recent years,
As surface mounting in which electronic components are directly mounted on one side or both sides of a wiring board has become popular, a multilayer wiring board having a conductive layer inside has been widely used. In this multilayer wiring board, conductive layers are laminated in multiple layers with an insulating layer interposed therebetween, each conductive layer is formed into a desired wiring pattern before the lamination, and at least a proper position is provided for conducting a plurality of conductive layers. It can be obtained by forming a through hole penetrating one insulating layer and forming a conductive film on the inner surface of the through hole.

【0003】多層配線基板の場合は、従来の単層配線基
板の場合と異なり、基板全体を貫通せる貫通スルーホー
ルの他に、内部導電層と他の内部導電層または表面導電
層とを接続するため、少なくとも1つの絶縁層を貫通せ
る半貫通スルーホールを形成することが必要となる。こ
の半貫通スルーホールの形成の場合には、貫通スルーホ
ールの形成の場合が単に基板の面内位置を指定し十分な
距離穴あけ用キリを進行させて基板全体を貫通させれば
よいのとは異なり、各半貫通スルーホールごとにキリの
進行深さを精密に制御する必要がある。
In the case of a multi-layer wiring board, unlike the case of a conventional single-layer wiring board, in addition to through through holes penetrating the entire board, an internal conductive layer is connected to another internal conductive layer or a surface conductive layer. Therefore, it is necessary to form a semi-through hole that penetrates at least one insulating layer. In the case of forming the semi-through through hole, in the case of forming the through through hole, it is sufficient to simply specify the in-plane position of the substrate and advance the drill for sufficient distance drilling to penetrate the entire substrate. Differently, it is necessary to precisely control the depth of penetration of each semi-through hole.

【0004】従来、この半貫通スルーホールの形成のた
めには、図5に示す様に、各スルーホールごとに基板面
内位置とキリ10’の進行距離とを制御部20’により
指定して、加工していた。
Conventionally, in order to form this semi-through hole, as shown in FIG. 5, the position in the substrate surface and the traveling distance of the drill 10 'are designated by the control unit 20' for each through hole. I was working on it.

【0005】ところで、多層配線基板は絶縁層を介して
導電層を積層して作製されているが、作製工程での加工
条件の差に基づき、その厚さ精度は必ずしも十分厳密で
あるとは限らず、各導電層の厚さ及び各絶縁層の厚さ更
には基板全体の厚さは、同一基板であっても面内位置に
よるばらつきがあり、あるいは異なる基板間でのばらつ
きもある。
By the way, a multilayer wiring board is manufactured by laminating conductive layers via an insulating layer. However, the thickness accuracy is not always strict enough due to the difference in processing conditions in the manufacturing process. The thickness of each conductive layer, the thickness of each insulating layer, and the thickness of the entire substrate may vary depending on the in-plane position of the same substrate or may vary between different substrates.

【0006】このため、図6に示す様に、例えば、導電
層4a〜4fを有する基板2の上面を基準として距離D
1 だけキリ10’を下向きに進行させた場合でも、
(a)では第5層目の導電層4eまでの半貫通スルーホ
ールが形成されるが、(b)では第4層目の導電層4d
までの半貫通スルーホールしか形成されない。また、例
えば、基板2の下面を基準として距離D2 までキリを下
向きに進行させた場合でも、(a)では第5層目の導電
層4eまでの半貫通スルーホールが形成されるが、
(c)では第4層目の導電層4dまでの半貫通スルーホ
ールしか形成されない。
Therefore, as shown in FIG. 6, for example, the distance D is based on the upper surface of the substrate 2 having the conductive layers 4a to 4f.
Even if you push Kiri 10 'downward by 1 ,
In (a), a semi-penetrating through hole up to the fifth conductive layer 4e is formed, but in (b), the fourth conductive layer 4d.
Only a half-through through hole up to is formed. Further, for example, even when the drill is advanced downward to the distance D 2 with the lower surface of the substrate 2 as a reference, in (a), a half-through through hole to the fifth conductive layer 4e is formed,
In (c), only half-through holes up to the fourth conductive layer 4d are formed.

【0007】以上の様に、従来の半貫通スルーホールの
形成方法では、多層配線基板の各層や全体の厚さのばら
つきがあると適切なスルーホール形成ができなくなるこ
とがしばしばあり、歩留まり向上は困難であった。
As described above, in the conventional method of forming a through hole, it is often impossible to properly form a through hole if there is a variation in the thickness of each layer of the multilayer wiring board or the entire thickness, and the yield is improved. It was difficult.

【0008】この様な不利を避けるためには、多層配線
基板の作製工程の精度を向上させればよいのであるが、
これではコストが大きくアップするという不利がある。
In order to avoid such a disadvantage, the accuracy of the manufacturing process of the multilayer wiring board should be improved.
This has the disadvantage of significantly increasing costs.

【0009】そこで、本発明は、以上の様な従来技術の
問題点に鑑み、多層配線基板の各層や全体の厚さにばら
つきがあっても適切な半貫通スルーホールを容易且つ確
実に形成することができる、半貫通スルーホールの形成
方法及びその装置を提供することを目的とする。
Therefore, in view of the problems of the prior art as described above, the present invention easily and reliably forms an appropriate semi-through hole even if there are variations in the thickness of each layer of the multilayer wiring board or the entire thickness. It is an object of the present invention to provide a method and an apparatus for forming a semi-through hole that can be formed.

【0010】[0010]

【課題を解決するための手段】本発明によれば、以上の
如き目的を達成するものとして、多層配線基板の片面側
から導電性キリを進行させ、該導電性キリが多層配線基
板の目的とする導電層と電気的に導通したことを検知し
て前記導電性キリの進行を停止させて、前記目的とする
導電層までの半貫通スルーホールを形成することを特徴
とする、多層配線基板の半貫通スルーホール形成方法、
が提供される。
According to the present invention, in order to achieve the above-mentioned objects, a conductive chip is made to progress from one side of the multilayer wiring board, and the conductive chip has the purpose of the multilayer wiring board. A conductive layer is electrically connected to the conductive layer to stop the progress of the conductive drill, to form a semi-through through hole to the target conductive layer, Semi-through hole forming method,
Will be provided.

【0011】また、本発明によれば、以上の如き目的を
達成するものとして、導電性キリと、該導電性キリを制
御する制御手段と、多層配線基板の導電層との電気的接
続手段と、該接続手段と前記導電性キリとの間の電気的
導通を検知する検知手段とを備えており、前記制御手段
は前記検知手段からの検知信号に基づき前記多層配線基
板の片面側からの前記導電性キリの進行を停止させるこ
とを特徴とする、多層配線基板の半貫通スルーホール形
成装置、が提供される。
Further, according to the present invention, in order to achieve the above-mentioned objects, a conductive edge, a control means for controlling the conductive edge, and an electrical connection means for connecting the conductive layer of the multilayer wiring board. A detecting means for detecting electrical continuity between the connecting means and the conductive drill, the control means based on a detection signal from the detecting means from one side of the multilayer wiring board. Provided is a semi-through hole forming device for a multilayer wiring board, which is characterized in that the progress of conductive drilling is stopped.

【0012】本発明の一態様においては、前記検知手段
が、電源と、前記導電性キリと前記接続手段との間に電
圧を印加するための手段とを備えており、前記導電性キ
リと前記接続手段との間に流れる電流を検知することに
より前記電気的導通を検知するものである。
In one aspect of the present invention, the detection means includes a power source and means for applying a voltage between the conductive drill and the connecting means, and the conductive drill and the The electrical continuity is detected by detecting a current flowing between the connecting means.

【0013】本発明の他の態様においては、前記接続手
段が複数設けられており、前記制御手段は前記各接続手
段に関する前記検知信号のうちの1つを選択し該選択さ
れた検知信号に基づき前記導電性キリの進行を停止させ
る。
In another aspect of the present invention, a plurality of the connection means are provided, and the control means selects one of the detection signals relating to the connection means, and based on the selected detection signal. The progress of the conductive drill is stopped.

【0014】本発明の更に別の態様においては、前記接
続手段が複数設けられており、前記導電性キリと前記各
接続手段との間の電圧印加を選択する選択手段を備えて
おり、前記制御手段は前記選択手段をも制御する。
In still another aspect of the present invention, a plurality of the connecting means are provided, and a selecting means for selecting a voltage application between the conductive drill and each of the connecting means is provided, and the control is performed. The means also control the selection means.

【0015】[0015]

【実施例】以下、図面を参照しながら本発明の具体的実
施例を説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments of the present invention will be described below with reference to the drawings.

【0016】図1は本発明による半貫通スルーホール形
成方法及び該方法を実施するための装置の一実施例の説
明図である。図1において、2は水平に配置された多層
配線基板である。図2には該多層配線基板の部分拡大図
が示されている。該基板2は、複数の導電層4a,4
b,4c,4d,4e,4fと、導電層間に介在する絶
縁層6a,6b,6c,6d,6eとからなる。
FIG. 1 is an explanatory view of an embodiment of a method of forming a half through hole according to the present invention and an apparatus for carrying out the method. In FIG. 1, reference numeral 2 is a horizontally arranged multilayer wiring board. FIG. 2 shows a partially enlarged view of the multilayer wiring board. The substrate 2 has a plurality of conductive layers 4a, 4
b, 4c, 4d, 4e, 4f and insulating layers 6a, 6b, 6c, 6d, 6e interposed between the conductive layers.

【0017】図1において、10はスルーホール形成の
ための工具たる導電性キリであり、11はその支持・駆
動部である。キリ10は支持・駆動部11により上下方
向(Z方向)移動及び回転せしめられる。該支持・駆動
部11は、キリ10が下向きになる様に保持部材12に
より保持されている。該保持部材は平行な1対のガイド
部材14a,14bに沿って水平面内の一方向(即ちY
方向)に移動可能であり、この移動は保持部材12内の
駆動手段とガイド部材14aとの相互作用によりなされ
る。ガイド部材14a,14bの両端には取付け部材1
6a,16bが取付けられている。これら取付け部材は
平行な1対のガイド部材18a,18bに沿って水平面
内の一方向(即ちX方向)に移動可能であり、この移動
は取付け部材16a内の駆動手段とガイド部材18aと
の相互作用によりなされる。
In FIG. 1, 10 is a conductive tool as a tool for forming a through hole, and 11 is a supporting / driving portion thereof. The drill 10 is moved and rotated in the vertical direction (Z direction) by the support / drive unit 11. The supporting / driving unit 11 is held by a holding member 12 so that the drill 10 faces downward. The holding member is arranged along a pair of parallel guide members 14a, 14b in one direction in the horizontal plane (that is, Y
Direction), and this movement is made by the interaction between the driving means in the holding member 12 and the guide member 14a. Mounting members 1 are provided on both ends of the guide members 14a and 14b.
6a and 16b are attached. These mounting members are movable along a pair of parallel guide members 18a, 18b in one direction in the horizontal plane (that is, the X direction), and this movement is such that the drive means in the mounting member 16a and the guide member 18a move with respect to each other. Done by action.

【0018】一方、20は直流電源であり、その一方の
電極が上記導電性キリ10に電気的に接続されている。
また、22a,22b,22c,22dは基板2の各内
部導電層4b,4c,4d,4eと電気的に接続するた
めの接続部材であり、これら接続部材と上記電源20の
他方の電極とがそれぞれ電流検知器A1 ,A2 ,A3
4 を介して接続されている。接続部材22a,22
b,22c,22dと各内部導電層4b,4c,4d,
4eとの電気的接続は、例えば図2に示される様にして
各内部導電層の一部を露出させハンダ付けすることによ
り、なすことができる。
On the other hand, 20 is a DC power source, one electrode of which is electrically connected to the conductive drill 10.
Further, 22a, 22b, 22c, 22d are connecting members for electrically connecting to the respective internal conductive layers 4b, 4c, 4d, 4e of the substrate 2, and these connecting members and the other electrode of the power source 20 are Current detectors A 1 , A 2 , A 3 , respectively
It is connected via A 4 . Connection members 22a, 22
b, 22c, 22d and the internal conductive layers 4b, 4c, 4d,
The electrical connection with 4e can be made, for example, by exposing a part of each internal conductive layer and soldering it as shown in FIG.

【0019】図1において、26は制御部であり、該制
御部は、上記導電性キリ10の回転及びZ方向移動、更
には上記保持部材12のY方向移動、ならびに上記取付
け部材16aのX方向移動を制御する。これら被制御部
からは制御部26にそれぞれの位置信号が送られる。ま
た、該制御部26は上記電流検知器A1 〜A4 からの検
知信号を受ける。そして、該制御部26は上記電流検知
器A1 〜A4 のうちのいずれか1つを選択することがで
きる。この選択は、検知器のうち選択した1つのみ作動
させることにより行うこともできるし、全検出器を作動
させておき制御部自体が入力検知信号のうちの1つを選
択することにより行うこともできる。
In FIG. 1, reference numeral 26 is a control unit, which controls the rotation and Z direction movement of the conductive drill 10, the Y direction movement of the holding member 12, and the X direction of the mounting member 16a. Control movement. Position signals are sent from these controlled units to the control unit 26. The control unit 26 also receives detection signals from the current detectors A 1 to A 4 . Then, the control unit 26 can select any one of the current detectors A 1 to A 4 . This selection can be done by activating only one of the detectors, or by activating all detectors and the controller itself selecting one of the input detection signals. You can also

【0020】制御部26には、予め作業データが入力さ
れている。このデータは、形成すべき半貫通スルーホー
ルごとの、基板面内の位置を示す2次元座標(X座標及
びY座標)と、半貫通スルーホールの先端(即ち半貫通
スルーホールの最深部)が到達すべき導電層を特定する
コードとからなる。
Work data is input to the control unit 26 in advance. This data includes two-dimensional coordinates (X coordinate and Y coordinate) indicating the position in the substrate surface for each half-through hole to be formed, and the tip of the half-through hole (that is, the deepest part of the half-through hole). And a code for identifying the conductive layer to be reached.

【0021】先ず、上記2次元座標により指定される位
置へとキリ10を移動させる様に、制御部26から保持
部材12及び取付け部材16aに対し移動指令が出され
る。次に、キリを回転させZ方向に下向きに進行させる
様に、制御部26からキリ支持・駆動部11に指令が出
され、同時に上記コードにより特定される導電層に電気
的に接続されている電流検知器が選択される。やがて、
キリ10は基板2の上面から穴をあけ始め、該キリの進
行につれて次第に該穴の深さが深くなる。そして、選択
された電流検知器から制御部26に対し通電検知信号が
入力されると、該制御部からキリ支持・駆動部11に対
しZ方向下向きのキリ進行を停止させる指令が出され、
次いでキリはZ方向上向きに後退する。他の半貫通スル
ーホールに関しても同様な工程が行われる。
First, the controller 26 issues a movement command to the holding member 12 and the mounting member 16a so as to move the drill 10 to the position designated by the two-dimensional coordinates. Next, a command is issued from the control unit 26 to the drill support / driving unit 11 so as to rotate the drill and move it downward in the Z direction, and at the same time, it is electrically connected to the conductive layer specified by the above code. A current detector is selected. Eventually,
The perforations 10 start to be formed on the upper surface of the substrate 2, and the depth of the perforations gradually increases as the perforations progress. Then, when the energization detection signal is input to the control unit 26 from the selected current detector, the control unit issues a command to the drill support / driving unit 11 to stop drilling in the Z direction downward,
Next, the drill retreats upward in the Z direction. Similar steps are performed for the other semi-through holes.

【0022】図3の(a)〜(e)は、以上の様にして
半貫通スルーホールを形成する際のキリ10のZ方向下
向きの進行の停止した状態を示す図である。(a)〜
(d)では、上面導電層4aと内部導電層4b,4c,
4d,4eとをそれぞれ接続させるための半貫通スルー
ホールが形成され、(e)では上面導電層4aと2つの
内部導電層4b,4dの双方とを接続させるための半貫
通スルーホールが形成される。
FIGS. 3A to 3E are diagrams showing a state in which the downward movement of the drill 10 in the Z direction is stopped when the semi-through hole is formed as described above. (A) ~
In (d), the top conductive layer 4a and the internal conductive layers 4b, 4c,
4d and 4e are respectively formed with semi-through holes, and in (e), semi-through holes are formed to connect the upper surface conductive layer 4a and both of the two internal conductive layers 4b and 4d. R.

【0023】以上の実施例によれば、基板2の全体厚や
各導電層厚及び各絶縁層厚にばらつきがあっても、キリ
10の進行は目的の導電層に到達した時に確実に停止す
るので、所望の半貫通スルーホールが容易且つ確実に形
成される。
According to the above embodiment, even if the total thickness of the substrate 2, the thickness of each conductive layer, and the thickness of each insulating layer varies, the progress of the drill 10 is surely stopped when the target conductive layer is reached. Therefore, the desired semi-penetrating through hole can be easily and surely formed.

【0024】図4は、上記実施例の変形例を示す図であ
る。本図において、上記図1におけると同様の部材には
同一の符号が付されている。本変形例では、1つの電流
検知器Aのみが用いられており、該検知器Aと接続部材
22a〜22dとの間に導通選択スイッチ30が設けら
れている。該スイッチの選択は制御部26によりなさ
れ、これによりキリ10と基板の所望の導電層との間の
電気的導通を検知することができる。
FIG. 4 is a diagram showing a modification of the above embodiment. In this figure, the same members as those in FIG. 1 are designated by the same reference numerals. In this modification, only one current detector A is used, and the conduction selection switch 30 is provided between the detector A and the connection members 22a to 22d. The selection of the switch is made by the control unit 26, whereby the electrical conduction between the drill 10 and the desired conductive layer of the substrate can be detected.

【0025】[0025]

【発明の効果】以上詳細に説明したように、本発明によ
れば、多層配線基板の各層厚や全体厚にばらつきがあっ
ても適切な半貫通スルーホールを容易且つ確実に形成す
ることができ、歩留まりが向上し、信頼性が飛躍的に向
上する。従って、多層配線基板の作製工程の精度を厳し
くしてコストアップをまねく様なことがない。更に、従
来は各スルーホールにつき深さのデータを逐一指示して
いたが、本発明では導電層を特定するだけでよいので、
データが格段に簡略化され制御が容易になる。
As described above in detail, according to the present invention, it is possible to easily and surely form an appropriate semi-through hole even if there is a variation in each layer thickness or overall thickness of the multilayer wiring board. , The yield is improved, and the reliability is dramatically improved. Therefore, the precision of the manufacturing process of the multilayer wiring board is not strict, and the cost is not increased. Further, conventionally, the depth data was instructed point by point for each through hole, but in the present invention, since it is only necessary to specify the conductive layer,
The data is greatly simplified and the control becomes easier.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による半貫通スルーホール形成方法及び
該方法を実施するための装置の一実施例の説明図であ
る。
FIG. 1 is an explanatory view of an embodiment of a method of forming a half through hole according to the present invention and an apparatus for carrying out the method.

【図2】多層配線基板を示す部分拡大図である。FIG. 2 is a partially enlarged view showing a multilayer wiring board.

【図3】半貫通スルーホールを形成する際のキリの進行
の停止した状態を示す図である。
FIG. 3 is a diagram showing a state in which the progress of drilling when forming a semi-through hole is stopped.

【図4】図1の実施例の変形例を示す図である。FIG. 4 is a diagram showing a modification of the embodiment of FIG.

【図5】従来の半貫通スルーホール形成方法の説明図で
ある。
FIG. 5 is an explanatory diagram of a conventional method of forming a semi-through hole.

【図6】従来法で半貫通スルーホールを形成する際のキ
リの進行の停止した状態を示す図である。
FIG. 6 is a diagram showing a state in which the progress of drilling is stopped when a semi-through hole is formed by a conventional method.

【符号の説明】[Explanation of symbols]

2 多層配線基板 4a〜4f 導電層 6a,6b,6c,6d,6e 絶縁層 10 導電性キリ 11 キリ支持・駆動部 12 保持部材 14a,14b ガイド部材 16a,16b 取付け部材 18a,148 ガイド部材 20 直流電源 22a〜22d 電気的接続部材 26 制御部 30 導通選択スイッチ A,A1 〜A4 電流検知器2 Multilayer wiring board 4a-4f Conductive layer 6a, 6b, 6c, 6d, 6e Insulating layer 10 Conductive drill 11 Drilling support / driving part 12 Holding member 14a, 14b Guide member 16a, 16b Mounting member 18a, 148 Guide member 20 DC power 22a~22d electrical connection member 26 controller 30 conducts selection switch A, A 1 ~A 4 current detector

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 多層配線基板の片面側から導電性キリを
進行させ、該導電性キリが多層配線基板の目的とする導
電層と電気的に導通したことを検知して前記導電性キリ
の進行を停止させて、前記目的とする導電層までの半貫
通スルーホールを形成することを特徴とする、多層配線
基板の半貫通スルーホール形成方法。
1. A conductive chip is advanced from one side of a multilayer wiring board, and when the conductive chip is electrically connected to a target conductive layer of the multilayer wiring board, the conductive chip is advanced. And forming a semi-penetrating through hole to the target conductive layer, the method for forming a semi-penetrating through hole in a multilayer wiring board.
【請求項2】 導電性キリと、該導電性キリを制御する
制御手段と、多層配線基板の導電層との電気的接続手段
と、該接続手段と前記導電性キリとの間の電気的導通を
検知する検知手段とを備えており、前記制御手段は前記
検知手段からの検知信号に基づき前記多層配線基板の片
面側からの前記導電性キリの進行を停止させることを特
徴とする、多層配線基板の半貫通スルーホール形成装
置。
2. A conductive drill, control means for controlling the conductive drill, electrical connection means for the conductive layer of the multilayer wiring board, and electrical continuity between the connection means and the conductive drill. A multi-layer wiring, wherein the control means stops the progress of the conductive drill from one side of the multi-layer wiring board based on a detection signal from the detection means. Substrate semi-through hole forming device.
【請求項3】 前記検知手段が、電源と、前記導電性キ
リと前記接続手段との間に電圧を印加するための手段と
を備えており、前記導電性キリと前記接続手段との間に
流れる電流を検知することにより前記電気的導通を検知
するものであることを特徴とする、請求項2に記載の多
層配線基板の半貫通スルーホール形成装置。
3. The detecting means comprises a power source and means for applying a voltage between the conductive drill and the connecting means, and between the conductive drill and the connecting means. The semi-through hole forming device for a multilayer wiring board according to claim 2, wherein the electrical conduction is detected by detecting a flowing current.
【請求項4】 前記接続手段が複数設けられており、前
記制御手段は前記各接続手段に関する前記検知信号のう
ちの1つを選択し該選択された検知信号に基づき前記導
電性キリの進行を停止させることを特徴とする、請求項
2または3に記載の多層配線基板の半貫通スルーホール
形成装置。
4. A plurality of the connection means are provided, and the control means selects one of the detection signals relating to each of the connection means, and advances the conductive drill based on the selected detection signal. The half-penetrating through-hole forming device for a multilayer wiring board according to claim 2 or 3, wherein the device is stopped.
【請求項5】 前記接続手段が複数設けられており、前
記導電性キリと前記各接続手段との間の電圧印加を選択
する選択手段を備えており、前記制御手段は前記選択手
段をも制御することを特徴とする、請求項3または4に
記載の多層配線基板の半貫通スルーホール形成装置。
5. A plurality of the connection means are provided, and a selection means for selecting a voltage application between the conductive drill and each of the connection means is provided, and the control means also controls the selection means. The semi-through hole forming device for a multilayer wiring board according to claim 3 or 4, characterized in that.
JP17591493A 1993-06-24 1993-06-24 Method and device for forming blind hole of multilayer wiring board Pending JPH0715147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17591493A JPH0715147A (en) 1993-06-24 1993-06-24 Method and device for forming blind hole of multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17591493A JPH0715147A (en) 1993-06-24 1993-06-24 Method and device for forming blind hole of multilayer wiring board

Publications (1)

Publication Number Publication Date
JPH0715147A true JPH0715147A (en) 1995-01-17

Family

ID=16004459

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17591493A Pending JPH0715147A (en) 1993-06-24 1993-06-24 Method and device for forming blind hole of multilayer wiring board

Country Status (1)

Country Link
JP (1) JPH0715147A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10040303A1 (en) * 2000-08-17 2002-04-04 Volker Nissen Circuit board production method, involves providing sounding pads connected to metallic edge of respective inside layer and sounding drilling in area of pads determining depth of inside layer
US6893720B1 (en) 1997-06-27 2005-05-17 Nissin Electric Co., Ltd. Object coated with carbon film and method of manufacturing the same
JP2006173146A (en) * 2004-12-10 2006-06-29 Hitachi Via Mechanics Ltd Multilayer circuit board and method for manufacturing the same
DE10248112B4 (en) * 2002-09-09 2007-01-04 Ruwel Ag Process for the production of printed electrical circuits
WO2015166587A1 (en) * 2014-05-02 2015-11-05 株式会社メイコー Circuit board production method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61209805A (en) * 1985-03-08 1986-09-18 Fujitsu Ltd Drill hole detecting method for printed circuit board
JPH054105A (en) * 1991-06-25 1993-01-14 Fujitsu Ltd Working of hole on printed circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61209805A (en) * 1985-03-08 1986-09-18 Fujitsu Ltd Drill hole detecting method for printed circuit board
JPH054105A (en) * 1991-06-25 1993-01-14 Fujitsu Ltd Working of hole on printed circuit board

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6893720B1 (en) 1997-06-27 2005-05-17 Nissin Electric Co., Ltd. Object coated with carbon film and method of manufacturing the same
DE10040303A1 (en) * 2000-08-17 2002-04-04 Volker Nissen Circuit board production method, involves providing sounding pads connected to metallic edge of respective inside layer and sounding drilling in area of pads determining depth of inside layer
DE10040303C2 (en) * 2000-08-17 2002-07-11 Volker Nissen Process for the defined deep drilling of blind holes (blind vias) in multilayer printed circuit boards (multilayer)
DE10248112B4 (en) * 2002-09-09 2007-01-04 Ruwel Ag Process for the production of printed electrical circuits
JP2006173146A (en) * 2004-12-10 2006-06-29 Hitachi Via Mechanics Ltd Multilayer circuit board and method for manufacturing the same
JP4611010B2 (en) * 2004-12-10 2011-01-12 日立ビアメカニクス株式会社 Multilayer circuit board manufacturing method
WO2015166587A1 (en) * 2014-05-02 2015-11-05 株式会社メイコー Circuit board production method

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