JPH0714874A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enable a semiconductor device to be lessened in size, enhanced in density, and cope easily with a mounting method such as a bonding method or a bump method by a method wherein a hole is bored in a semiconductor substrate, and a conductor layer electrically connected to a part of an inner circuit is exposed out of both the front and rear of the semiconductor substrate. CONSTITUTION:A semiconductor substrate 1 is oxidized, whereby an oxide film is formed on both the sides of the substrate 1, a window is provided to each of the oxide films formed on the sides of the substrate 1, and a hole is provided to the substrate 1 by etching it from both its sides using the oxide films as mask. Then, the hole and the surface of the substrate 1 are covered with an insulating film 3, and a conductor layer 2 is formed inside it. The conductor layer 2 is exposed out of the front and rear of the substrate 1 to serve as a pad. As the pad is exposed at both the front and rear of the substrate 1, a semiconductor device can be mounted through a bonding method using an electrode lead-out part provided onto its surface or through a bump method using an electrode lead-out part provided onto its rear side, and consequently semiconductor chips of the same type can cope with both mounting methods, a bonding method and a bump method, and be lessened in size.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to an electrode structure of its chip.

[0002]

2. Description of the Related Art For example, a structure of an electrode lead-out portion of a semiconductor integrated circuit chip which has been generally used in the past is shown in FIG.
It is shown in the cross-sectional view of FIG. 3A and the plan view of FIG.

A pad 9 which is a conductor layer electrically connected to a part of an internal circuit in an insulating film 10 formed on a semiconductor substrate 8 (connected to a fine metal wire by a bonding method)
Is provided, and as shown in FIG. 3C, the structure is formed on the same plane as the internal circuit region on one chip.

[0004]

In the conventional semiconductor device described above, the pad 7 is formed on the semiconductor substrate 8 as shown in FIG. 3 (c).
Since the internal circuit area and the pad area are formed on the same surface as shown in FIG. 3C, it is a big problem for realizing a high-density semiconductor device aiming at downsizing. Was there.

Further, in the bump method of connecting to a pad of a semiconductor device through a metal projection (bump) on a lead terminal at the time of mounting, since it is turned over so as to cover the pad surface of the semiconductor device, the semiconductor device is mounted. The pin wiring was opposite to the board on which the board was placed.

Therefore, in order to mount the semiconductor device without changing the pin arrangement on the substrate, the layout data must be turned over, the glass mask must be recreated, and the diffusion must be performed again to match the pin arrangement. Even with a semiconductor device having a function, there is a problem that different semiconductor devices must be manufactured by the bump method and the bonding method.

The object of the present invention is to solve the problems of the prior art,
It is an object of the present invention to provide a semiconductor device that can achieve miniaturization and high density and that can easily be mounted by a bonding method or a bump method.

[0008]

According to a first aspect of the present invention, a semiconductor device is provided with a hole in a semiconductor substrate, and a conductor layer electrically connected to a part of an internal circuit provided in the hole is a semiconductor. It is characterized by being exposed on both front and back surfaces of the substrate.

The semiconductor device of the second invention of the present invention is
A hole is formed in the semiconductor substrate, and a conductor layer electrically connected to a part of the internal circuit provided in the hole is exposed and exposed on a surface different from the surface of the semiconductor substrate on which the internal circuit is formed. Configured as.

[0010]

The present invention will be described below with reference to the drawings. FIG. 1 is a sectional view and a plan view of an electrode lead-out portion and a sectional view of a semiconductor device according to an embodiment of the present invention.

As shown in the figure, the semiconductor substrate 1 is oxidized,
An oxide film is formed on the front and back surfaces, windows are opened in both oxide films, and silicon oxide is punched from both surfaces using this oxide film as a mask.

Next, as shown in FIG. 1A, the hole and the surface of the semiconductor substrate 1 are covered with an insulating film 3, and a conductor layer 2 is formed therein. The conductor layer 2 is exposed on both the front surface and the back surface of the semiconductor substrate 1 and can be used as a pad.

In this way, one chip is shown in FIG.
As shown in (c), pads can be provided on the front surface and the back surface of the semiconductor substrate 1, and one chip can be used for both the bonding method and the bump method and can be made compact and highly densified.

FIG. 2 is a sectional view of an electrode lead-out portion according to another embodiment of the present invention, a plan view thereof, and a sectional view of a semiconductor chip.

First, the semiconductor substrate 1 is oxidized to form an oxide film on the front surface and the back surface, windows are opened in both surfaces of the oxide film, and silicon is etched from both surfaces using the oxide film as a mask to form holes.

Thereafter, as shown in FIG. 1A, the hole and the surface of the semiconductor substrate 1 are covered with an insulating film 3, and a conductor layer 2 is formed therein. Further, the back surface can be exposed on the back surface of the semiconductor substrate by providing a pad 7a connected to the conductor layer of the hole using a glass mask for the pad.

In one chip as shown in FIG. 1C,
Since the internal circuit area can be formed on the front surface of the semiconductor substrate 1 and the pad area can be formed on the back surface of the semiconductor substrate 1, miniaturization of the semiconductor device can be realized.

In this embodiment, the pad portion is provided by connecting to the conductor layer of the hole portion. However, the back surface portion of the hole portion is used as the connecting portion as in the first embodiment without providing the pad portion. Therefore, the size of the semiconductor device can be reduced.

[0019]

As described above, in the semiconductor device of the present invention, since the exposed pads are formed on both the front surface and the back surface of the semiconductor substrate, the electrodes on the surface of the semiconductor device are mounted when mounting by the bonding method. When the lead-out portion is mounted by the bump method, the electrode lead-out portion on the back surface can be used for mounting, so that the same semiconductor chip can be used for either mounting. In addition, miniaturization can be achieved.

Further, by providing the pad on the back surface, it is possible to obtain a semiconductor device having a small size and a high density without reducing the density of parts in the front surface region.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of an electrode lead-out portion and a plan view thereof and a cross-sectional view of a semiconductor device according to an embodiment of the present invention.

2A and 2B are a cross-sectional view and a plan view of an electrode lead-out portion and a cross-sectional view of a semiconductor device according to another embodiment of the present invention.

FIG. 3 is a cross-sectional view and a plan view of an electrode lead-out portion of a conventional semiconductor device, and a cross-sectional view of the semiconductor device.

[Explanation of symbols]

 1,6 Semiconductor substrate 2,7,7a Conductor layer 3,8 Insulating film 4,9,9a Pad conductor 5,10,10a Pad opening 11 Conductor wiring 12 Conductor wiring (board hole)

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication location H01L 29/41 7376-4M H01L 29/44 C

Claims (3)

[Claims] 1. A semiconductor device having a conductor layer electrically connected to a part of an internal circuit, wherein a conductor layer is provided in the semiconductor substrate and is electrically connected to a part of the internal circuit. Is exposed on both the front surface and the back surface of the semiconductor substrate. 2. A semiconductor device having a conductor layer electrically connected to a part of an internal circuit, wherein a hole is provided in a semiconductor substrate, and a conductor provided in the hole and electrically connected to a part of the internal circuit. A semiconductor device, wherein a layer is exposed and exposed on a surface of the semiconductor substrate different from a surface on which an internal circuit is formed. 3. The surface of the hole in which the conductor layer is formed and the surface of the substrate are covered with an insulating film, and a pad connected to the conductor layer of the hole is exposed on the back surface. 2. The semiconductor device according to 2.