JPH07130793A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH07130793A JPH07130793A JP27343393A JP27343393A JPH07130793A JP H07130793 A JPH07130793 A JP H07130793A JP 27343393 A JP27343393 A JP 27343393A JP 27343393 A JP27343393 A JP 27343393A JP H07130793 A JPH07130793 A JP H07130793A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- main component
- electrode
- metal containing
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83874—Ultraviolet [UV] curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、バンプを形成した半導
体チップを、特に絶縁基板上に光あるいは熱エネルギー
またはその両者によって硬化する絶縁樹脂を介してフェ
ースダウンで実装するフリップチップ実装された半導体
装置およびその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip mounted semiconductor chip, in which bump-formed semiconductor chips are mounted face-down, particularly on an insulating substrate through an insulating resin that is cured by light or heat energy or both. The present invention relates to a device and a manufacturing method thereof.
【0002】[0002]
【従来の技術】半導体チップを絶縁基板上に実装する技
術の一つにフリップチップ実装技術がある。フリップチ
ップ実装では、半導体チップと絶縁基板との熱膨張係数
の違いから、半導体と絶縁基板との両電極での接続部に
応力が生じ、この応力の繰り返しによって接続部に疲労
が生じ破壊に至る。この問題を解決する手段として、特
開平3−156940号公報には半導体電極と絶縁基板
電極とを半導体素子の動作温度範囲で液体となる金属を
介して接続することが提案されている。図2はこの半導
体装置の断面図を示す。絶縁基板21を構成するセラミ
ックやポリイミドなどの樹脂からなり基板電極22が形
成されている。基板電極22はAuやCuからなりその
表面にInやSnがメッキされている。Siチップ23
の表面にはAuやCuの上にInやSnメッキしたバン
プ24を形成し、半導体素子動作温度範囲で液体となる
Ga25を基板電極22の上に溜めておく。この状態で
Siチップ23を絶縁基板21上へフェースダウンして
載置し電極22と23を接続するものである。2. Description of the Related Art One of the techniques for mounting a semiconductor chip on an insulating substrate is a flip chip mounting technique. In flip-chip mounting, stress is generated in the connection between both electrodes of the semiconductor and the insulating substrate due to the difference in the thermal expansion coefficient between the semiconductor chip and the insulating substrate, and the repeated stress causes fatigue in the connection and destruction. . As means for solving this problem, Japanese Patent Laid-Open No. 3-156940 proposes to connect the semiconductor electrode and the insulating substrate electrode via a metal that becomes liquid in the operating temperature range of the semiconductor element. FIG. 2 shows a sectional view of this semiconductor device. A substrate electrode 22 is formed of a resin such as ceramic or polyimide that forms the insulating substrate 21. The substrate electrode 22 is made of Au or Cu, and its surface is plated with In or Sn. Si chip 23
On the surface of, the bumps 24 plated with In or Sn on Au or Cu are formed, and Ga 25, which becomes a liquid in the semiconductor element operating temperature range, is accumulated on the substrate electrode 22. In this state, the Si chip 23 is placed facedown on the insulating substrate 21 and the electrodes 22 and 23 are connected.
【0003】[0003]
【発明が解決しようとする課題】しかしながら上記のよ
うな実装技術では、半導体チップの絶縁基板への固定は
別の手段によって固定する必要がある。このため、特開
平2−246130号公報では半田づけによって固定す
ることが提案されている。しかしながら、半導体動作温
度範囲で液体となす金属を接続に用いた場合には、例え
ば基板を傾斜させた場合には、流動性のため他電極との
接触の危険性があるため狭ピッチの電極に対して課題が
あった。また、別の固定手段として半導体チップに絶縁
樹脂を充填する際にも基板を傾斜させることができずに
細心の注意を必要とする。また、容易に液体となるGa
金属を電極上に形成するには、ペースト状で印刷や転写
などの安価な形成方法を用いる際、容易に液体化するた
め形成過程において温度管理を必要とする。However, in the mounting technique as described above, it is necessary to fix the semiconductor chip to the insulating substrate by another means. Therefore, Japanese Patent Laid-Open No. 2-246130 proposes fixing by soldering. However, when a metal that is liquid in the semiconductor operating temperature range is used for connection, for example, when the substrate is tilted, there is a risk of contact with other electrodes due to fluidity, so electrodes with a narrow pitch are used. There was a problem, however. Further, even when the semiconductor chip is filled with the insulating resin as another fixing means, the substrate cannot be tilted, so that it is necessary to be very careful. In addition, Ga that easily becomes liquid
In order to form a metal on an electrode, when an inexpensive forming method such as printing or transfer in a paste form is used, it is easily liquefied, which requires temperature control in the forming process.
【0004】[0004]
【課題を解決するための手段】上記問題点を解決するた
めに本発明は、表面にバンプ電極が形成された半導体チ
ップを、表面に電極が形成された絶縁基板上に光あるい
は熱エネルギーまたはその両者によって硬化する絶縁樹
脂を塗布した後にフェースダウンで上記電極を接触させ
加圧しながら上記絶縁樹脂を硬化する半導体チップの実
装構造体において、絶縁基板上に形成された電極あるい
は半導体チップ上に形成されたバンプ電極上のいずれか
にGaを主成分とする金属を形成し、他方の電極上には
In、Sn、Pbのいずれかを主成分とする金属を形成
し、当接された上記Gaを主成分とする金属と上記I
n、Sn、Pbのいずれかを主成分とする金属とが常温
にて合金を形成し液体となることを用いる。In order to solve the above problems, the present invention provides a semiconductor chip having a bump electrode formed on the surface thereof, or light or heat energy on an insulating substrate having an electrode formed on the surface thereof. In a mounting structure of a semiconductor chip in which an insulating resin that is cured by both is applied and then the electrodes are contacted face down to cure the insulating resin while applying pressure, an electrode formed on an insulating substrate or formed on the semiconductor chip. A metal containing Ga as a main component is formed on one of the bump electrodes, and a metal containing any of In, Sn, and Pb as a main component is formed on the other electrode, and the contacted Ga is removed. Metal as main component and above I
It is used that a metal containing any one of n, Sn and Pb as a main component forms an alloy at room temperature to become a liquid.
【0005】絶縁基板上に形成された電極あるいは半導
体チップ上に形成されたバンプ電極上のいずれかにマイ
クロカプセル化されたGaを主成分とする金属を主とし
たペーストを印刷法あるいは転写によって形成し、他方
にはIn、Sn、Pbのいずれかを主成分とする金属を
メッキ法あるいは蒸着法により形成し、当接された上記
Gaを主成分とする金属と上記In、Sn、Pbのいず
れかを主成分とする金属とが常温にて合金を形成し液体
とする半導体装置の製造方法を用いる。A paste containing a metal mainly containing microcapsules, which is microencapsulated, is formed by a printing method or a transfer method on an electrode formed on an insulating substrate or a bump electrode formed on a semiconductor chip. On the other hand, a metal containing In, Sn, or Pb as a main component is formed by a plating method or a vapor deposition method. A method of manufacturing a semiconductor device is used in which a metal containing the above as a main component forms an alloy at room temperature to form a liquid.
【0006】[0006]
【作用】絶縁基板上に形成された電極あるいは半導体チ
ップ上に形成されたバンプ電極上のいずれかにGaを主
成分とする金属と他方にはIn、Sn、Pbのいずれか
を主成分とする金属を形成する。このときGaは約30
℃の融点のため半導体等の実装作業雰囲気を約25℃の
室温に保てば固体である。また、他方の電極の上に形成
されたIn、Sn、Pbを主成分とする金属も当然室温
では固体である。この状態では光あるいは熱エネルギー
または両者によって硬化する絶縁樹脂を基板上に塗布し
た後でもそれぞれの電極を絶縁樹脂を押し退け当接する
ことができる。また当接された後上記Gaを主成分とす
る金属と上記In、Sn、Pbのいずれかを主成分とす
る金属との界面から常温にて液体となるため樹脂の硬化
と同時に液体金属を絶縁樹脂内に閉じこめることができ
る。A metal containing Ga as a main component is present on either an electrode formed on an insulating substrate or a bump electrode formed on a semiconductor chip and the other contains In, Sn, or Pb as a main component. Form metal. At this time, Ga is about 30
Since it has a melting point of .degree. C., it is solid if the mounting work atmosphere for semiconductors is kept at room temperature of about 25.degree. Further, the metal containing In, Sn, and Pb as the main components formed on the other electrode is naturally solid at room temperature. In this state, even after the insulating resin which is cured by light or heat energy or both is applied onto the substrate, the respective electrodes can be pushed away and brought into contact with each other. Further, after being contacted with each other, it becomes liquid at room temperature from the interface between the metal containing Ga as a main component and the metal containing any of In, Sn and Pb as a main component. It can be enclosed in resin.
【0007】また、Gaを主成分とする金属をマイクロ
カプセル化することによってペースト化することがで
き、印刷等の安価な方法によってでも、その形成過程に
おいては温度管理が容易であるため安価に製造できる。Further, a metal containing Ga as a main component can be formed into a paste by microencapsulation, and even by an inexpensive method such as printing, the temperature can be easily controlled in the forming process, so that the manufacturing cost is low. it can.
【0008】[0008]
【実施例】以下本発明の実施例の半導体装置について、
図面を参照しながら説明する。EXAMPLE A semiconductor device according to an example of the present invention will be described below.
A description will be given with reference to the drawings.
【0009】図1は本発明の第1の実施例における半導
体装置の断面図を示したもので、絶縁基板11上にAu
あるいはAg、Ag−Pt等の金属からなる基板電極1
2を厚膜印刷あるいは蒸着薄膜のフォトリソグラフィに
よって形成する。このような基板電極の上に蒸着あるい
はメッキ法等によってGaを主成分とする金属13を選
択的に形成する。また、蒸着の場合は基板電極12とG
aを主成分とする金属13を同時に形成しパターンして
もよい。一方、SiやGaAs等のIC、LSIまたは
LEDやLD等のIII−V族光半導体等の半導体素子の例
としてSiICチップ14にはAuあるいは他の金属に
Auメッキを施したバンプ、またあるいはAuや半田金
属からなるバンプ電極15をメッキ法あるいはワイヤボ
ンダによるワイヤバンプ等によって形成する。さらにバ
ンプ上にはInを主成分とする金属16がメッキあるい
は蒸着や転写等の手段によって形成されている。この
時、Gaに対してIn、SnあるいはPbの比が2〜2
0atm%となるように厚みを調整することが望まし
い。この時、Gaを主成分とする金属13は固体であ
る。つぎに、このような半導体素子14を実装形態にダ
イシングし実装機を用いて絶縁基板11上に実装を行
う。実装機では、絶縁基板11の所定の実装位置に光硬
化型絶縁樹脂17をスタンピング法あるいはディスペン
サ等を用いて塗布し基板電極12と半導体バンプ電極1
5が当接するように位置ぎめをして且つコレット19に
よって加圧を加える。この時の加圧はバンプ電極当り
0.1〜0.3kgの範囲で加えるのがよい。絶縁基板
がガラス等の透明基板であれば、基板の実装面とは異な
る裏面からUV光10の光照射によって樹脂が硬化し、
その後圧力を解放することによって実装は完了する。こ
の時、固体であったGaを主成分とする金属13とI
n、SnあるいはPbを主成分とする金属16は加圧に
よって当接し、当接面から常温で合金を形成して液化が
始まり液体金属18を形成する。この時既に周囲は絶縁
樹脂17の硬化によって閉じこめられ、液体金属18は
移動が規制されるため他の電極と接触は回避される。ま
た、ここで金属13と金属16とがそれぞれ逆の位置で
あっても結果は同様である。この方法によれば30μm
の狭ピッチでも電極間の接触がなく実装が可能であっ
た。また、ガラス基板とSiICチップの熱膨張係数が
3倍異なるにもかかわらず、−30℃−70℃各30分
保持による2000サイクルの熱衝撃試験においても安
定であった。FIG. 1 is a sectional view of a semiconductor device according to the first embodiment of the present invention, in which an Au film is formed on an insulating substrate 11.
Alternatively, the substrate electrode 1 made of a metal such as Ag or Ag-Pt 1
2 is formed by thick film printing or photolithography of a deposited thin film. On such a substrate electrode, a metal 13 containing Ga as a main component is selectively formed by vapor deposition or plating. In the case of vapor deposition, the substrate electrode 12 and G
The metal 13 containing a as a main component may be simultaneously formed and patterned. On the other hand, as an example of a semiconductor element such as an IC such as Si or GaAs, an LSI or a III-V group optical semiconductor such as an LED or LD, the SiIC chip 14 has a bump formed by Au plating on Au or another metal, or alternatively Au. The bump electrode 15 made of solder metal is formed by a plating method or a wire bump using a wire bonder. Further, a metal 16 containing In as a main component is formed on the bump by means of plating, vapor deposition, transfer or the like. At this time, the ratio of In, Sn or Pb to Ga is 2 to 2
It is desirable to adjust the thickness to be 0 atm%. At this time, the metal 13 whose main component is Ga is solid. Next, such a semiconductor element 14 is diced into a mounting form and mounted on the insulating substrate 11 using a mounting machine. In the mounting machine, the photocurable insulating resin 17 is applied to a predetermined mounting position on the insulating substrate 11 by using a stamping method or a dispenser or the like, and the substrate electrode 12 and the semiconductor bump electrode 1 are applied.
Position so that 5 abuts and apply pressure with collet 19. The pressure applied at this time is preferably in the range of 0.1 to 0.3 kg per bump electrode. If the insulating substrate is a transparent substrate such as glass, the resin is cured by irradiation with UV light 10 from the back surface different from the mounting surface of the substrate,
The mounting is then completed by releasing the pressure. At this time, the solid metal 13 and I containing Ga as a main component and I
The metal 16 containing n, Sn, or Pb as a main component is brought into contact with each other by pressurization, and an alloy is formed from the contact surface at room temperature to start liquefaction and form a liquid metal 18. At this time, the surroundings are already enclosed by the hardening of the insulating resin 17, and the movement of the liquid metal 18 is restricted, so that contact with other electrodes is avoided. Further, here, the result is the same even if the metal 13 and the metal 16 are located at opposite positions. According to this method, 30 μm
Even with a narrow pitch, there was no contact between the electrodes and mounting was possible. Further, even though the thermal expansion coefficient of the glass substrate and that of the SiIC chip were three times different, they were stable even in a thermal shock test of 2000 cycles by holding each at -30 ° C to 70 ° C for 30 minutes.
【0010】つぎに、第2の実施例として不透明基板の
場合について説明する。実施例1と同様にアルミナ基
板、ガラエポ基板やポリイミド等の有機材料基板等の絶
縁基板11及び半導体素子であるSiICチップ14に
それぞれ基板電極12、Gaを主成分とする金属13お
よびバンプ電極15にIn、SnあるいはPbを主成分
とする金属16を形成する。つぎに同様に、このような
半導体素子14を実装形態にダイシングし実装機を用い
て絶縁基板11上に実装を行う。実装機では、絶縁基板
11の所定の実装位置に光熱併用硬化型絶縁樹脂17を
スタンピング法あるいはディスペンサ等を用いて塗布し
基板電極12と半導体バンプ電極15が当接するように
位置ぎめをして加圧を加える。基板の実装面から光照射
によって半導体素子14の側面の樹脂が硬化し、その後
圧力を解放する。さらに水平に保った状態で基板ごと全
体を樹脂硬化温度まで昇温することによって実装は完了
する。Next, a case of an opaque substrate will be described as a second embodiment. In the same manner as in Example 1, an insulating substrate 11 such as an alumina substrate, a glass epoxy substrate or an organic material substrate such as polyimide, a SiIC chip 14 which is a semiconductor element, a substrate electrode 12, a metal 13 containing Ga as a main component, and a bump electrode 15, respectively. A metal 16 containing In, Sn or Pb as a main component is formed. Next, similarly, such a semiconductor element 14 is diced into a mounting form and mounted on the insulating substrate 11 using a mounting machine. In the mounting machine, the photothermal combined curing type insulating resin 17 is applied to a predetermined mounting position of the insulating substrate 11 by using a stamping method or a dispenser, and the substrate electrode 12 and the semiconductor bump electrode 15 are positioned and added so as to contact each other. Apply pressure. The resin on the side surface of the semiconductor element 14 is cured by light irradiation from the mounting surface of the substrate, and then the pressure is released. Further, the mounting is completed by raising the temperature of the entire substrate to the resin curing temperature while keeping it horizontal.
【0011】この場合も接触および温度上昇によって当
接部で金属13と金属16は合金を形成して液体金属と
なる。また、周囲は絶縁樹脂17の硬化によって閉じこ
められ、液体金属は移動が規制されるため硬化後は他の
電極と接触は回避される。また、ここで金属13と金属
16とがそれぞれ逆の位置であっても結果は同じであ
る。この場合も、ガラスエポキシ基板とSiICチップ
では10倍の熱膨張係数の差があるにもかかわらず上記
熱衝撃試験にも安定であった。これは、17℃以上で液
体となる合金による接続のため恒温での熱歪を液体が吸
収するものである。Also in this case, the metal 13 and the metal 16 form an alloy at the abutting portion due to contact and temperature rise, and become liquid metal. Further, the periphery is enclosed by the curing of the insulating resin 17, and the movement of the liquid metal is restricted, so that contact with other electrodes is avoided after the curing. Further, here, the results are the same even if the metal 13 and the metal 16 are located at opposite positions. In this case as well, the glass epoxy substrate and the SiIC chip were stable in the thermal shock test even though there was a 10-fold difference in the coefficient of thermal expansion. This is because the liquid absorbs thermal strain at constant temperature due to the connection by the alloy which becomes liquid at 17 ° C. or higher.
【0012】つぎに第3の実施例としてGaを主成分と
する金属の形成方法としてマイクロカプセル化した金属
粒子を用いた例について説明する。Gaを主成分とする
金属は約30℃程度の温度で液体化する。カプセル化の
ため殻材を溶解した1種以上の良溶剤中にGaを主成分
とする金属を入れ30℃以上に昇温して金属を溶融す
る。溶解した金属を良溶剤中で撹拌(超音波を加えなが
らでもよい)しながら、あるいは細メッシュで金属を濾
しながら、5〜50μm程度の粒径まで分散する。つぎ
に、貧溶剤を漸次添加させることによってGaを主成分
とした金属を容易にカプセル化できる。カプセル化され
た金属粒子は液化温度以上の温度上昇にも安定に保た
れ、印刷ペーストや接着剤等に分散することによって容
易に塗料化できる。このような印刷ペーストや塗料を用
いて、基板電極上に印刷や、半導体バンプ電極に転写す
ることによって効率よく安価に形成することができる。
基板電極上や、半導体バンプ電極に形成したGaを主成
分とする金属を熱あるいは圧力によって予めカプセルを
破壊してGaを主成分とする金属を電極に直に形成して
おけば実装時にカプセルの分散を小さく押さえることが
出きる。印刷法を用いる場合は、印刷による精度によっ
て実装ピッチが規定され、150μmピッチが実用レベ
ルであった。Next, as a third embodiment, an example using metal particles microencapsulated as a method of forming a metal containing Ga as a main component will be described. The metal containing Ga as a main component is liquefied at a temperature of about 30 ° C. For encapsulation, a metal containing Ga as a main component is placed in one or more good solvents in which the shell material is dissolved, and the temperature is raised to 30 ° C. or higher to melt the metal. The dissolved metal is dispersed in a good solvent with stirring (or ultrasonic waves may be added) or while filtering the metal with a fine mesh to a particle size of about 5 to 50 μm. Next, by gradually adding the poor solvent, the metal containing Ga as a main component can be easily encapsulated. The encapsulated metal particles are stably maintained even when the temperature rises above the liquefaction temperature, and can be easily made into a paint by dispersing them in a printing paste or an adhesive. By using such a printing paste or paint, printing on a substrate electrode or transfer to a semiconductor bump electrode enables efficient and inexpensive formation.
If the metal containing Ga as a main component formed on the substrate electrode or the semiconductor bump electrode is destroyed in advance by heat or pressure and the metal containing Ga as a main component is directly formed on the electrode, the capsule may be easily mounted during mounting. It is possible to keep the dispersion small. When the printing method is used, the mounting pitch is defined by the accuracy of printing, and the pitch of 150 μm is at a practical level.
【0013】[0013]
【発明の効果】本実施例の半導体装置およびその製造方
法では、30μmの狭ピッチで熱膨張係数の著しく異な
る基板と半導体素子でも、熱衝撃試験にも十分な耐性を
示す半導体装置を提供することができ、これにより、安
価な基板材料の使用も可能となる。また、Gaを主成分
とする金属をマイクロカプセル化することによって印刷
法や安定した転写法等が使用でき安価に提供することが
できる。According to the semiconductor device and the method of manufacturing the same of the present embodiment, it is possible to provide a semiconductor device having sufficient resistance to a thermal shock test even for a substrate and a semiconductor element having a narrow pitch of 30 μm and having a significantly different thermal expansion coefficient. This makes it possible to use an inexpensive substrate material. In addition, by encapsulating a metal containing Ga as a main component in a microcapsule, a printing method, a stable transfer method, or the like can be used and can be provided at low cost.
【図面の簡単な説明】[Brief description of drawings]
【図1】図1は第1の実施例における半導体装置の断面
図FIG. 1 is a sectional view of a semiconductor device according to a first embodiment.
【図2】図2は従来の半導体装置の断面図FIG. 2 is a sectional view of a conventional semiconductor device.
10 UV光 11 絶縁基板 12 基板電極 13 Gaを主成分とする金属 14 SiICチップ 15 バンプ電極 16 Inを主成分とする金属 17 光硬化型絶縁樹脂 18 液体金属 19 加圧コレット 21 絶縁基板 22 基板電極 23 Siチップ 24 バンプ 25 Ga Reference Signs List 10 UV light 11 Insulating substrate 12 Substrate electrode 13 Metal containing Ga as a main component 14 SiIC chip 15 Bump electrode 16 Metal containing In as a main component 17 Photocurable insulating resin 18 Liquid metal 19 Pressurizing collet 21 Insulating substrate 22 Substrate electrode 23 Si chip 24 Bump 25 Ga
Claims (2)
プを、表面に電極が形成された絶縁基板上に光あるいは
熱エネルギーまたはその両者によって硬化する絶縁樹脂
を塗布した後にフェースダウンで上記電極を接触させ加
圧しながら上記絶縁樹脂を硬化する半導体チップの実装
構造体において、 絶縁基板上に形成された電極あるいは半導体チップ上に
形成されたバンプ電極上のいずれかにGaを主成分とす
る金属を形成し、他方電極上にはIn、Sn、Pbのい
ずれかを主成分とする金属を形成し、当接された上記G
aを主成分とする金属と上記In、Sn、Pbのいずれ
かを主成分とする金属との両者が常温にて合金を形成し
液体となることを特徴とする半導体装置。1. A semiconductor chip having bump electrodes formed on its surface is coated on an insulating substrate having electrodes formed on its surface with an insulating resin which is cured by light or thermal energy or both, and the electrodes are face down. In a semiconductor chip mounting structure in which the insulating resin is cured while contacting and pressurizing, a metal containing Ga as a main component is applied to either an electrode formed on an insulating substrate or a bump electrode formed on the semiconductor chip. The above-mentioned G formed on the other electrode is contacted with a metal containing In, Sn, or Pb as a main component.
A semiconductor device, wherein both a metal containing a as a main component and a metal containing any of In, Sn and Pb as a main component form an alloy at room temperature to become a liquid.
プを、表面に電極が形成された絶縁基板上に光あるいは
熱エネルギーまたはその両者によって硬化する絶縁樹脂
を塗布した後にフェースダウンで上記電極を接触させ加
圧しながら上記絶縁樹脂を硬化する半導体チップの実装
構造体において、 絶縁基板上に形成された電極あるいは半導体チップ上に
形成されたバンプ電極上のいずれかにマイクロカプセル
化されたGaを主成分とする金属を主としたペーストを
印刷法あるいは転写によって形成し、他方にはIn、S
n、Pbのいずれかを主成分とする金属をメッキ法ある
いは蒸着法により形成し、当接された上記Gaを主成分
とする金属と上記In、Sn、Pbのいずれかを主成分
とする金属とが常温にて合金を形成し液体となることを
特徴とする半導体装置の製造方法。2. A semiconductor chip having bump electrodes formed on its surface is coated on an insulating substrate having electrodes formed on its surface with an insulating resin which is cured by light or thermal energy or both, and the electrodes are face down. In a semiconductor chip mounting structure in which the insulating resin is cured while contacting and pressurizing, mainly Ga micro-encapsulated on either an electrode formed on an insulating substrate or a bump electrode formed on the semiconductor chip is used. A paste mainly composed of metal as a component is formed by a printing method or transfer, and In, S
A metal containing n or Pb as a main component is formed by a plating method or a vapor deposition method, and is brought into contact with the metal containing a main component of Ga and a metal containing any of In, Sn or Pb as a main component. A method for manufacturing a semiconductor device, wherein and form an alloy at room temperature to become a liquid.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27343393A JPH07130793A (en) | 1993-11-01 | 1993-11-01 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27343393A JPH07130793A (en) | 1993-11-01 | 1993-11-01 | Semiconductor device and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07130793A true JPH07130793A (en) | 1995-05-19 |
Family
ID=17527844
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27343393A Pending JPH07130793A (en) | 1993-11-01 | 1993-11-01 | Semiconductor device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07130793A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007242900A (en) * | 2006-03-09 | 2007-09-20 | Fujitsu Ltd | Electron device, and its manufacturing method |
JP2008034719A (en) * | 2006-07-31 | 2008-02-14 | Fujifilm Corp | Electric wiring structure, liquid discharge head, liquid discharge device, and image forming apparatus |
US8106486B2 (en) | 2008-05-14 | 2012-01-31 | Denso Corporation | Electronic apparatus with an electrical conductor in the form of a liquid and an electrical insulator with a light-curing property |
-
1993
- 1993-11-01 JP JP27343393A patent/JPH07130793A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007242900A (en) * | 2006-03-09 | 2007-09-20 | Fujitsu Ltd | Electron device, and its manufacturing method |
JP4672576B2 (en) * | 2006-03-09 | 2011-04-20 | 富士通株式会社 | Electronic device and manufacturing method thereof |
JP2008034719A (en) * | 2006-07-31 | 2008-02-14 | Fujifilm Corp | Electric wiring structure, liquid discharge head, liquid discharge device, and image forming apparatus |
US8106486B2 (en) | 2008-05-14 | 2012-01-31 | Denso Corporation | Electronic apparatus with an electrical conductor in the form of a liquid and an electrical insulator with a light-curing property |
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